NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: LatticeECP/EC Family Data Sheet DS1000 DS1000 Version 02.7, February 2008 LatticeECP/EC Family Data Sheet Introduction May 2005 Data Sheet Features - - - - - - Extensive Density and Package Options · 1.5K to 32.8K LUT4s · 65 to 496 I/Os · Density migration supported sysDSPTM Block (LatticeECPTM Versions) · High performance multiply and accumulate · 4 to 8 blocks - 4 to 8 36x36 multipliers or 16 to 32 18x18 multipliers or - 32 to 64 9x9 multipliers Embedded and ... | Original |
163 pages, |
LFEC6E-4FN256C LFEC10 LFEC15 LFEC1E-3T100C LFEC33 DDR400 convolution encoders LFECP10 LFECP15 LFECP20 PB11B PL18B DS1000 BDQS14 DS1000 abstract |
| Abstract: LatticeECP/EC Family Data Sheet Version 02.2, March 2006 LatticeECP/EC Family Data Sheet Introduction May 2005 Data Sheet Features - - - - - - Extensive Density and Package Options · 1.5K to 32.8K LUT4s · 65 to 496 I/Os · Density migration supported sysDSPTM Block (LatticeECPTM Versions) · High performance multiply and accumulate · 4 to 8 blocks - 4 to 8 36x36 multipliers or 16 to 32 18x18 multipliers or - 32 to 64 9x9 multipliers Embedded and Distribut ... | Original |
159 pages, |
LFECP33 DDR400 LFEC10 LFEC15 LFEC33 LFECP10 LFECP15 LFECP20 datasheet abstract |
| Abstract: LatticeECP/EC Family Data Sheet DS1000 DS1000 Version 02.8, September 2012 LatticeECP/EC Family Data Sheet Introduction September 2012 Data Sheet Features Extensive Density and Package Options · 1.5K to 32.8K LUT4s · 65 to 496 I/Os · Density migration supported LVCMOS 3.3/2.5/1.8/1.5/1.2 LVTTL SSTL 3/2 Class I, II, SSTL18 SSTL18 Class I HSTL 18 Class I, II, III, HSTL15 HSTL15 Class I, III PCI LVDS, Bus-LVDS, LVPECL, RSDS sysDSPTM Block (LatticeECPTM Versions) · High performance multiply ... | Original |
163 pages, |
DS1000 DS1000 abstract |
| Abstract: LatticeXP2 Standard Evaluation Board User's Guide February 2010 Revision: EB29_01.5 LatticeXP2 Standard Evaluation Board User's Guide Lattice Semiconductor Introduction The LatticeXP2TM Standard Evaluation Board provides a convenient platform to evaluate, test and debug user designs. The board features a LatticeXP2-17 FPGA in a 484 fpBGA package. The LatticeXP2 I/Os are connected to a rich variety of interfaces described later in this document. This document (including ... | Original |
36 pages, |
aa7 marking diode adc* rs232 EB29 LCM-S02002DSF LDS-A304RI pl30b sot23 marking code v7 PR15A diode transistor marking A9 R8 SOD123FL sot marking code w17 TRANSISTOR c104 transistor cf43 datasheet abstract |
| Abstract: LatticeXP2 Standard Evaluation Board User's Guide February 2008 Revision: EB29_01.3 LatticeXP2 Standard Evaluation Board User's Guide Lattice Semiconductor Introduction The LatticeXP2TM Standard Evaluation Board provides a convenient platform to evaluate, test and debug user designs. The board features a LatticeXP2-17 FPGA in a 484 fpBGA package. The LatticeXP2 I/Os are connected to a rich variety of interfaces described later in this document. This document (including the sc ... | Original |
36 pages, |
POWR607 LDS-A304RI LCM-S02002DSF EB29 datasheet abstract |
| Abstract: LatticeXP Family Data Sheet DS1001 DS1001 Version 05.1, November 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 DS1001 Flexible I/O Buffer Features · Programmable sysIOTM buffer supports wide range of interfaces: - LVCMOS 3.3/2.5/1.8/1.5/1.2 - LVTTL SSTL 18 Class I - SSTL 3/2 Class I, II HSTL15 HSTL15 Class I, III - HSTL 18 Class I, II, III - PCI - LVDS, Bus-LVDS, LVPECL, RSDS Non-volatile, Infinitely Reconfigurable · Instant-on powers up in microsec ... | Original |
130 pages, |
LFXP3C-3QN208 LFXP3C-3TN100I LFXP3C-4TN144C LFXP10 LFXP6C-3TN144I LVCMOS33 DDR333 LVCMOS25 LFXP6 LFXP10C-3F256I LFXP3C-4TN100C LFXP6C-3FN256I LFXP3C-3TN144C DS1001 DS1001 DS1001 DS1001 abstract |
| Abstract: LatticeXP Family Data Sheet DS1001 DS1001 Version 05.1, November 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 DS1001 Flexible I/O Buffer Features · Programmable sysIOTM buffer supports wide range of interfaces: LVCMOS 3.3/2.5/1.8/1.5/1.2 LVTTL SSTL 18 Class I SSTL 3/2 Class I, II HSTL15 HSTL15 Class I, III HSTL 18 Class I, II, III PCI LVDS, Bus-LVDS, LVPECL, RSDS Non-volatile, Infinitely Reconfigurable · Instant-on powers up in microseconds ... | Original |
130 pages, |
LVCMOS33 LFXP LFXP10 LFXP10C-3F256I LFXP3C 5TN100C LVCMOS25 DDR333 LFXP6C-3FN256I DS1001 DS1001 abstract |
| Abstract: LatticeECP/EC Family Data Sheet Version 01.4, December 2004 LatticeECP/EC Family Data Sheet Introduction November 2004 Preliminary Data Sheet Features - - - - - - Extensive Density and Package Options · 1.5K to 41K LUT4s · 65 to 576 I/Os · Density migration supported sysDSPTM Block (LatticeECPTM Versions) · High performance multiply and accumulate · 4 to 10 blocks - 4 to 10 36x36 multipliers or 16 to 40 18x18 multipliers or - 32 to 80 9x9 multipliers Em ... | Original |
158 pages, |
LFECP33 LFECP20 LFECP15 LFECP10 LFEC33 LFEC15 LFEC10 DDR400 LFEC1E-3Tn100C datasheet abstract |
| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.9, January 2012 LatticeECP2/M Family Data Sheet Introduction January 2012 Data Sheet DS1006 DS1006 Features High Logic Density for System Integration · 6K to 95K LUTs · 90 to 583 I/Os Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / ... | Original |
389 pages, |
16x4 sram DS1006 DS1006 abstract |
| Abstract: LatticeXP2TM Family Data Sheet DS1009 DS1009 Version 01.2, September 2007 LatticeXP2 Family Data Sheet Introduction May 2007 Advance Data Sheet DS1009 DS1009 Features flexiFLASHTM Architecture · · · · · · Instant-on Infinitely reconfigurable Single chip FlashBAKTM technology Serial TAG memory Design security SSTL 33/25/18 class I, II HSTL15 HSTL15 class I; HSTL18 HSTL18 class I, II PCI LVDS, Bus-LVDS, MLVDS, LVPECL, RSDS Pre-engineered Source Synchronous Interfaces · ... | Original |
115 pages, |
XP2-17 16X4 DS1009 DS1009 abstract |
| Abstract: LLM0_PLLC_OUT_A / PL29B PL28A PL28A PL26A PL26A PL26B PL26B LLM0_PLLT_IN_A / PL25A PL25A LLM0_PLLC_IN_A / PL25B PL25B (1 OF 5 ... | Original |
20 pages, |
CR0603 surface mounted fuse SOT23-6 MARKING m5 SOT23-6 MARKING b4 SOT23-6 MARKING b10 marking B22 sot-23 J24 P-CHANNEL LFXP10e J2410 N4 SOT23-6 SOT23-6 N4 T11 SOD-123 marking rj sod-123 datasheet abstract |
| Abstract: SJ5-N PL30B PL30B PL29A PL29A PL29B LDQS28 LDQS28 / PL28A PL28A PL28B PL28B PL27A PL27A PL27B PL27B PL26A PL26A PL26B PL26B PL25A PL25A PL25B PL25B PL24A PL24A ... | Original |
23 pages, |
CON6A Condor Condor Electronics EVQP2 FPBGA484 FPGA48 LVCMOS15 LVCMOS25 LVCMOS33 PB46A pDS4102-DL2 schematic TPG21 pr48b TPE11 datasheet abstract |