E912112021 PDC2002M02 PDC2002M NOE912112021 HD44780 PDC2002 AT90S8515 8515DEF - Datasheet Archive

 

Revision A0 B0 A1 2003/5/5 2003/6/27 2003/12/4 2004/3/30 EL Approved By D C0 TA Issue Date Dept. E912112021 PT Document No. O

 

O P TO Revision A0 B0 A1 2003/5/5 2003/6/27 2003/12/4 2004/3/30 EL Approved By D C0 TA Issue Date Dept. E912112021 E912112021 PT Document No. O × 2 Character Module PDC2002M02 PDC2002M02 Specification -O TitlePLED 20 Review By Control Document Prepared By Yes No Confidential Document PDC2002M PDC2002M PT O O P TO D EL TA -O PLED 20x2 Characters Module PDC2002M02 PDC2002M02 Specifications Date: 2004/3/25 Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 1 of 14 PLED 20x2 Character Module PDC2002M02 PDC2002M02 Specification Features O 1. 2. Absolute maximum ratings Parameter Supply voltage for Logic Operating temperature Storage temperature Brightness control voltage Soldering Temperature Module power consumption @Vbt=3V VDD=5V TA Symbol VDD Topr Tstg Vbt Tsolder Pd -O PT 1. 2 lines of 20 characters of 5x8 (dots) 2. Low power consumption 3. High contrast ratio and wide viewing angle 4. Compatible with LCD 20x2 type 5. Controller is compatible with HD44780 HD44780 6. 4-bits or 8-bit MPU interface 7. High speed MPU interface:2 MHz(VDD=5V) 8. 80x8 bit Display RAM(80 characters max.) D Ambient Temperature Humidity Corrosive gas Typ 5.0 25 Max 5.5 60 70 3 260 for 5 seconds 50 80 130 Operating Min. Max. -20oC 60oC Storage Min. Max. -30oC 70oC 40oC 90%RH Not Acceptable 40oC 90%RH Not Acceptable EL Item Min 4.5 -20 -30 Unit V V mW Document NOE912112021 NOE912112021 Revision: C0 O P TO 3 Page 2 of 14 Electrical Characteristics 3.1 DC Electrical Characteristics (Ta= -20 to 50) Symbol Tcyc Pweh tEf, tEr tAS tAH tDSW tH Min 500 230 Symbol Tcyc Pweh tEf, tEr tAS tAH tDDR tH Min 500 230 TA Item Enable Cycle Time Enable Pulse Width (High level) Enable Rise/ Fall Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Typ Max 5.5 3 0.35 0.7VDD -0.3 -1 -O 3.2 AC Electrical Characteristics (Ta= -20 to 50) Write operation Min 4.5 Typ 0.6 VDD 0.55 1 Max 20 40 10 80 10 Unit ns ns ns ns ns ns ns Read operation D EL Item Enable Cycle Time Enable Pulse Width (High level) Enable Rise/ Fall Time Address Set-up Time Address Hold Time Data Delay Time Data Hold Time Typ Max 20 40 10 160 5 Unit V V mA V O Symbol Condition VDD VBT Icc VDD=5V, (Logical only ) Vih Vil Il PT Item Power supply voltage Brightness control voltage Power supply current High level input voltage Low level input voltage Leakage current Unit ns ns ns ns ns ns ns V uA Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 3 of 14 3.3 Timing Chart Write operation RS Pweh tAH O tAS R/W tEf PT tH E tDSW tEr D0~D7 -O Tcyc RS TA Read operation tAS R/W Pweh tAH tEf EL E tEr tH tDDR D0~D7 D Tcyc 3.4 Display Data RAM (DDRAM) The Display Data RAM (DDRAM) is used to store the Display Data which is represented as 8-bitcharacter code. The Display Data RAM supports an extended capacity of 80 x 8-bits or 80 characters. DDRAM 00 01 02 03 04 05 Address (Hex) 40 41 42 43 44 45 . 22 23 24 25 26 27 . 62 63 64 65 66 67 To illustrate, for 2-line x 20 characters display, the relationship between the DDRAM address Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 4 of 14 and position of the PLED panel is shown below. Display 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Position DDRAM 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 Address 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 O For shift left DDRAM 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 Address 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 D EL TA -O PT For shift right DDRAM 27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 50 51 52 Address 67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 50 51 52 53 Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 5 of 14 3.5 Correspondence between character codes and char patterns U PPER B ITS 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 LO W ER B ITS CG RAM1 CG RAM3 CG RAM4 0100 CG RAM5 0101 CG RAM6 0110 CG RAM7 0111 CG RAM8 1000 CG RAM1 1001 CG RAM2 -O 0011 TA 0010 PT CG RAM2 EL 0001 O 0000 1010 CG RAM3 CG RAM4 1100 CG RAM5 1101 CG RAM6 1110 CG RAM7 D 1011 1111 CG RAM8 Document NOE912112021 NOE912112021 Revision: C0 O P TO 3.6 Instruction set Instruction Page 6 of 14 Code Description 0 0 0 0 0 0 0 0 0 1 Entry mode set Display On/Off control Cursor/displa y shift Function set 0 0 0 0 0 0 0 1 I/D S 0 0 0 0 0 0 1 D C B 0 0 0 0 0 1 S/C R/L X X 0 0 0 0 1 DL N F Set CGRAM address 0 0 0 Set DDRAM address 0 0 1 0 Read busy flag & address 1 BF 1 0 Write data Clear entire display. Sets DDRAM address 0 into address counter Sets cursor move direction and specifies display shift 1.52ms 1 1 37us 37us 37us AC Reads busy flag (BF) indicating that internal operation is being performed Reads address counter contents Write data into the CGRAM or DDRAM 0us Read data from the CGRAM or DDRAM 37us -O X AC AC AC AC AC AC Read data EL I/D =1: Increment I/F=0:Decrement S =1: Display shift on D =1: Display on C =1: Cursor display on B =1: Cursor blink on S/C =1: Shift display S/C=0: Move cursor R/L =1: Shift right R/L=0:Shift left DL =1: 8-bit DL=0:4-bit N =1:Dual line N =0:Single line F =1:5x10 dots F =0:5x8 dots BF =1:Internal operation BF =0:Ready for instruction D Sets entire display (D) On/Off Sets cursor (C) On/Off Sets Blinking (B) of cursor position character Moves cursor & shifts display without changing DDRAM contents Sets interface data length (DL) Sets number of display lines (N) Sets character font (F) 1 ACG ACG ACG ACG ACG ACG Sets CGRAM address. CGRAM data is sent and received after this setting. ADD ADD ADD ADD ADD ADD ADD Sets DDRAM address. The DDRAM data bus sent and received after this setting TA Write data into the CGRAM or DDRAM Read data into the CGRAM or DDRAM X 37us O Clear Display Execution time D6 D5 D4 D3 D2 D1 D0 PT RS R/ D7 W DDRAM: Display Data RAM CGRAM: Character Generator RAM ACG: Character Generator RAM Address ADD: Display Data RAM Address AC: Address Counter 37us 37us 37us Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 7 of 14 3.7 Initialization via Instruction 8-BIT INTERFACE The following procedures are followed during the initialization of an 8-bit MPU O Power ON WAIT FOR MORE THAN 15ms AFTER THE VDD RISES TO 4.5V R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 * * * * BF CANNOT BE CHECKED BEFORE THIS PT RS INSTRUCTION. FUNCTION SET (INTERFACE IS 8 BITS WAIT FOR MORE THAN 4.1ms LONG) R/W DB7 DB6 DB5 DB4 DB3 DB2 0 0 0 0 1 1 * * DB1 DB0 BF CANNOT BE CHECKED BEFORE THIS -O RS * * INSTRUCTION. FUNCTION SET (INTERFACE IS 8 BITS WAIT FOR MORE THAN 100 us LONG) R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 * * * * D EL TA RS BF CANNOT BE CHECKED BEFORE THIS INSTRUCTION. FUNCTION SET (INTERFACE IS 8 BITS LONG) BF CAN BE CHECKED AFTER THE FOLLOWING INSTRUCTIONS. WHEN BF IS NOT CHECKED, THE WAITING TIME BETWEEN THE INSTRUCTIONS IS LONGER THAN THE EXECUTION TIME OF THE INSTRUCTION RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 END OF INITIALIZATION 0 0 0 0 1 1 N F * * FUNCTION SET (INTERFACE IS 8 BITS 0 0 0 0 0 0 1 0 0 0 LONG) SPECIFY THE NUMBER OF 0 0 0 0 0 0 0 0 0 1 DISPLAY LINES AND CHARACTER FONT) 0 0 0 0 0 0 0 1 I/D S THE NUMBER OF CHARACTER LINES AND CHARACTER FONT CANNOT BE CHANGED AFTER THIS POINT. DISPLAY OFF END OF INITIALIZATION DISPLAY CLEAR Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 8 of 14 ENTRY MODE 4-BIT INTERFACE The following procedures are followed during the initialization of an 4-bit MPU O Power ON WAIT FOR MORE THAN 15ms AFTER THE VDD RISES TO 4.5V R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 BF CANNOT BE CHECKED BEFORE THIS INSTRUCTION. PT RS FUNCTION SET (INTERFACE IS 8 BITS LONG.) WAIT FOR MORE THAN 4.1ms R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 FUNCTION SET (INTERFACE IS 8 BITS LONG.) TA WAIT FOR MORE THAN 100 us BF CANNOT BE CHECKED BEFORE THIS INSTRUCTION. -O RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 RS R/W DB7 DB6 DB5 DB4 BF CAN BE CHECKED AFTER THE FOLLOWING INSTRUCTIONS. 0 0 0 0 1 0 WHEN THE BF IS NOT CHECKED, THE WAITING TIME BETWEEN 0 0 0 0 1 0 THE INSTRUCTIONS IS LONGER THAN THE TIME IT TAKES FOR 0 0 N F * * THE INSTRUCTION TO BE EXECUTED. 0 0 0 0 0 0 0 0 1 0 0 0 INTERFACE IS 8 BITS LONG 0 0 0 0 0 0 FUNCTION SET (INTERFACE IS 4 BIT LONG. SPECIFY THE 0 0 0 0 0 1 NUMBEROF DISPLAY LINES AND CHARACTER FONT). D EL RS BF CANNOT BE CHECKED BEFORE THIS INSTRUCTION. FUNCTION SET (INTERFACE IS 8 BITS LONG.) FUNCTION SET (SET INTERFACE IS 4 BIT LONG) 0 0 0 0 0 0 THE NUMBER OF DISPLAY LINES AND CHARACTER FONT 0 0 0 1 I/D S CANNOT BE CHANGED AFTER THIS POINT. DISPLAY OFF DISPLAY CLEAR END OF INITIALIZATION END OF INITIALIZATION ENTRY MODE SET Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 9 of 14 3.8 Block Diagram VDD PLED PANEL 16 VSS 20Char x 2Line RS Controller & Driver R/W 40 Interface Pin Function Pin No. 1 2 3 4 Symbol VSS VDD VBT I/O Function I Ground I Power supply for logic I Brightness adjustment H: Data I L: Instruction code H: Read I L: Write I H L: Enable I I I I Data bus I I I I TA 4 Driver RS R/W 6 7 8 9 10 11 12 13 14 E D0 D1 D2 D3 D4 D5 D6 D7 EL 5 D -O D0~D7 60 PT E O VBT Document NOE912112021 NOE912112021 Revision: C0 O P TO Physical specifications 5.1 Mechanical specifications NO. Item 1 Active display area 2 Viewing area 3 Module dimension 4 Dot size 5 Weight Specification 73.45x11.4 79.0x17.0 113.0x41.4x9.6 0.5x0.65 34 EL TA -O PT 5.2 Drawing Unit mm mm mm mm g O 5 Page 10 of 14 Optical specifications Item Response time D 6 Contrast ratio Viewing angle Brightness Color Condition Rise Fall 100 lux Top Bottom Left right With polarizer Min. 100 30 Typ. 80 80 80 80 40 Max. 10 10 50 - YG1 - Unit us us deg deg deg deg nits Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 11 of 14 Note 1. YG.= yellow green Reliability test items 8 Application Note -20 60 20 cycles D EL TA -O (1) Ref. Circuit Conditions 70 oC , 240 hrs -30 oC,240 hrs 60 oC,240 hrs -20 oC, 240 hrs 40oC, 90% RH, 240 hrs PT NO. Test items 1 High temperature storage 2 Low temperature storage 3 High temperature operation 4 Low temperature operation 5 High temperature and high humidity storage test 6 Thermal shock test O 7 Document NOE912112021 NOE912112021 Revision: C0 O P TO Page 12 of 14 (2) Ref. Programming D EL TA -O PT O '-'It is a PDC2002 PDC2002 pattern program and show A,B,C.on module. 'Here use BASCOM-AVR compile. '-' Project name : 20x2 character module ' file name : demo2002.bas ' MCU : AVR AT90S8515 AT90S8515 ' Xtal : 8MHz ' Panel I/F : RS, RW, Enable, BTV ' Writer : Cheng-Nan Yeh ' Date : Dec.26, 2002 rev:A '-' DB0=PA0: DB1=PA1: DB2=PA2: DB3=PA3 ' DB4=PA4: DB5=PA5: DB6=PA6: DB7=PA7 ' RS=PB2: RW=PB1: Enable=PB0 '-'-initial setting $regfile = "8515DEF 8515DEF.DAT" Config Porta = Output Config Portb = Output Dim J As Integer , Cara As Byte , I As Byte Dim Command_diable As Byte, Command_enable As Byte Dim Command_write_data As Byte , Command_clear_display As Byte Dim Command_move_right As Byte , Command_display_on As Byte Dim Command_line2_char5x7 As Byte , Command_ddram_&H00 As Byte Dim Command_ddram_&H40 As Byte , Write_char As Byte '-Command_diable = &H00 Command_enable = &H01 Command_clear_display = &H01 Command_move_right = &H1D Command_display_on = &H0C Command_line2_char5x7 = &H38 Command_ddram_&H00 = &H80 Command_ddram_&H40 = &HC0 Command_write_data = &H05 Write_char = &H40 '-C=1 I=0 '-clear module display and cursor back home Portb = Command_enable 'RS=0, RW=0, Enable=1 Porta = Command_clear_display Waitus 500 'wait 500uS for MCU internal delay time Portb = Command_diable 'You need to set PB0=0 after PB0=1 for MCU. '-setting S/C, R/L, I/D, S Portb = Command_enable Porta = Command_move_right 'S/C=1 ,R/L=1 ,I/D=0, S=1 Waitus 500 Portb = Command_diable '-display on / off Portb = Command_enable Porta = Command_display_on 'D=1, C=0, B=0 Waitus 500 Document NOE912112021 NOE912112021 Revision: C0 O P TO PT 'set address is &H00 ' and next one O 'DL=1, N=1, F=0 'write Char. is "A" and next one. -O 'set address is &H40 ' and next one 'write Char. is "B" and next one. TA Portb = Command_diable '-setting 5x7 Char. 2-Line Portb = Command_enable Porta = Command_line2_char5x7 Waitus 500 Portb = Command_diable '-''-fill in any data to module ''-setting DDRAM address &H00 For J = 1 To 20 Step 1 Portb = Command_enable Porta = Command_ddram_&H00 + I Waitms 10 Portb = Command_diable '-write data up Portb = Command_write_data Porta = Write_char + C Waitms 10 Portb = Command_diable Cara = Cara + 1 '-setting DDRAM address &H40 Portb = Command_enable Porta = Command_ddram_&H40 + I Waitms 10 Portb = Command_diable '-write data down Portb = Command_write_data Porta = Write_char + C Waitms 10 Portb = Command_diable '-C=C+1 I=I+1 If I = 20 Then I = 0 If C = 40 Then C = 0 Next J '-end program End Page 13 of 14 EL 'if DDRAM address is end then come back &H00. D ' Ps. You should down load free BASCOM-AVR DEMO compile from http://www.mcselec.com/ 9 Precaution in Design (1) Please do not give a stress on the module which cause damage on the metal, plastic, and pled glass. (2) Polarizer is easily scratched and should be carefully handled then. Please do not touch the polarizer use hard material, such as tweezers, pencil lead and glass. Please do not touch it by barehand. (3) This module is easily damaged when suffers from static discharge, please take care of static electricity and insure human body grounding. (4) The Half-Brightness Decay Life will longer than 10K hours when module operate in room temp.