PCF8591 PCA8591 DIP16 PCA8591T 7Z80959 7Z80960 7Z80961 7Z80963 MBA605 7Z80968 - Datasheet Archive

 

Product specification 8-bit A/D and D/A converter PCF8591 CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING

 

Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION 7.1 Addressing 7.2 Control byte 7.3 D/A conversion 7.4 A/D conversion 7.5 Reference voltage 7.6 Oscillator 8 CHARACTERISTICS OF THE l2C-BUS 8.1 Bit transfer 8.2 Start and stop conditions 8.3 System configuration 8.4 Acknowledge 8.5 l2C-bus protocol 9 LIMITING VALUES 10 HANDLING 11 DC CHARACTERISTICS 12 D/A CHARACTERISTICS 13 A/D CHARACTERISTICS 14 AC CHARACTERISTICS 15 APPLICATION INFORMATION 16 PACKAGE OUTLINES 17 SOLDERING 17.1 Introduction 17.2 DIP 17.2.1 Soldering by dipping or by wave 17.2.2 Repairing soldered joints 17.3 SO 17.3.1 Reflow soldering 17.3.2 Wave soldering 17.3.3 Repairing soldered joints 18 DEFINITIONS 19 LIFE SUPPORT APPLICATIONS 20 PURCHASE OF PHILIPS l2C COMPONENTS 1998 Jul 02 2 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 1 FEATURES • Single power supply • Operating supply voltage 2.5 V to 6 V • Low standby current • Serial input/output via l2C-bus • Address by 3 hardware address pins • Sampling rate given by l2C-bus speed • 4 analog inputs programmable as single-ended or differential inputs • Auto-incremented channel selection • Analog voltage range from Vss to Vqd • On-chip track and hold circuit • 8-bit successive approximation A/D conversion • Multiplying DAC with one analog output. 2 APPLICATIONS • Closed loop control systems • Low power converter for remote data acquisition • Battery operated equipment • Acquisition of analog values in automotive, audio and TV applications. 4 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION PCA8591 PCA8591 P DIP16 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 PCA8591T PCA8591T S016 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 I i B j Lin BUS 3 GENERAL DESCRIPTION The PCF8591 PCF8591 is a single-chip, single-supply low power 8-bit CMOS data acquisition device with four analog inputs, one analog output and a serial l2C-bus interface. Three address pins AO, A1 and A2 are used for programming the hardware address, allowing the use of up to eight devices connected to the l2C-bus without additional hardware. Address, control and data to and from the device are transferred serially via the two-line bidirectional l2C-bus. The functions of the device include analog input multiplexing, on-chip track and hold function, 8-bit analog-to-digital conversion and an 8-bit digital-to-analog conversion. The maximum conversion rate is given by the maximum speed of the l2C-bus. 1998 Jul 02 3 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 5 BLOCK DIAGRAM uj oc > q Z Q >m o to o o T- csj en Z Z Z Z < < < < ZJ o < 1998 Jul 02 3 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 6 PINNING SYMBOL PIN DESCRIPTION AINO 1 AIN1 2 analog inputs AIN2 3 (A/D converter) AIN3 4 AO 5 A1 6 hardware address A2 7 Vss 8 negative supply voltage SDA 9 l2C-bus data input/output SCL 10 l2C-bus clock input ose 11 oscillator input/output EXT 12 external/internal switch for oscillator input AGND 13 analog ground Vref 14 voltage reference input AOUT 15 analog output (D/A converter) Vdd 16 positive supply voltage AINO [T u ill VDD AIN1 [T li] AOUT AIN2 [T J4] VREF AIN3 [T Ti] AGND PCF8591 PCF8591 AO [T EXT A1 [T TT| ose A2 [T "io] SCL vss \J_ "T| SDA 7Z80959 7Z80959.1 Fig.2 Pinning diagram. 1998 Jul 02 5 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 7 FUNCTIONAL DESCRIPTION 7.1 Addressing Each PCF8591 PCF8591 device in an l2C-bus system is activated by sending a valid address to the device. The address consists of a fixed part and a programmable part. The programmable part must be set according to the address pins AO, A1 and A2. The address always has to be sent as the first byte after the start condition in the l2C-bus protocol. The last bit of the address byte is the read/write-bit which sets the direction of the following data transfer (see Figs 3, 15 and 16). MSB LSB 1 u 0 1 A2 A1 AO R/W fixed part programmable part 7Z80960 7Z80960 Fig.3 Address byte. 7.2 Control byte The second byte sent to a PCF8591 PCF8591 device will be stored in its control register and is required to control the device function. The upper nibble of the control register is used forenabling the analog output, and for programming the analog inputs as single-ended or differential inputs. The lower nibble selects one of the analog input channels defined by the upper nibble (see Fig.4). If the auto-increment flag is set the channel number is incremented automatically after each A/D conversion. If the auto-increment mode is desired in applications where the internal oscillator is used, the analog output enable flag in the control byte (bit 6) should be set. This allows the internal oscillator to run continuously, thereby preventing conversion errors resulting from oscillator start-up delay. The analog output enable flag may be reset at other times to reduce quiescent power consumption. The selection of a non-existing input channel results in the highest available channel number being allocated. Therefore, if the auto-increment flag is set, the next selected channel will be always channel 0. The most significant bits of both nibbles are reserved for future functions and have to be set to 0. After a Power-on reset condition all bits of the control register are reset to 0. The D/A converter and the oscillator are disabled for power saving. The analog output is switched to a high-impedance state. 1998 Jul 02 6 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 MSB LSB CONTROL BYTE A/D CHANNEL NUMBER: 00 channel 0 01 channel 1 10 channel 2 11 channel 3 AUTOINCREMENT FLAG: (switched on if 1) u ANALOGUE INPUT PROGRAMMING: 00 Four single ended inputs AIN0 - AIN1 - AIN2 - AIN3 - 01 Three differential inputs channel 0 channel 1 channel 2 channel 3 channel 0 channel 1 channel 2 10 Single ended and differential mixed AIN0 - channel 0 AIN1 - channel 1 AIN2 channel 2 AIN3 i> 11 Two differential inputs AINO - AIN1 AIN2 AIN3 !> [> channel 0 channel 1 ANALOGUE OUTPUT ENABLE FLAG: (analogue output active if 1) 7Z80961 7Z80961 Fig.4 Control byte. 1998 Jul 02 7 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 7.3 D/A conversion The third byte sent to a PCF8591 PCF8591 device is stored in the DAC data register and is converted to the corresponding analog voltage using the on-chip D/A converter. This D/A converter consists of a resistor divider chain connected to the external reference voltage with 256 taps and selection switches. The tap-decoder switches one of these taps to the DAC output line (see Fig.5). The analog output voltage is buffered by an auto-zeroed unity gain amplifier. This buffer amplifier may be switched on or off by setting the analog output enable flag of the control register. In the active state the output voltage is held until a further data byte is sent. The on-chip D/A converter is also used for successive approximation A/D conversion. In order to release the DAC for an A/D conversion cycle the unity gain amplifier is equipped with a track and hold circuit. This circuit holds the output voltage while executing the A/D conversion. The output voltage supplied to the analog output AOUT is given by the formula shown in Fig.6. The waveforms of a D/A conversion sequence are shown in Fig.7. Fig.5 DAC resistor divider chain. 1998 Jul 02 8 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 MSB D7 06 â-¡5 D4 D3 D2 D1 DO LS8 7Z80963 7Z80963 DAC data register vAOUT VDD + VREF + VAGND"" VSS VREF"VAGNO J. i AOUT = AGND +-256- ¿ Dl X 2 ¡ = 0 -I-1-1-1-t- 00 01 02 03 04 -I-1-»- FE FF HEX CODE Fig.6 DAC data and DC conversion characteristics. PROTOCOL S ADDRESS 0 A CONTROL BYTE A DATA BYTE 1 A DATA BYTE 2 A ^AAILAÛA Aim. AUA AA -»i nm_m n nrnn nr"m r vAOUT HIGH IMPEDANCE STATE OR PREVIOUS VALUE HELD IN DAC REGISTER PREVIOUS VALUE HELD IN DAC REGISTER VALUE OF DATA BYTE 1 time Fig.7 D/A conversion sequence. 1998 Jul 02 8 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 7.4 A/D conversion The A/D converter makes use of the successive approximation conversion technique. The on-chip D/A converter and a high-gain comparator are used temporarily during an A/D conversion cycle. An A/D conversion cycle is always started after sending a valid read mode address to a PCF8591 PCF8591 device. The A/D conversion cycle is triggered at the trailing edge of the acknowledge clock pulse and is executed while transmitting the result of the previous conversion (see Fig.8). Once a conversion cycle is triggered an input voltage sample of the selected channel is stored on the chip and is converted to the corresponding 8-bit binary code. Samples picked up from differential inputs are converted to an 8-bit two's complement code (see Figs 9 and 10). The conversion result is stored in the ADC data register and awaits transmission. If the auto-increment flag is set the next channel is selected. The first byte transmitted in a read cycle contains the conversion result code of the previous read cycle. After a Power-on reset condition the first byte read is a hexadecimal 80. The protocol of an l2C-bus read cycle is shown in Chapter 8, Figs 15 and 16. The maximum A/D conversion rate is given by the actual speed of the l2C-bus. S ADDRESS 1 A I DATA BYTE 0 * DATA BYTE 1 A I DATA BYTE 2 A I »miuu;i juui iuui jvL -innrn n n nrm nr"m r SAMPLING BYTE 1 CONVERSION OF BYTE 1 SAMPLING BYTE 2 CONVERSION OF BYTE 2 H I- H h TRANSMISSION OF PREVIOUSLY CONVERTED BYTE TRANSMISSION OF BYTE 1 SAMPLING ' BYTE 3 CONVERSION OF BYTE 3 TRANSMISSION OF BYTE 2 Fig.8 A/D conversion sequence. 1998 Jul 02 10 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 vlsb Fig.9 A/D conversion characteristics of single-ended inputs. Fig.10 A/D conversion characteristics of differential inputs. 1998 Jul 02 11 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 7.5 Reference voltage For the D/A and A/D conversion either a stable external voltage reference or the supply voltage has to be applied to the resistor divider chain (pins VREF and AGND). The AGND pin has to be connected to the system analog ground and may have a DC off-set with reference to Vss- A low frequency may be applied to the Vref and AGND pins. This allows the use of the D/A converter as a one-quadrant multiplier; see Chapter 15 and Fig.6. The A/D converter may also be used as a one or two quadrant analog divider. The analog input voltage is divided by the reference voltage. The result is converted to a binary code. In this application the user has to keep the reference voltage stable during the conversion cycle. 7.6 Oscillator An on-chip oscillator generates the clock signal required for the A/D conversion cycle and for refreshing the auto-zeroed buffer amplifier. When using this oscillator the EXT pin has to be connected to Vss- At the OSC pin the oscillator frequency is available. If the EXT pin is connected to Vqd the oscillator output OSC is switched to a high-impedance state allowing the user to feed an external clock signal to OSC. 1998 Jul 02 12 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 8 CHARACTERISTICS OF THE l2C-BUS The l2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. 8.1 Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as a control signal. SDA SCL L X X data line stable; data valid change of data allowed A Fig. 11 Bit transfer. 8.2 Start and stop conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is defined as the stop condition (P). SDA \ / \ / SCL S "A / 1 p START condition STOP condition SDA SCL Fig.12 Definition of START and STOP condition. 1998 Jul 02 13 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 8.3 System configuration A device generating a message is a 'transmitter', a device receiving a message is the 'receiver'. The device that controls the message is the 'master' and the devices which are controlled by the master are the 'slaves'. MBA605 MBA605 Fig.13 System configuration. 8.4 Acknowledge The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited. Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate a stop condition. DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER SCL FROM MASTER clock pulse for acknowledgement Fig. 14 Acknowledgement on the l2C-bus. 1998 Jul 02 14 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 8.5 l2C-bus protocol After a start condition a valid hardware address has to be sent to a PCF8591 PCF8591 device. The read/write bit defines the direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the stop condition (P) and the acknowledge bit (A) refer to the l2C-bus characteristics. In the write mode a data transfer is terminated by sending either a stop condition or the start condition of the next data transfer. Acknowledge from PCF8591 PCF8591 Acknowledge from PCF8591 PCF8591 Acknowledge from PCF8591 PCF8591 -1- ADDRESS 0 CONTROL BYTE DATA BYTE P,S N = 0 10 M DATA BYTES 7Z80968 7Z80968 Fig.15 Bus protocol for write mode, D/A conversion. Acknowledge from PCF8591 PCF8591 Acknowledge from master No acknowledge S ADDRESS 1 A DATA BYTE A LAST DATA BYTE 1 P N = 0 to M DATA BYTES 7Z80969 7Z80969 Fig. 16 Bus protocol for read mode, A/D conversion. 1998 Jul 02 15 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT Vdd supply voltage (pin 16) -0.5 +8.0 V V, input voltage (any input) -0.5 VDD + 0.5 V l| DC input current - ±10 mA lo DC output current - ±20 mA Idd, Iss Vdd or Vss current - ±50 mA Ptot total power dissipation per package - 300 mW Po power dissipation per output - 100 mW Tamb operating ambient temperature -40 +85 °C Tstg storage temperature -65 + 150 °C 10 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under "Handling MOS Devices". 1998 Jul 02 16 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 11 DC CHARACTERISTICS VDD = 2.5 V to 6 V; VSs = 0 V; Tamb = -40 °C to +85 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply Vdd supply voltage (operating) 2.5 - 6.0 V I dd supply current standby V| = Vss or Vdd; no load - 1 15 HA operating, AOUT off fscL = 100 kHz - 125 250 HA operating, AOUT active fscL = 100 kHz - 0.45 1.0 mA VpOR Power-on reset level note 1 0.8 - 2.0 V Digital inputs/output: SCL, S DA, AO, A1, A2 V|l LOW level input voltage 0 - 0.3 x VDD V V|h HIGH level input voltage 0.7 X VDD - Vdd V II leakage current AO, A1, A2 V| = Vss to Vdd -250 - +250 nA SCL, SDA V| = Vss to VDD -1 - +1 HA c¡ input capacitance - - 5 PF "OL LOW level SDA output current VQL = 0.4 V 3.0 - - mA Reference voltage inputs Vref reference voltage Vref > VagndJ note 2 Vss + 1 -6 - Vdd V Vagnd analog ground voltage Vref > VagndJ note 2 Vss - Vdd - 0.8 V Ili input leakage current -250 - +250 nA Rref input resistance pins Vref and AGND - 100 - k£2 Oscillator: OSC, EXT Ili input leakage current - - 250 nA fose oscillator frequency 0.75 - 1.25 MHz Notes 1. The power on reset circuit resets the l2C-bus logic when Vdd is less than Vpor. 2. A further extension of the range is possible, if the following conditions are fulfilled: Vref + Vagnd>0 8V Vnn-VREF + VAGND>0 4V 2 L) L) 2 1998 Jul 02 17 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 12 D/A CHARACTERISTICS VDD = 5.0 V; Vss = 0 V; VREF = 5.0 V; VAGND = 0 V; RL = 10 k£2; CL = 100 pF; Tamb = -40 °C to +85 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Analog output VOA output voltage no resistive load Vss - Vdd V Ri_ = 10 k£2 Vss - 0.9 x Vdd V Ilo output leakage current AOUT disabled - - 250 nA Accuracy ose offset error Tamb - 25 °C - - 50 mV Le linearity error - - ±1.5 LSB Ge gain error no resistive load - - 1 % ídac settling time to 1/2 LSB full scale step - - 90 US fdac conversion rate - - 11.1 kHz SNRR supply noise rejection ratio f = 100 Hz; Vddn = 0.1 x Vpp - 40 - dB 13 A/D CHARACTERISTICS VDD = 5.0 V; Vss = 0 V; VREF = 5.0 V; VAGND = 0 V; Rs = 10 k£2; Tamb = -40 °C to +85 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Analog inputs Via analog input voltage Vss - Vdd V Ilia analog input leakage current - - 100 nA c|a analog input capacitance - 10 - PF C|d differential input capacitance - 10 - PF Vis single-ended voltage measuring range Vagnd - Vref V V|d differential voltage measuring range; Vfs = Vref - Vagnd -vfs 2 +vfs 2 V Accuracy ose offset error Tamb - 25 °C - - 20 mV Le linearity error - - ±1.5 LSB Ge gain error - - 1 % GSe small-signal gain error AV¡ = 16 LSB - - 5 % CMRR common-mode rejection ratio - 60 - dB SNRR supply noise rejection ratio f = 100 Hz; Vddn = 0-1 x VPP - 40 - dB ïadc conversion time - - 90 HS Udc sampling/conversion rate - - 11.1 kHz 1998 Jul 02 18 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 200 'DD e He L Lp Q V w y z(1> 9 mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 8° inches 0.10 0.012 0.004 0.096 0.089 0.01 0.019 0.014 0.013 0.009 0.41 0.40 0.30 0.29 0.050 0.419 0.394 0.055 0.043 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION REFERENCES EUROPEAN PROJECTION ISSUE DATE I EC JEDEC EIAJ SOT162-1 075E03 075E03 MS-013AA MS-013AA 05 01 24 97-05-22 1998 Jul 02 23 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 PCF8591 17 SOLDERING 17.1 Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). 17.2 DIP 17.2.1 Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max)- If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 17.2.2 Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. 17.3 SO 17.3.1 Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 17.3.2 wave soldering Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solderthieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 17.3.3 Repairing soldered joints Fix the component by first soldering two diagonally-opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 1998 Jul 02 24