NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
PCF8591 PCF8591P S016L 7Z80959 7ZB09S0 7ZB0961 7Z80963 7ZB0969 - Datasheet Archive
Preli minary specification 8-Bit A/D and D/A converter PCF8591 GENERAL DESCRIPTION The PCF8591 is a single chip, single supply
Philips Semiconductors Integrated Circuits Preli minary specification 8-Bit A/D and D/A converter PCF8591 PCF8591 GENERAL DESCRIPTION The PCF8591 PCF8591 is a single chip, single supply low power 8-bit CMOS data acquisition device with four analogue inputs, one analogue output and a serial l2C bus interface. Three address pins AO, A1 and A2 are used for programming the hardware address, allowing the use of up to eight devices connected to the l2C bus without additional hardware. Address, control and data to and from the device are transferred serially via the two-line bidirectional bus (l2C). The functions of the device include analogue input multiplexing, on-chip track and hold function, 8-bit analogue-to-digital conversion and an 8-bit digital-to-analogue conversion. The maximum conversion rate is given by the maximum speed of the l2C bus. Features • Single power supply • Operating supply voltage 2,5 V to 6 V • Low standby current • Serial input/output via l2C bus • Address by 3 hardware address pins • Sampling rate given by l2C bus speed • 4 analogue inputs programmable as single-ended or differential inputs • Auto-incremented channel selection • Analogue voltage range from Vgs to Vqd • On-chip track and hold circuit • 8-bit successive approximation A/D conversion • Multiplying DAC with one analogue output APPLICATIONS Closed loop control systems; low power converter for remote data acquisition; battery operated equipment; acquisition of analogue values in automotive, audio and TV applications. PACKAGE OUTLINES PCF8591P PCF8591P:16-lead DIL; plastic(SOT38). PCF8591 PCF8591 T:16-lead mini-pack; plastic (S016L S016L; SOT162A). August 1986 590 ?110flSb 0076125 TS3 â- This Material Copyrighted By Its Respective Manufacturer Philips Semiconductors Integrated Circuits Preli minary specification 8-Bit A/D and D/A converter PCF8591 PCF8591 August 1986 591 â- 711002b DOTfl^b A low frequency may be applied to the Vref and AGND pins. This allows the use of the D/A converter as a one-quadrant multiplier; see Application Information and Fig. 6. The A/D converter may also be used as a one or two quadrant analogue divider. The analogue input voltage is divided by the reference voltage. The result is converted to a binary code. In this application the user has to keep the reference voltage stable during the conversion cycle. Oscillator An on-chip oscillator generates the clock signal required for the A/D conversion cycle and for refreshing the auto-zeroed buffer amplifier. When using this oscillator the EXT pin has to be connected to Vss-At the OSC pin the oscillator frequency is available. If the EXT pin is connected to Vqd the oscillator output OSC is switched to a high impedance state allowing the user to feed an external clock signal to OSC. Bus protocol After a start condition a valid hardware address has to be sent to a PCF8591 PCF8591 device. The read/write bit defines the direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the stop condition (P) and the acknowledge bit (A) refer to the IJC bus characteristics. In the write mode a data transfer ¡s terminated by sending either a stop condition or the start condition of the next data transfer. Acknowledge Acknowledge Acknowledge from PCF8591 PCF8591 from PCF8591 PCF8591 from PCF8591 PCF8591 L_JL_J s ADDRESS 0 A CONTROL BYTE A DATA BYTE A N =0 to M DATA BYTES Fig. 10a Bus protocol for write mode, D/A conversion. Acknowledge Acknowledge No acknowledge from PCF8591 PCF8591 from master i S â- . i ADDRESS 1 A DATA BYTE J A LAST DATA BYTE 1 P N=0tO M DATA BYTES 7ZB0969 7ZB0969 Fig. 10b Bus protocol for read mode, A/D conversion. August 1986 598 â- 7110Ã-2L â-¡â-¡7ÛT33 OST m This Material Copyrighted By Its Respective Manufacturer Philips Semiconductors Integrated Circuits Preli minary specification 8-Bit A/D and D/A converter PCF8591 PCF8591 CHARACTERISTICS OF THE l2C BUS The l2C bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. Bit transfer One data bit is transfered during each clock pulse. The data on the SDA line must remain stable durine the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as a control signal. z SCL data line stable : data valid X change of data allowed X. A Fig. 11 Bit transfer. Start and stop conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH, is defined as the start condition 0 8 v and v _ VREF + VAGND > 0 4 v 2 2 August 1986 603 â- 711002b 0070^30 b01 m This Material Copyrighted By Its Respective Manufacturer Philips Semiconductors Integrated Circuits Preli minary specification 8-Bit A/D and D/A converter PCF8591 PCF8591 A/D CHARACTERISTICS Vdd = 5,0 V; Vss = 0 V; Vref = 5.0 V; Vagnd = 0 V; RSource - 10 ki2; Tamb = -40 °c to +85 °c unless otherwise specified parameter conditions symbol min. typ. max. unit Analogue inputs Input voltage range via VSS - vdd v Input current leakage iia - - 100 nA Input capacitance c|A - 10 - pf Input capacitance differential c|d - 10 - pf Single-ended voltage measuring range vis vagnd - Vref v Differential voltage measuring range; Vfs = vref -vfs +vfs - vagimd v|d 2 2 v Accuracy Offset error Tamb - 25 °C OSe - - 20 mv Linearity error Le - - ±1,5 LSB Gain error Ge - - 1 % Gain error small-signal; % AVIN = 16 LSB gse - - 5 Rejection ratio common-mode cmrr - 60 - dB Supply noise rejection at f = 100 Hz; 40 dB vddn = O.lxVpp snrr - - Conversion time *adc - - go MS Sampling/conversion rate fadc - - 11,1 kHz Note 1. The power on reset circuit resets the Ijc bus logic when vdd » less than vpor- August 1986 6O4 â- 7110fl2b 0073^)3^ SMÃ" â- This Material Copyrighted By Its Respective Manufacturer Philips Semiconductors Integrated Circuits Preli minary specification 8-Bit A/D and D/A converter PCF8591 PCF8591 200 «DD if a) 150 100 50 160 5 6 VDD (a) internal oscillator; tamb = + 27 °C. 'od 1/ia) 120 80 40 - 4 ♦ 85 °c + 2 7°C 5 6 vdd (vi (b) external oscillator. Fig. 16 Operating supply current against supply voltage (analogue output disabled). s oo -§ 400 a E s 300 3 o < a 200 100 v V \ I \ 00 02 04 06 08 oa hex input code (a) output impedance near negative power rail Tamb = + 27 °C. 500 400 300 200 100 t bo co do eo fo ff hex input code (b) output impedance near positive power rail; ^amb = + 27 °c. Fig. 17 Output impedance of analogue output buffer (near power rails). The x-axis represents the hex input-code equivalent of the output voltage. August 1986 â- 7110fl2t 0070^40 2bT 605 This Material Copyrighted By Its Respective Manufacturer Philips Semiconductors Integrated Circuits_ Preliminary specification 8-Bit A/D and D/A converter PCF8591 PCF8591 APPLICATION INFORMATION Inputs must be connected to Vss or Vdd when not in use- Analogue inputs may also be connected to AGND or Vref. In order to prevent excessive ground and supply noise and to minimize cross-talk of the digital to analogue signal paths the user has to design the printed-circuit board layout very carefully. Supply lines common to a PCF8591 PCF8591 device and noisy digital circuits and ground loops should be avoided. Decoupling capacitors {> 10 //F) are recommended for power supply and reference voltage inputs. ANALOGUE GROUND J_ DIGITAL GROUND l2C BUS August 1986 â- 7110a2b 007ßim 1 Tb Fig. 18 Application diagram. 606 This Material Copyrighted By Its Respective Manufacturer