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LT1017MJ8/883 Linear Technology LT1017 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LM108AJ8 Linear Technology LM108A - Operational Amplifiers; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LT1175CDWF#MILDWF Linear Technology LT1175 - 500mA Negative Low Dropout Micropower Regulator; Pins: 5 visit Linear Technology - Now Part of Analog Devices
LT1018MJ8/883 Linear Technology LT1018 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LTC1041MJ8/883 Linear Technology LTC1041 - BANG-BANG Controller; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LTC2905HDDB#TRPBF Linear Technology LTC2905 - Precision Dual Supply Monitor with Pin-Selectable Thresholds; Package: DFN; Pins: 8; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy

PAC PIN DIAGRAM

Catalog Datasheet MFG & Type PDF Document Tags

tx2/rx2

Abstract: microsd protocol I/O Units SNAP PAC S-Series Controllers The network shown in this diagram requires PAC Control , actuators, location #2 This diagram shows a SNAP PAC S-series controller connected to multiple Opto 22 , . Sensors and actuators, location #3 The diagram also shows a PC running PAC Control Professional; the , Serial-based I/O Units The network shown in this diagram requires PAC Control Professional and PAC Display , S-series Controller Segmenting Wired Ethernet Networks The network shown in this diagram requires PAC
Opto 22
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Brain wave signal sensor

Abstract: CR2032 high-density digital modules. System Architecture For the network shown in this diagram, either PAC Project , switch SNAP PAC R-series In this diagram, the SNAP PAC R-series controller uses one network , Architecture (continued) The network shown in this diagram requires PAC Control Professional, PAC Display , , network #1 DATA SHEET Form 1594-100419 This diagram shows two SNAP PAC I/O units connected , PAC R-Series Controllers System Architecture (continued) The network shown in this diagram requires
Opto 22
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PAC PIN DIAGRAM

Abstract: serial number of internet manager months from date of manufacture Pin Use See diagram on page 3 for location of pin 1. Use , analog, digital, and other serial modules on any SNAP PAC rack with a SNAP PAC brain (EB or SB) or , data to other parts of an Opto 22 SNAP PAC SystemTM or to another system (such as a Modbus® system or an OPC client). SNAP PAC racks accommodate up to 4, 8, 12, or 16 I/O modules, with a maximum of 8 , after the first rising edge. See the following diagram. Example of data sample with out-of-range error
Opto 22
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ARRAY MICROSYSTEMS

Abstract: 16 point DIF FFT using radix 4 fft shown in the block diagram on page 1, the core of the PaC consists of five address generators which are , versatility of the PaC (see block diagram). These registers supply various parameters to the PaC describing , pin, after which the PaC manages the complete system. The PaC executes the DSP algorithm by either , Programmable array Controller (PaC) FEATURES: 33"^ â'¢ Full address generation capability for radix-2, ratix-4, The Programmable array Controller (PaC) is designed to ope rate with the Digital array Signal
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OCR Scan

ts992

Abstract: dfp 26 pin OE pin. 3.2.2 Timing Description - 1024 Channel PAC/ SMX Configuration In parallel-to-serial mode, the MCB pin determines whether a positive or negative clock edge latches data into the PAC. MCB , Serial-to-Parallel Conversion Timing The timing diagram shown in Figure 7 illustrates the PAC and SMX , ® Application Note MSAN-135 Design of Large Digital Switching Matrices using the SMX/PAC , 3.2.2 Timing Diagram Description 3.2.3 Throughput Delay Considerations 3.2.4 Programming the 1024
Mitel Semiconductor
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ts992 dfp 26 pin TS1022 MT9080 mcb circuit diagram MT9085
Abstract: with external PAC circuit · Input/Output matching 50 internal (with DC blocking) · 22-pin package - , (PIN) Supply Voltage (VCC), Standby, VAPC 0.3 V, PAC ENABLE 0.2 V Control Voltage (VAPC) Storage , ZAPC VPE VPE IPE VBS VBS IBS VBS 3.0 V VCC 4.5 V VAPC 0.3 V PAC ENABLE 0.2 V TCASE = +25 °C PIN , ENABLE > 2.0 V TCASE = ­20 °C to +100 °C (See Table 2 for multislot.) PIN = 0 dBm VCC = 4.5 V PAC ENABLE , controlled by VAPC PIN = 6 dBm VAPC = 0.3 V PAC ENABLE 0.2 V PIN = 6 dBm VAPC 0.35 V PAC ENABLE 2.0 V Time Skyworks Solutions
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SKY77326 GSM900 DCS1800

SKY77326

Abstract: DCS1800 2.2:1 POUT STANDBY PIN = 6 dBm VAPC = 0.3 V PAC ENABLE 0.2 V - ­40 ­35 POUT ENABLED PIN = 6 dBm VAPC 0.35 V PAC ENABLE 2.0 V - ­30 ­16 Time from POUT = ­10 dBm to , VOLTAGE VCC = 4.5 V PAC ENABLE > 2.0 V TCASE = ­20 °C to +100 °C (See Table 2 for multislot.) PIN = , 2.0:1 POUT STANDBY PIN = 6 dBm VAPC = 0.3 V PAC ENABLE 0.2 V - ­40 ­35 POUT ENABLED PIN = 6 dBm VAPC 0.35 V PAC ENABLE 2.0 V - ­40 ­20 Time from POUT = ­10 dBm to
Skyworks Solutions
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SKYWORKS pam

MSAN-135

Abstract: MT9080 OE pin. 3.2.2 Timing Description - 1024 Channel PAC/ SMX Configuration In parallel-to-serial mode, the MCB pin determines whether a positive or negative clock edge latches data into the PAC. MCB , Serial-to-Parallel Conversion Timing The timing diagram shown in Figure 7 illustrates the PAC and SMX , Application Note MSAN-135 Design of Large Digital Switching Matrices using the SMX/PAC ISSUE 3 , Switching 3.2 Serial Crosspoint Switch Matrix 3.2.1 Circuit Description 3.2.2 Timing Diagram Description
Zarlink Semiconductor
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103146a

Abstract: SKY77500 on this pin, PAC Enable, and Analog Power Control (APC) allow for high isolation between the antenna , 0.3 V PAC ENABLE 0.2 V TCASE = +25 °C PIN ­60 dBm µA - 15 - Closed Loop VAPC Input , multislot.) PIN = 0 dBm 30.5 32.0 - POUT MAX HIGH VOLTAGE VCC = 4.8 V PAC ENABLE > 2.0 V , PIN = 6 dBm VAPC 0.3 V PAC ENABLE 0.2 V TX_RX 0.2 V Mode = GSM_RX (See Table 3) - ­60 ­39 POUT ENABLED_TX PIN = 6 dBm VAPC 0.3 V PAC ENABLE 2.0V TX_RX 2.0 V Mode = GSM_TX (See
Skyworks Solutions
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SKY77500 PCS1900 103146a J-STD-020B GSM850/900 GSM850 DCS1800/PCS1900

D0D12

Abstract: ts992 Channel PAC/ SMX Configuration In parallel-to-serial mode, the MCB pin determines whether a positive , Pulse (CFPo) issued by the PAC. 3.2.2.1 Serial-to-Parallel Conversion Timing The timing diagram shown , ® Application Note MSAN-135 Design of Large Digital Switching Matrices using the SMX/PAC , Diagram Description 3.2.3 Throughput Delay Considerations 3.2.4 Programming the 1024 Channel Serial , 4.2 Serial Interface to SMX 4.2.1 Circuit Description 4.2.2 PAC/SMX Timing Description 4.2.3
Mitel Semiconductor
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D0D12

SKY77324

Abstract: DCS1800 with external PAC circuit · Input/Output matching 50 internal (with DC blocking) · 22-pin package , allows initial turn-on of PAC circuitry to minimize battery drain. Figure 1. Functional Block Diagram , multislot.) PIN = 0 dBm 32.0 34.0 - POUT MAX HIGH VOLTAGE VCC = 4.5 V PAC ENABLE > 2.0 V , 0.3 V PAC ENABLE 0.2 V - ­40 ­35 POUT ENABLED PIN = 6 dBm VAPC 0.35 V PAC ENABLE , multislot.) PIN = 0 dBm 32.0 33.0 - POUT MAX HIGH VOLTAGE VCC = 4.5 V PAC ENABLE > 2.0 V
Skyworks Solutions
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SKY77324

SKY77500

Abstract: DCS1800 respective RF switch (TX = logic 1). Proper timing of the logic on this pin, PAC Enable, and Analog Power , 2 for multislot.) PIN = 0 dBm 30.5 32.0 - POUT MAX HIGH VOLTAGE VCC = 4.8 V PAC , POUT STANDBY PIN = 6 dBm VAPC 0.3 V PAC ENABLE 0.2 V TX_RX 0.2 V Mode = GSM_RX (See Table 3) - ­60 ­39 POUT ENABLED_TX PIN = 6 dBm VAPC 0.3 V PAC ENABLE 2.0V TX_RX 2.0 V Mode , 4.8 V PAC ENABLE > 2.0 V TCASE = ­20 °C to +100 °C (See Table 2 for multislot.) PIN = 0 dBm
Skyworks Solutions
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Abstract: , OptoServer, OptoTerminal, OptoUtilities, PAC Control, PAC Display, PAC Manager, PAC Project, SNAP Ethernet I/O, SNAP I/O, SNAP OEM I/O, SNAP PAC System, SNAP Simple I/O, SNAP Ultimate I/O, and Wired+Wireless , communication modules, all designed for use with Opto 22â'™s SNAP PAC System: â'¢ SNAP-SCM-232 â , network. All SNAP serial communication modules snap into Opto 22 SNAP PAC mounting racks right beside , Network (CAN) that allows your SNAP PAC system to receive data from CAN devices. Once the module is Opto 22
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SNAP-SCM-485-422 800-321-OPTO 800-832-OPTO 800-TEK-OPTO

SKY77324

Abstract: DCS1800 turn-on of PAC circuitry to minimize battery drain. · 22-pin package - Small outline 6 mm x 8 mm - , VCC 4.5 V VAPC 0.3 V PAC ENABLE 0.2 V TCASE = +25 °C PIN ­60 dBm - 2.5 10 µA , VAPC - 1.5:1 2.0:1 POUT STANDBY PIN = 6 dBm VAPC = 0.3 V PAC ENABLE 0.2 V - ­40 ­35 POUT ENABLED PIN = 6 dBm VAPC 0.35 V PAC ENABLE 2.0V - ­30 ­16 Time , 4.5 V PAC ENABLE > 2.0 V TCASE = ­25 °C to +100 °C (See Table 2 for multislot.) PIN = 0 dBm
Skyworks Solutions
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TS992

Abstract: TS1021 OE pin. 3.2.2 Timing Description - 1024 Channel PAC/ SMX Configuration In parallel-to-serial mode, the MCB pin determines whether a positive or negative clock edge latches data into the PAC. MCB , Serial-to-Parallel Conversion Timing The timing diagram shown in Figure 7 illustrates the PAC and SMX , Application Note MSAN-135 Design of Large Digital Switching Matrices using the SMX/PAC ISSUE 3 , Switching 3.2 Serial Crosspoint Switch Matrix 3.2.1 Circuit Description 3.2.2 Timing Diagram Description
Zarlink Semiconductor
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TS1021 A11-A15 C16128 C30S0 TS991
Abstract: . 3.2.2.1 Serial-to-Parallel Conversion Timing The timing diagram shown in Figure 7 illustrates the PAC and , ® Application Note MSAN-135 Design of Large Digital Switching Matrices using the SMX/PAC , 3.2.2 Timing Diagram Description 3.2.3 Throughput Delay Considerations 3.2.4 Programming the 1024 , ) and MT9085 Parallel Access Circuit (PAC) address these shortcomings to provide a cost effective and , through the device. Serial interface to the switch, if necessary, can be provided by the MT9085 (PAC). The Mitel Semiconductor
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HIGH VOLTAGE capacitor 4kv

Abstract: pac 26 1Q/R PAC GAME 1Q Block Diagram PAC GAME-1 9 20 13 16 12 17 18 MIDI/ 11 19 Game-port , PAC GAME-1 CALIFORNIA MICRO DEVICES MIDI (MUSICAL INSTRUMENT DIGITAL INTERFACE) GAME PORT , from any possible external charges such as static electricity. The PAC GAME-1 provides filtering and , 0OC to 70OC >4KV* >8KV* 28-pin QSOP 1 NC NC 28 2 NC NC 27 JOY3_IN 26 , trademark of California Micro Devices. P/Active® is a registered trademark, and PAC reserved. 12 / 98 12
California Micro Devices
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HIGH VOLTAGE capacitor 4kv pac 26 MIL-STD-883

microsdhc

Abstract: LT 5242 H to occur. See page 12 for a diagram of a redundant system. Also see the SNAP PAC Redundancy Option , following diagram, a SNAP PAC S-series controller is connected to Opto 22 legacy serial-based I/O units , : OVERVIEW Ethernet Link Redundancy The following diagram shows a SNAP PAC S-series controller connected , and the redundant power switch in the diagram below. PAC Redundancy Manager, a software utility for , SNAP PAC S-SERIES CONTROLLER USER'S GUIDE SNAP-PAC-S1 SNAP-PAC-S2 SNAP-PAC-S1-FM SNAP-PAC-S1-W
Opto 22
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microsdhc LT 5242 H microSDHC PINOUT Ericsson Base Station barcode reader 1592-100826--A RS-232 RS-485

A 1458 OPTO

Abstract: ethernet female connector pinout racks use an industry-standard 50-pin header connector, which allows them to be used in a variety of , SNAP-TEX-DRC10 SNAP PAC rack DIN-rail adapter clip SNAP-D4M 4-Module Position I/O Mounting Rack , Connector Pinout (female) Control Connector (50-pin male) Position Channel Position J1 , Notes 1. Even pins on control connector are connected common to +5V RTN. 2. Pin 1 of control connector J1 is connected common to +5V through jumper JP1. 3. Pin 49 of control connector J1 is connected
Opto 22
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A 1458 OPTO ethernet female connector pinout SNAP12 Optomux opto 22 controller B100 SNAP-D12M

21s07

Abstract: s07a includes an internal pull up resistor which forces the PAC 21S07A in the active mode if the power down pin , /fall time drivers. PIN DESCRIPTIONS PAC 21S07AS Pin Symbol Description 1 TERMPWR1 Termination , a OBJECTIVE CALIFORNIA MICRO DEVICES ⺠⺠⺠⺠⺠PAC 21S07A P/ACTIVE ACTIVE SCSI 2/3 , protection Pin Assignments termpwrl ITT" 1 w ,6 ttipd rim~ 2 15 tt! vref2 r2m~ 3 14 HD «e r3qe 4 13 trir9 r4i~n~ 5 12 TTIrs Rs ur 6 11 ~n~)r7 vREFi rrr 7 10 tt1r6 gnd|-|T 8 9 ""ITI termpwr2 PAC
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OCR Scan
21s07 s07a PAC21S07AS S50K 4.7 microfarad capacitor 22jL UL94V-0
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