PA080XS1 VGH-42 BHSR-02VS-1 TDK-347 - Datasheet Archive

 

PA080XS1 FOR MORE INFORMATION: AZ DISPLAYS, INC. 75 COLUMBIA, ALISO VIEJO, CA, 92656 Http://www.AZDISPLAYS.com The information

 

Version : 1.1 PA080XS1 PA080XS1 FOR MORE INFORMATION: AZ DISPLAYS, INC. 75 COLUMBIA, ALISO VIEJO, CA, 92656 Http://www.AZDISPLAYS.com The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:1 PA080XS1 PA080XS1 TECHNICAL SPECIFICATION CONTENTS NO. ITEM PAGE - Cover 1 - Contents 2 1 Application 3 2 Features 3 3 Mechanical Specifications 3 4 Mechanical Drawing of TFT-LCD module 4 5 Input / Output Terminals 5 6 Pixel Arrangement 7 7 Absolute Maximum Ratings 7 8 Electrical Characteristics 8 9 Power Sequence 19 10 Optical Characteristics 19 11 Handling Cautions 23 12 Reliability Test 24 13 Block Diagram 25 14 Packing 26 - Revision History 27 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:2 PA080XS1 PA080XS1 1. Application This technical specification applies to 8" color TFT-LCD module, PA080XS1 PA080XS1. The applications of the panel are car TV, portable DVD, GPS, multimedia applications and others AV system. 2. Features . Pixel in stripe configuration . Slim and compact . High Brightness . Image ReversionUp/Down and Left/Right 3. Mechanical Specifications Parameter Screen Size Display Format Active Area Pixel Pitch Pixel Configuration Outline Dimension Surface Treatment Weight Display mode Specifications 8(diagonal) 480×(RGB)×468 161.28(H)×117.936(V) 0.336(H)×0.252(V) Stripe 172.4(W)×132.0(H)×6.6(D)(typ.) Anti-glare 232±15g Normally white Unit Inch dot mm mm mm g The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:3 PA080XS1 PA080XS1 4. Mechanical Drawing of TFT-LCD Module The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:4 PA080XS1 PA080XS1 5. Input / Output Terminals LCD Module Connector FPC Down Connect , 32 Pins , Pitch : 0.5 mm Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Symbol STH2 OEH POL MOD R/L VDD1 CPH3 CPH2 CPH1 VSS1 VDD2 VBVGVRVSS2 VB+ VG+ VR+ VSS2 STH1 VCOM OE1 OE2 OE3 U/D CKV STVD STVU VCC VEE VGH GND I/O I/O I I I I I I I I I I I I I I/O I I I I I I I/O I/O - Description Start pulse for source driver Output enable for source driver P0larity control for column inversion Simultaneous/sequential mode select Left / Right Control for source driver Supply voltage of logic circuit for source driver Sample and shift clock for source driver Sample and shift clock for source driver Sample and shift clock for source driver Ground of logic circuit for source driver Supply voltage of analog circuit for source driver Video input B for negative polarity Video input G for negative polarity Video input R for negative polarity Ground for analog circuit for source driver Video input B for positive polarity Video input G for positive polarity Video input R for positive polarity Ground for analog circuit for source driver Start pulse for source driver Voltage for common electrode Output enable for gate driver Output enable for gate driver Output enable for gate driver Up / Down Control for gate driver Shift clock for gate driver Vertical start pulse Vertical start pulse Power supply for gate driver circuit Negative power gate driver Positive power gate driver Ground for gate driver Remark Note 5-7 Note 5-6 Note 5-7 Note 5-2 Note 5-5 Note 5-7 Note 5-1 Note 5-7 Note 5-7 Note 5-2 Note 5-3 Note 5-4 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:5 PA080XS1 PA080XS1 Note 5 ­ 1 : VCOM (TYP.) = 5.2VPP. Note 5 ­ 2 : VCC (TYP.)VDD1 (TYP.)+3.3V Note 5 ­ 3 : VEE (TYP.)-8V Note 5 ­ 4 : VGH (TYP.)+24V Note 5 ­ 5 : VDD2 (TYP.)+13V Note 5 ­ 6 : MOD=H : Simultaneous sampling MOD=L : Sequential sampling Please set CPH2 and CPH3 to GND when MOD=H Note 5 ­ 7 : STH1, STH2 and R/L mode R/L High(VDD1) Low(GND) STH1 Input Output STH2 Output Input Remark Left to Right Right to Left STVU Output Input Remark Up to Down Down to Up STVD, STVU and U/D mode U/D High(VCC) Low(GND) STVD Input Output U/D(PIN 25)=High R/L(PIN 5)=High U/D(PIN 25)=LowR/L(PIN 5)=Low The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:6 PA080XS1 PA080XS1 6. Pixel Arrangement R G B R G B R G B 1 st Line RGB R G B R G B 2 nd Line RGB R G B 3 rd Line RGB 1 st Pixel 480th pixel 1 Pixel = R G B RGB 466thLine RGB R GB RGB 467th Line RGB R GB RGB RGB 468 th Line RGB 7. Absolute Maximum Ratings The followings are maximum values , which if exceeded, may cause faulty operation or damage to the unit. Parameter Symbol Supply Voltage For Source Driver Supply Voltage For Gate Driver Analog Signal Input Level H Level L Level MIN. MAX. Unit Remark VDD2 VDD1 VCC VGH-VEE VGH +9.0 -0.3 -0.3 -0.3 -0.3 VEE VR+, VG+, VB+ VR-, VG-, VB- VGH-42 VGH-42 +4 0 +15 +7.0 +6.0 +42 +42 +0.3 V V V V V V +13 5.5 V V Note 7-1 Note 7-1 : VR,VG,VB. means analog Input Voltage The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:7 PA080XS1 PA080XS1 8. Electrical Characteristics 8-1) Recommended Driving condition for TFT-LCD panel Parameter Symbol MIN. Analog VDD2 +12 Supply Voltage For +3.0 Source Driver Logic VDD1 +4.5 VGH +22 Supply Voltage For VEE -9 Gate Driver +3.0 Logic VCC +4.5 VR+,VG+,VB+ V+, AC 11.6 V+ ,High Analog Signal input (Analog Level V- ,AC VR-,VG-,VB(Analog video-) V- ,Low 1.6 H level VIH 0.7 VDD1 Digital input voltage -0.3 L level VIL H level VOH 0.7 VDD1 Digital output voltage L level VOL -0.3 Typ. MAX. Unit Remark +13 +14 V +3.3 +3.6 V Depend on T/C +5.0 +5.5 V signal voltage +24 +26 V -8 -7 V +3.3 +3.6 V Depend on T/C +5.0 +5.5 V signal voltage +4.0 VP-P 11.9 12.2 V +4.0 VP-P 1.9 2.2 V VDD1 V 0.3 VDD1 V VDD1 V 0.3 VDD1 V DC Component VCOM VCOM DC 5.2 V of VCOM Note 8-1 Note 8-1 : PVI strongly suggests that the VCOM DC level shall be adjustable , and the adjustable level range is 5.2V±1V , every module's VCOM DC level shall be carefully adjusted to show a best image performance. 8-2) Back Light driving (JST BHSR-02VS-1 BHSR-02VS-1 ,Pin No.2) Pin No Symbol Description Remark 1 VL1 Input terminal (Hi voltage side) Wire color: pink 2 VL2 Input terminal (Low voltage side) Wire color: white Note 8-2 Note 8-2 : Low voltage side of back light inverter connects with Ground of inverter circuits. Recommended driving condition for back light Ta= 25 Parameter Symbol Min. Typ. Max. Unit Remark Lamp voltage VL 540 600 660 Vrms Lamp current IL 4 6 8 mA Note 8-3 Lamp frequency PL 30 60 80 KHz Note 8-4 Starting voltage(25) Vs 920 Vrms Note 8-5 (Reference Value) Starting voltage(0) Vs 1120 Vrms Note 8-5 (Reference Value) Note 8-3 : In order to satisfy the quality of B/L , no matter use what kind of inverter , the output lamp current must between Min. and Max. to avoid the abnormal display image caused by B/L. Note 8-4 : The waveform of lamp driving voltage should be as closed to a perfect sine wave as possible. Note 8-5 :The "Max of starting voltage" means the minimum voltage of inverter to turn on the CCFL and it should be applied to the lamp for more than 1 second to start up. Otherwise the lamp may not be turned on The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:8 PA080XS1 PA080XS1 Ta= 25 8-3) Power Consumption Parameter Supply current for Gate Driver (Hi level) Symbol Conditions VGH+24V IGH TYP. MAX 0.3814 Unit Remark 0.4768 mA Supply current for Gate Driver (Low level) IEE VEE-8V 0.4112 0.5141 mA Supply current for Source Driver(Digital) IDD1 VDD1+3.3V 2.0245 2.5306 mA Supply current for Source Driver(Analog) IDD2 VDD2+13V 5 6.24 mA Supply current for Gate Driver (Digital) VCC+3.3V 0.1 0.2 mA ICC LCD Panel Power Consumption 80.28 100.51 mW Back Light Lamp Power Consumption 3.6 Note 8-6 : The power consumption for back light is not included. Note 8-7 : Back light lamp power consumption is calculated by IL×VL. - W Note 8-6 Note 8-7 8-4) Timing Characteristics Of Input Signals Characteristics Rising time Falling time High and low level pulse width CPH pulse duty STH setup time STH hold time STH pulse width STH period OEH pulse width Sample and hold disable time OEV pulse width CKV pulse width Horizontal display start STV pulse width Horizontal lines per field Vertical display start Vertical display timing range Distance from OEH to STVD (odd field) Distance from OEH to STVD (even field) OE(1,2,3) pulse width1 OE(1,2,3) pulse width2 Distance from CKV to OE1 Distance from OE1 to another OE2 Distance from OE2 to another OE3 Distance2 from POL to STVD(u) Symbol tr tf tCPH tCWH tSUH tHDH tSTH tH tOEH tDIS1 tOEV tCKV tSH tSTV tV tSV tDV Min. 9.2 30 20 20 61.5 256 - Typ. 9.6 50 1 63.5 3.47 7.43 52.3 15.8 480 1.5 262 3 234 Max. 10 10 10.0 70 65.5 268 - Unit ns ns MHz % ns ns tCPH s s s s s tCPH tH tH tH tH tDIS2 - 33.9 - s tDIS3 - 2.2 - s Poev1 Poev2 Tra1 4.2 81.6 14.9 18.1 18.1 2 STVD,STVU s Tpol OE1,2,3 CKV s Tra3 CPH1~CPH3 CPH1~CPH3 STH1,STH2 STH1,STH2 STH1,STH2 STH1,STH2 OEH s s s Tra2 Remark tH The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:9 PA080XS1 PA080XS1 CPH3 (L) CPH2 (L) CPH1 STH1(2) 50% tCWH 50% tCPH tSUH tSTH tHDH F i g . 8 - 1 S a m p li n g c l o c k ti m i n g 10% tr 90% 90% tf 10% 8-5) Signal Timing Waveforms The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:10 Fig. 8-2 Horizontal display timing range CPH1 Output (STH2/STH1) Input (STH1/STH2 tDH PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:11 STH1(2) OEH (HSY) 1H tH Fig. 8-3 (a) Horizontal timing PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:12 Fig. 8-3 (b) Detail horizontal timing Note : The falling edge of OEV should be synchronized with the falling edge of OEH STH1(2) OEH (HSY) tOEH tDIS1 1H tSTH PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:13 PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:14 tra2 0.5H OE3 OE2 OE1 CKV STVD OEH tra1 tDISZ tra3 Poev1 Poev2 tstv tckv toev F i g . 8 - 4 V e rti c a l ti m i n g ( u n d = H i g h , o d d fi e l d ,li n e p a ir c a s e PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:15 OE3 OE2 OE1 CKV STVD OEH tra1 tra3 tra2 F i g . 8 - 5 V e rti c a l ti m i n g ( u n d = H i g h , e v e n fi e l d ,lli n e. p a ir c a s e ) PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:16 PA080XS1 PA080XS1 V(R,G,B-) Vcom V(R,G,B+) STVU/STVD (VSY) (HSY) Fig. 8-6 Vertical timing tsv Display on panel first line Vertical timing The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:17 POL CKV STVD(u) Vsy Hsy tpol F i g . 8 - 7 V e rti c a l ti m i n g _ 2 PA080XS1 PA080XS1 The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:18 PA080XS1 PA080XS1 9. Power on Sequence The Power on Sequence only effect by VCC, VDD,VEE and VGH, the others do not care. VGH VDD,VCC VSS(0V) VEE OFF OFF ON T1 T3 Logic signal RGB-Video signal T2 T4 1) 10msT1