P89LPC917 LPC917 - Datasheet Archive

 

ERRATA SHEET Date: Document Release: Device Affected: 2004 Apr 19 Version 1.0 P89LPC917 This errata sheet describes both the

 

INTEGRATED CIRCUITS ERRATA SHEET Date: Document Release: Device Affected: 2004 Apr 19 Version 1.0 P89LPC917 P89LPC917 This errata sheet describes both the functional deviations and any deviations from the electrical specifications known at the release date of this document. Each deviation is assigned a number and its history is tracked in a table at the end of the document. 2004 Apr 19 Philips Semiconductors PHILIPS Philips Semiconductors Low Pincount 8-bit microcontroller Erratasheet P89LPC917 P89LPC917 Identification: The typical P89LPC917 P89LPC917 devices have the following top-side marking: P89LPC917x x xxxxxxx xx xxYYWW R The last letter in the third line (field `R') will identify the device revision. This Errata Sheet covers the following revisions of the P89LPC917 P89LPC917: Revision Identifier (R) `A' Comment Initial device revision Field `YY' states the year the device was manufactured. Field `WW' states the week the device was manufactured during that year. 2004 Apr 19 2 Philips Semiconductors Low Pincount 8-bit microcontroller Erratasheet P89LPC917 P89LPC917 Errata Overview - Functional Problems Functional Problem Short Description ADC.1 Single Step mode multi channel boundary interrupt ADC.2 Timer/Edge with Scan Mode Counter Reset fixed in revision added none none v1.0 v1.0 Errata Overview - AC/DC Deviations AC/DC Deviation - Short Description - fixed in revision added - - Errata Notes Note VDD.1 2004 Apr 19 Short Description VDD Power cycling. added v1.0 3 Philips Semiconductors Low Pincount 8-bit microcontroller Erratasheet P89LPC917 P89LPC917 Functional Deviations of P89LPC917 P89LPC917 ADC.1: Single Step mode multi channel boundary interrupt Introduction: The ADC on the LPC917 LPC917 is an Analog to Digital converter with 8 bits of resolution. The ADC has features such as a Single Step mode where the ADC will step through the selected channels on each ADC start condition. Problem: When the ADC is in Single Step mode with more than 1 channel selected, and a boundary interrupt occurs to any of the lower selected channel-bits, a write to the ADMODA register to clear the BNDI bit before all the selected channels are converted will reset the channel selection counter and the ADC will go back and wait at the lowest selected channel for the next conversion. . Workarounds: 1) 2) ADC.2: Clear the lower channel bits including the boundary interrupted channel in ADCINS register before the next start request. Use the default boundary channel, not clear BNDI bit until all channels are converted. Timer/Edge trigger with scan mode Introduction: The ADC on the LPC917 LPC917 is an Analog to Digital converter with 8 bits of resolution. The ADC has features such as a Timer / Edge trigger mode where the ADC will generate an ADC start condition on the timer or edge on a pin. Scan mode is an ADC feature where the ADC will scan through all selected channels on an ADC start condition. Problem: When the ADC is in Timer or Edge mode, with scan mode, and more than 1 channel is selected, and the repeat conversion on timer or edge is selected, the channel counter increments to last selected channel on first conversion, but on all subsequent conversion triggers the counter is not reset, so only the last channel is converted over and over again. Workarounds: 1) 2) 2004 Apr 19 To reset the counter that sticks on the last channel the ADC can be disabled and enabled again. Switch from ADC mode to DAC mode and back. 4 Philips Semiconductors Low Pincount 8-bit microcontroller Erratasheet P89LPC917 P89LPC917 Electrical and Timing Specification Deviations of P89LPC917 P89LPC917 No known errata 2004 Apr 19 5 Philips Semiconductors Low Pincount 8-bit microcontroller Erratasheet P89LPC917 P89LPC917 Errata Notes VDD.1: VDD Power cycling To generate a proper Power-On-Reset (POR), VDD must have dropped below 0.2V before being powered back up. Power-cycling without VDD having dropped below 0.2V may result in incorrect Program Counter values. Please also see the VPOR specification in LPC917 LPC917 Datasheet, DC electrical characteristics. Section 8.15 (Reset) states that during a power cycle, VDD must fall below VPOR. 2004 Apr 19 6