P113SD 2002/95/EC 2002/96/EC J-STD-020C MIL-STD-883 22-C101

CMOS Clock Oscillators July 2007 · Pletronics' P113SD Series is a quartz crystal controlled precision square wave

P113SD P113SD Series 1.8 V CMOS Clock Oscillators July 2007 · Pletronics' P113SD P113SD Series is a quartz crystal controlled precision square wave generator with a CMOS output. · The P113SD P113SD series will directly interface TTL devices also. · Greatly reduces RFI and EMI system sensitivity · Minimizes RFI radiation, eases meeting FCC Class B emissions standards. · Capable of driving up to 15pF capacitive loads · Tube packaging is available. · · · · · · · · · 70 to 165 MHz Full Size Thru-Hole DIP package Enable/Disable Function Disable function includes low standby power mode 3rd Overtone Crystals used Improved circuit to minimize oscillator issues such as multi-mode output signal. Low Jitter Has internal bypass capacitor on the Vcc lead 5x7 mm LCC ceramic oscillator inside Pletronics Inc. certifies this device is in accordance with the RoHS (2002/95/EC 2002/95/EC) and WEEE (2002/96/EC 2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB's, PBDE's Weight of the Device: 4.0 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C J-STD-020C Second Level Interconnect code: e1 or e2 Absolute Maximum Ratings: Parameter Unit VCC Supply Voltage -0.5V to +5.0V Vi Input Voltage -0.5V to VCC + 0.5V Vo Output Voltage -0.5V to VCC + 0.5V Thermal Characteristics The maximum die or junction temperature is 155oC The thermal resistance junction to board is 120oC/Watt depending on the solder pads, ground plane and construction of the PCB. Product informatin is current as of publication date. The product conforms Inc. to specifications per the terms of the Pletronics standard warranty. Production processsing does not necesarily include testing of all parameters. Copyright © 2005, 2006, 2007, Pletronics P113SD P113SD Series 1.8 V CMOS Clock Oscillators July 2007 Part Number: P11 45 -3SD ES X - 85.0M -XX Marking Internal code or blank Output Load Capacitance Blank = 15pF maximum none Frequency in MHz fff.fff M Supply Voltage VCC X = 1.8V _ 5% + X, C or D Enhanced Specifications (apply in the order shown) E = Temperature range -40 to 85oC S = Symmetry 45%/55% at 50% of VCC E S Series Model Frequency Stability 45 = + 50 ppm _ 44 = + 25 ppm _ 20 = + 20 ppm _ Series Model 5 4 2 P3S Part Marking: PLE P3Sxsss fff.fff M yywwaLF Where: x sss fff.fff yywwa LF = Frequency stability = Enhanced specification and voltage = frequency in MHz = Date code = Lead Free Pletronics may ship the following combinations without notice (this is an enhanced specified device) 44 (25 ppm) stability parts when 45 (50 ppm) was ordered 20 (20 ppm) stability parts when 45 (50 ppm) or 44 (25 ppm) was ordered. E temperature range parts when extended was not ordered. S symmetry parts when 40/60% symmetry was ordered. Pletronics may ship parts that are not marked for extended temperature range but were tested for extended temperature range, a Certificate of Conformance will accompany these parts. www.pletronics.com 425-776-1880 2 P113SD P113SD Series 1.8 V CMOS Clock Oscillators July 2007 Electrical Specification for 2.50V _10% over the specified temperature range + Item Min Max Unit 70 165 MHz -50 +50 ppm "44" -25 +25 "20" -20 +20 Frequency Range Frequency Accuracy "45" Output Waveform Condition For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures CMOS Output High Level 0.4 - V Below VCC Output Low Level - 0.4 V (See load circuit) Output Symmetry 40 60 % at 50% point of VCC 45 55 % for "S" option parts - 0.6 pS RMS 12 KHz to 20 MHz from the output frequency - 2.5 pS RMS 10 Hz to 1 MHz from the output frequency 30 - Kohm V disable - 30 % of VCC applied to pad 1 V enable 70 - % of VCC applied to pad 1 -10 +10 uA Pad 1 low, device disabled -10 +10 uA Standby Current ICC - 10 uA Pad 1 low, device disabled Enable time - 2 mS Time for output to resume operation Disable time - 200 nS Time for output to reach a high Z state Start up time - 5 mS Time for output to reach specified frequency Operating Temperature Range 0 +70 o Standard Temperature Range - 40 +85 o Extended Temperature Range +125 o Jitter Enable/Disable Internal Pull-up Output leakage VOUT = VCC VOUT = 0V Storage Temperature Range www.pletronics.com - 55 425-776-1880 C C (See load circuit) (See load circuit) Standard to VCC "E" Option C 3 P113SD P113SD Series 1.8 V CMOS Clock Oscillators July 2007 Electrical Specification for 2.50V _10% over the specified temperature range + Item Min Typ Max Unit Condition VOUT High (VOH) 0.4 0.3 - V Below VCC, IOH = +8 mA VOUT Low (VOL) - 0.3 0.4 V IOL = - 8 mA Output TRISE and TFALL - 1.5 2.5 nS CLOAD = 15 pF 20% to 80% of VCC (See load circuit) VCC Supply Current (ICC) - 21 33 mA >125 MHz - 17 27 mA >95 MHz and