NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Specifically, the A2 die revision addresses voltage levels on the control port (inputs P0, P1 and P2) and its , controlled using 3V logic and a 5V power supply while maintaining a maximum standby current of 50 礎 or less. , ] Standby current specifications apply when P0, P1, and P2 logic inputs are driven the specified Vih or Vil , code of 9617 or later, and may begin shipping to customers as early as July 15, 1996. Dallas , to identify the new revision by the date code branded on top of the parts, as yywwA2 (where yyww is ... | Original |
2 pages, |
DS1866 datasheet abstract |
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| Abstract: Essentially an extra row appended to the array and allocated for data storage, the physical size of the UES , /E ispLSI 6192 Lattice Semiconductor's ispLSI ®, GAL ® , ispGAL ® , ispGDXTM and ispGDSTM families can ease the problems associated with document control and traceability, thanks to a feature , Lattice incorporated the UES to store such design and manufacturing data as the manufacturer's ID, programming date, programmer make, pattern code, checksum, PCB location, revision number and product flow. ... | Original |
3 pages, |
GAL22V10 GAL20LV8ZD GAL20LV8 GAL18V10 GAL16V8 GAL16LV8ZD GAL16LV8 GAL16V8/20V8 GAL16VP8/20VP8 GAL16V8Z/20V8Z GAL16V8ZD/20V8ZD GAL26CLV12 GAL26CV12 GAL20XV10 GAL16V8 abstract |
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| Abstract: User Electronic Signature Lattice Semiconductor's GAL®, ispGAL®, ispGDSTM and ispLSI® families can ease the problems associated with document control and traceability, thanks to a feature called , used, and the advantages associated with manufacturing flow control, documentation and traceability , solution. Device ues_02 Lattice incorporated the UES to store such design and manufacturing data , basically a user's "notepad" provided in electrically erasable (E2) cells on each GAL, ispGAL, ispGDS and ... | Original |
3 pages, |
GAL22V10 GAL20LV8ZD GAL20LV8 GAL18V10 GAL16V8 GAL16LV8ZD GAL16LV8 GAL16V8/20V8 GAL16VP8/20VP8 GAL16V8Z/20V8Z GAL16V8ZD/20V8ZD GAL26CV12 GAL20XV10 GAL20RA10 GAL16V8 abstract |
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| Abstract: compatible drive Logic compatible output sinks 16mA at 0.5V maximum Guaranteed on/off , Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such , H11N1M H11N1M, H11N2M H11N2M, H11N3M H11N3M 6-Pin DIP High Speed Logic Optocouplers Features Description High data rate, 5MHz typical (NRZ) The H11NXM H11NXM series has a high speed integrated circuit detector , provides hysteresis for noise immunity and pulse shaping. The detector circuit is optimized for simplicity ... | Original |
9 pages, |
H11N3M H11N1 H11N1M H11N1SVM H11N1VM H11N2 H11N2M H11N3 Fairchild uL 910 Fairchild UL file MOS H11N1M abstract |
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| Abstract: AND8004/D AND8004/D ON Semiconductor Logic Date Code and Traceability Marking Prepared by: Douglas Buzard , INTRODUCTION This is a summary of ON Semiconductor MOS Logic Device, Date Code, and Traceability Marking. We , summarizes and explains the Date Code and Traceability Marking for Logic packages. Refer to the appropriate , marking are either truncated or abbreviated. The SOT packages use a code for the Logic family and device , Assy Location | AA| Date and Traceability Code Markings | TSSOP PACKAGES 6 ... | Original |
16 pages, |
marking t132 HC04A SOT-363 MARKING WF va sot-353 SOT23 "Marking Code" t04 vhct244a WW45 T04 sot23 marking code t04 sot-23 transistor xaa643 SOT-353 MARKING L5 marking codes sot-23 A4 body marking w7 AND8004/D AND8004/D abstract |
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| Abstract: AND8004/D AND8004/D ON Semiconductor Logic Date Code and Traceability Marking Prepared by: Douglas Buzard , INTRODUCTION This is a summary of ON Semiconductor MOS Logic Device, Date Code, and Traceability Marking. We , summarizes and explains the Date Code and Traceability Marking for Logic packages. Refer to the appropriate , abbreviated. The SOT packages use a code for the Logic family and device type. On TSSOP and some SOIC, the , Date and Traceability Code Markings TSSOP PACKAGES Front XXXX 643 Back X23 Marking Decoded ... | Original |
16 pages, |
SOT-363 A1 marking codes sot top marking codes marking codes fairchild marking code cp SOT-363 MARKING WF SOT-363 a7 AND8004/D AND8004/D abstract |
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| Abstract: ECLinPS Logic Device, Date Code, and Traceability Marking. We want to provide our customers with easy access to this information on the web. This application note summarizes and explains the Date Code and , ECLinPS, ECLinPS Lite and ECLinPS Plus are trademarks of Semiconductor Components Industries, LLC. ON , AND8002/D AND8002/D ECLinPSTM, ECLinPS LiteTM and ECLinPS PlusTM Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON ... | Original |
8 pages, |
hep05 kp35 KEL31 KVL05 kel16 KEP32 HEL05 xaa9646 HEL32 ON Semiconductor marking klt22 KEP60 hep51 KVL11 k1648 AND8002/D AND8002/D abstract |
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| Abstract: regarding patents and other intellectual property rights, please refer to Dallas Semiconductor data books. , family code, a unique 48bit serial number, and an 8bit cyclic redundancy check. Data is transferred serially via the 1Wire communication protocol which requires only a single data lead and a ground return , waits for the bus master to initiate another processing cycle and so on, until data processing is , higher speed. These commands operate on the 64bit lasered ROM portion of each device and can singulate ... | Original |
4 pages, |
clock arithmetic DS1410E DS9093F DS9093RA DS9096P DS9101 internal structure OF ROM Serial NVSRAM iButton Chips DS1954 timing DIAGRAM OF ROM DS1954 abstract |
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| Abstract: National Semiconductor has tested and certified the specific manufacturing lot. Interface test reports are available on National Semiconductor's web site at www.national.com/mil. 49 51 51 51 52 53 54 N , ): Approved in 1995, this standard specifies a maximum data rate of 655Mpbs and a theoretical maximum of , withstand contention and bus faults. Differential Data Transmission Standards To meet the need for a , benefits of differential data transmission and is capable of operating at data rates up to 655Mb/s. ... | Original |
9 pages, |
RS-423 DS90C032 DS90C031 DS26LS32 P89V51RD2 microcontroller ANSI/TIA/EIA-644 datasheet abstract |
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| Abstract: Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such , genuine parts, have full traceability, meet Fairchild's quality standards for handling and storage and , contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor , ) Diameter 0.060 (1.53) 0.200 (5.08) 0.120 (3.05) * XY = 6 weeks marking date code, X = last digit of the calendar year (Alpha), Y = 6 weeks numeric code. Absolute Maximum Ratings* Symbol TA = 25°C ... | Original |
3 pages, |
FJH1101 fairchild h11 FJH1101 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| and 100,000 erase/write cycles endurance), built-in OTP EPROM for security and traceability codes includes also micromodule assembly and final testing, based on ST's extensive know how of semiconductor SOLO Technology to facilitate the development and use of Java applets (application programs) on a operating system and class libraries. The application code is installed in the EEPROM of the microcontroller of RAM and 4KB of sector combinative EEPROM. The highly reliable CMOS EEPROM technology gives a data www.datasheetarchive.com/files/stmicroelectronics/stonline/press/news/t221m.htm |
STMicroelectronics | 06/02/1998 | 12.32 Kb | HTM | t221m.htm |
| and 100,000 erase/write cycles endurance), built-in OTP EPROM for security and traceability codes includes also micromodule assembly and final testing, based on ST's extensive know how of semiconductor SOLO Technology to facilitate the development and use of Java applets (application programs) on a operating system and class libraries. The application code is installed in the EEPROM of the microcontroller of RAM and 4KB of sector combinative EEPROM. The highly reliable CMOS EEPROM technology gives a data www.datasheetarchive.com/files/stmicroelectronics/stonline/press/news/t221m-v1.htm |
STMicroelectronics | 14/06/1999 | 12.37 Kb | HTM | t221m-v1.htm |
| /write cycles endurance), built-in OTP EPROM for security and traceability codes, Static Electricity testing, based on ST's extensive know how of semiconductor manufacturing. ST provides fully tested - and Schlumberger SOLO Technology to facilitate the development and use of Java applets (application programs) on a operating system and class libraries. The application code is installed in the EEPROM of the CMOS EEPROM technology gives a data retention of 10 years and a 100,000 Erase/Write cycle endurance www.datasheetarchive.com/files/stmicroelectronics/stonline/press/news/year1997/t221m.htm |
STMicroelectronics | 20/10/2000 | 12.58 Kb | HTM | t221m.htm |
| and 100,000 erase/write cycles endurance), built-in OTP EPROM for security and traceability codes includes also micromodule assembly and final testing, based on ST's extensive know how of semiconductor SOLO Technology to facilitate the development and use of Java applets (application programs) on a operating system and class libraries. The application code is installed in the EEPROM of the microcontroller of RAM and 4KB of sector combinative EEPROM. The highly reliable CMOS EEPROM technology gives a data www.datasheetarchive.com/files/stmicroelectronics/stonline/press/news/year1997/t221m-v1.htm |
STMicroelectronics | 31/05/2000 | 12.4 Kb | HTM | t221m-v1.htm |
| that are required - no wasted peripherals or logic gates! Code and peripheral 'banks' can be built up route. 2) Use of ChipScope on the FPGA for analysis of the PLB and OPB bus as well as general logic radio broadcasting and mobile commerce services Automotive Semiconductors "It is now estimated that the designs Xilinx Maximizes Profitability In The Market Products that are 6 months late and on budget earn Airbags Collision Avoidance In-Car Digital Convergence Technologies are based on multiple, new and www.datasheetarchive.com/download/58453268-996052ZC/embedded world 2003.ppt |
Xilinx | 26/02/2003 | 4639.5 Kb | PPT | embedded world 2003.ppt |
| - no wasted peripherals or logic gates! Code and peripheral 'banks' can be built up and used across many projects over time Legacy code is not wasted saving time and money X-by-Wire Replacing mechanical The Market Products that are 6 months late and on budget earn 33% less profit over 5 yrs+ Every 4 Avoidance In-Car Digital Convergence Technologies are based on multiple, new and changing standards Data In Example 256 Tap FIR Filter = 256 multiply and accumulate (MAC) operations per data sample www.datasheetarchive.com/download/27007461-996051ZC/electronica presentation nov 200.ppt |
Xilinx | 26/02/2003 | 4255 Kb | PPT | electronica presentation nov 200.ppt |
| | AN1012 AN1012 AN1012 AN1012 - PREDICTING THE BATTERY LIFE AND DATA RETENTION PERIOD OF NVRAMS | Contents | AN1013 AN1013 AN1013 AN1013 EMULATION COMPROMISE | Contents | AN1119 AN1119 AN1119 AN1119 - CORRECT POWER-ON AND POWER-OFF FOR THE M93CXX M93CXX M93CXX M93CXX AND M93SXX M93SXX M93SXX M93SXX THE AVS08 AVS08 AVS08 AVS08 | Contents | AN392 AN392 AN392 AN392 - ST6 - MICROCONTROLLER (MCU) AND TRIACS ON THE MAINS (110/220V 110/220V 110/220V 110/220V | Contents | AN509 AN509 AN509 AN509 - INFLUENCE OF GATE AND BASE DRIVE ON POWER SWITCH BEHAVIOUR | Contents | AN510 AN510 AN510 AN510 | AN627 AN627 AN627 AN627 - SERIAL EEPROM COMPATIBLE WITH PLUG-AND-PLAY VESA DISPLAY DATA CHANNEL (VERSIONS 1.0 AND 2 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/pdf/alpha/an/index-v2.htm |
STMicroelectronics | 14/06/1999 | 122.18 Kb | HTM | index-v2.htm |
| | AN1012 AN1012 AN1012 AN1012 - PREDICTING THE BATTERY LIFE AND DATA RETENTION PERIOD OF NVRAMS | Contents | AN1013 AN1013 AN1013 AN1013 POWER-ON AND POWER-OFF FOR THE M93CXX M93CXX M93CXX M93CXX AND M93SXX M93SXX M93SXX M93SXX | Contents | AN1120 AN1120 AN1120 AN1120 - EEPROM-BASED APPLICATION - MICROCONTROLLER (MCU) AND TRIACS ON THE MAINS (110/220V 110/220V 110/220V 110/220V) | Contents | AN393 AN393 AN393 AN393 - TV EAST/WEST CORRECTION ON FAST RECTIFIERS | Contents | AN444 AN444 AN444 AN444 - TRANSISTOR PROTECTION BY TRANSIL-POWER AND SURGE | Contents | AN509 AN509 AN509 AN509 - INFLUENCE OF GATE AND BASE DRIVE ON POWER SWITCH BEHAVIOUR | Contents | AN510 AN510 AN510 AN510 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/pdf/alpha/an/index-v1.htm |
STMicroelectronics | 07/04/1999 | 119.98 Kb | HTM | index-v1.htm |
| ST | ST6 - MICROCONTROLLER (MCU) AND TRIACS ON THE MAINS (110/220V 110/220V 110/220V 110/220V) ST | ST9 - INITIALIZATION OF - PREVENTION OF DATA CORRUPTION IN ST6 ON-CHIP EEPROM ST | ST6 - OPTIMIZING THE ST6 A/D CONVERTER ACCURACY MICROWAVE OVEN ST | TRIACS AND MICROCONTROLLERS - THE EASY CONNECTION ST | SERIES OPERATION ON FAST | INFLUENCE OF GATE AND BASE DRIVE ON POWER SWITCH BEHAVIOUR ST | CIRCUITS FOR POWER FACTOR CORRECTION WITH RAIL OP-AMPS ST | ST6X86 ST6X86 ST6X86 ST6X86 AND PENTIUM BUS DIFFERENCES ST | ST20 - REAL-TIME KERNELS ON THE ST20 ST | ST www.datasheetarchive.com/files/stmicroelectronics/stonline/newfts/an-v4.tit |
STMicroelectronics | 02/02/2001 | 29.49 Kb | TIT | an-v4.tit |
| (MCU) AND TRIACS ON THE MAINS (110/220V 110/220V 110/220V 110/220V) ST | ST9 - INITIALIZATION OF THE ST9 ST | ST6 DATA CORRUPTION IN ST6 ON-CHIP EEPROM ST | ST6 - OPTIMIZING THE ST6 A/D CONVERTER ACCURACY ST | ST ON FAST RECTIFIERS ST | TRANSISTOR PROTECTION BY TRANSIL-POWER AND SURGE CURRENT DURATION ST CHARGER ST | PHONE REMOTE SYSTEM ST | INFLUENCE OF GATE AND BASE DRIVE ON POWER SWITCH BEHAVIOUR ST EEPROM COMPATIBLE WITH PLUG-AND-PLAY VESA DISPLAY DATA CHANNEL (VERSIONS 1.0 AND 2.0) ST | SPEECH AND www.datasheetarchive.com/files/stmicroelectronics/stonline/newfts/an.tit |
STMicroelectronics | 20/10/2000 | 28.33 Kb | TIT | an.tit |