NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
OPA548 SBOS070 PDS-1389B OPA548T OPA548F AB-039 ILIM/15000 OPA547 AB-038 6030B - Datasheet Archive
OPA548 OPA 548 OPA 548 www.burr-brown.com/databook/OPA548.html High-Voltage, High-Current OPERATIONAL AMPLIFIER FEATURES
® OPA548 OPA548 OPA 548 OPA 548 www.burr-brown.com/databook/OPA548.html High-Voltage, High-Current OPERATIONAL AMPLIFIER FEATURES DESCRIPTION q WIDE SUPPLY RANGE Single Supply: +8V to +60V Dual Supply: ±4V to ±30V q HIGH OUTPUT CURRENT: 3A Continuous 5A Peak The OPA548 OPA548 is a low cost, high-voltage/high-current operational amplifier ideal for driving a wide variety of loads. A laser-trimmed monolithic integrated circuit provides excellent low-level signal accuracy and high output voltage and current. The OPA548 OPA548 operates from either single or dual supplies for design flexibility. In single supply operation, the input common-mode range extends below ground. q WIDE OUTPUT VOLTAGE SWING q FULLY PROTECTED: Thermal Shutdown Adjustable Current Limit The OPA548 OPA548 is internally protected against overtemperature conditions and current overloads. In addition, the OPA548 OPA548 was designed to provide an accurate, user-selected current limit. Unlike other designs which use a "power" resistor in series with the output current path, the OPA548 OPA548 senses the load indirectly. This allows the current limit to be adjusted from 0 to 5A with a resistor/potentiometer or controlled digitally with a voltage-out or current-out DAC. The Enable/Status (E/S) pin provides two functions. An input on the pin not only disables the output stage to effectively disconnect the load but also reduces the quiescent current to conserve power. The E/S pin output can be monitored to determine if the OPA548 OPA548 is in thermal shutdown. The OPA548 OPA548 is available in an industry-standard 7-lead staggered TO-220 package and a 7-lead DDPAK surface-mount plastic power package. The copper tab allows easy mounting to a heat sink or circuit board for excellent thermal performance. It is specified for operation over the extended industrial temperature range, 40°C to +85°C. A SPICE macromodel is available for design analysis. q OUTPUT DISABLE CONTROL q THERMAL SHUTDOWN INDICATOR q HIGH SLEW RATE: 10V/µs q LOW QUIESCENT CURRENT q PACKAGES: 7-Lead TO-220 7-Lead DDPAK Surface-Mount APPLICATIONS q VALVE, ACTUATOR DRIVER q SYNCHRO, SERVO DRIVER q POWER SUPPLIES q TEST EQUIPMENT q TRANSDUCER EXCITATION q AUDIO AMPLIFIER V+ VIN OPA548 OPA548 VO ILIM + VIN RCL (1/4W Resistor) RCL sets the current limit value from 0 to 5A. E/S V International Airport Industrial Park · Mailing Address: PO Box 11400, Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 · Tel: (520) 746-1111 · Twx: 910-952-1111 Internet: http://www.burr-brown.com/ · FAXLine: (800) 548-6133 (US/Canada Only) · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132 ® ©1997 Burr-Brown Corporation SBOS070 SBOS070 PDS-1389B PDS-1389B 1 OPA548 OPA548 Printed in U.S.A. October, 1997 SPECIFICATIONS At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted. OPA548T OPA548T, F PARAMETER CONDITION MIN TYP MAX UNITS ±10 mV µV/°C µV/V OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply VCM = 0, IO = 0 TA = 40°C to +85°C VS = ±4V to ±30V ±2 ±30 30 INPUT BIAS CURRENT(1) Input Bias Current(2) vs Temperature Input Offset Current VCM = 0V TA = 40°C to +85°C VCM = 0V 100 ±0.5 ±5 NOISE Input Voltage Noise Density, f = 1kHz Current Noise Density, f = 1kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range: Positive Negative Common-Mode Rejection FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Full Power Bandwidth Settling Time: ±0.1% Total Harmonic Distortion + Noise, f = 1kHz OUTPUT Voltage Output, Positive Negative Positive Negative Maximum Continuous Current Output: dc ac Leakage Current, Output Disabled, dc Output Current Limit Current Limit Range Current Limit Equation Current Limit Tolerance(1) POWER SUPPLY Specified Voltage Operating Voltage Range Quiescent Current Quiescent Current, Shutdown Mode TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance, JC 7-Lead DDPAK, 7-Lead TO-220 7-Lead DDPAK, 7-Lead TO-220 Thermal Resistance, JA 7-Lead DDPAK, 7-Lead TO-220 ±50 nA nA/°C nA VO = ±25V, RL = 1k VO = ±25V, RL = 8 RL = 8 G = 1, 50Vp-p, RL = 8 G = 10, 50V Step RL = 8, G = +3, Power = 10W IO = 3A IO = 3A IO = 0.6A IO = 0.6A (V+) 4.1 (V) +3.7 (V+) 2.4 (V) +1.3 ±3 3 V V dB || pF || pF dB dB 1 10 See Typical Curve 15 0.02(3) 90 (V+) 2.3 (V) 0.2 95 98 90 (V+) 3 (V) 0.1 80 nV/Hz fA/Hz 107 || 6 109 || 4 Linear Operation Linear Operation VCM = (V) 0.1V to (V+) 3V MHz V/µs kHz µs % (V+) 3.7 (V) +3.3 (V+) 2.1 (V) +1.0 V V V V A Arms See Typical Curve 0 to ±5 ILIM = (15000)(4.75)/(13750 + RCL) ±100 ±250 RCL = 14.8k (ILIM = ±2.5A), RL = 8 A A mA See Typical Curve(4) Capacitive Load Drive OUTPUT ENABLE /STATUS (E/S) PIN Shutdown Input Mode VE/S High (output enabled) VE/S Low (output disabled) IE/S High (output enabled) IE/S Low (output disabled) Output Disable Time Output Enable Time Thermal Shutdown Status Output Normal Operation Thermally Shutdown Junction Temperature, Shutdown Reset from Shutdown 500 90 200 INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain 100 E/S Pin Open or Forced High E/S Pin Forced Low E/S Pin High E/S Pin Low (V) +2.4 Sourcing 20µA Sinking 5µA, TJ > 160°C (V) +2.4 (V) +0.8 65 70 1 3 ±4 ILIM Connected to V, IO = 0 ILIM Connected to V, IO = 0 (V) +3.5 (V) +0.35 +160 +140 ±30 (V) +0.8 V V µA µA µs µs V V °C °C 40 40 55 V V mA mA +85 +125 +125 ±17 ±6 ±30 ±20 °C °C °C f > 50Hz dc 2 2.5 °C/W °C/W No Heat Sink 65 °C/W NOTES: (1) High-speed test at TJ = +25°C. (2) Positive conventional current flows into the input terminals. (3) See "Total Harmonic Distortion+Noise vs Frequency" in the Typical Performance Curves section for additional power levels. (4) See "Small-Signal Overshoot vs Load Capacitance" in the Typical Performance Curves section. ® OPA548 OPA548 2 CONNECTION DIAGRAMS PACKAGE/ORDERING INFORMATION Top Front View PACKAGE DRAWING TEMPERATURE NUMBER(1) RANGE PRODUCT 7-Lead Stagger-Formed TO-220 7-Lead DDPAK Surface-Mount PACKAGE OPA548T OPA548T 7-Lead Stagger-Formed TO-220 327 40°C to +85°C 7-Lead DDPAK Surface-Mount 328 40°C to +85°C OPA548F OPA548F(2) NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Available on Tape and Reel. 1 2 3 4 5 6 7 ELECTROSTATIC DISCHARGE SENSITIVITY 1 2 3 4 5 6 7 + VIN ILIM V+ E/S VIN V VO This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. + VIN ILIM V+ E/S VIN V VO NOTE: Tabs are electrically connected to V supply. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS(1) Output Current . See SOA Curve Supply Voltage, V+ to V . 60V Input Voltage . (V)0.5V to (V+)+0.5V Input Shutdown Voltage . V+ Operating Temperature . 40°C to +125°C Storage Temperature . 55°C to +125°C Junction Temperature . 150°C Lead Temperature (soldering 10s)(2) . 300°C NOTE: (1) Stresses above these ratings may cause permanent damage. (2) Vapor-phase or IR reflow techniques are recommended for soldering the OPA548F OPA548F surface mount package. Wave soldering is not recommended due to excessive thermal shock and "shadowing" of nearby devices. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 OPA548 OPA548 TYPICAL PERFORMANCE CURVES At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted. OPEN-LOOP GAIN AND PHASE vs FREQUENCY No Load RL = 8 45 RL = 8 No Load 90 20 135 0 Input Bias Current (nA) G 60 40 140 0 Phase (°) 80 Gain (dB) INPUT BIAS CURRENT vs TEMPERATURE 160 100 VS = ±5V 120 100 VS = ±30V 80 180 60 40 75 20 1 10 100 1k 10k 100k 1M 10M 50 25 0 CURRENT LIMIT vs TEMPERATURE 100 125 RCL = 4.02k ±4 Current Limit (A) Current Limit (A) ±4 RCL = 14.7k ±2 RCL = 57.6k ±3 RCL = 14.7k ±2 RCL = 57.6k ±1 ±1 0 50 25 0 25 50 75 100 125 0 ±5 ±10 Temperature (°C) ±15 ±20 ±25 ±30 Supply Voltage (V) INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE QUIESCENT CURRENT vs TEMPERATURE ±20 200 Quiescent Current (mA) ±18 Input Bias Current (nA) 75 ±5 +ILIM ILIM RCL = 4.02k 0 75 50 CURRENT LIMIT vs SUPPLY VOLTAGE ±5 ±3 25 Temperature (°C) Frequency (Hz) 150 100 50 IQ VS = ±30V ±16 VS = ±5V ±14 ±12 ±10 ±8 VS = ±30V IQ Shutdown ±6 VS = ±5V ±4 0 30 20 10 0 10 20 75 30 ® OPA548 OPA548 50 25 0 25 50 Temperature (°C) Common-Mode Voltage (V) 4 75 100 125 TYPICAL PERFORMANCE CURVES (CONT) At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted. POWER SUPPLY REJECTION vs FREQUENCY COMMON-MODE REJECTION vs FREQUENCY 100 Power Supply Rejection (dB) 80 60 40 20 80 +PSRR 60 PSRR 40 20 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) VOLTAGE NOISE DENSITY vs FREQUENCY OPEN-LOOP GAIN, COMMON-MODE REJECTION, AND POWER SUPPLY REJECTION vs TEMPERATURE AOL 400 105 95 AOL, PSRR (dB) Voltage Noise (nV/Hz) 110 100 500 300 200 100 90 PSRR 95 85 100 CMRR 80 75 0 1 10 100 1k 10k 100k 1M 50 25 0 25 50 75 100 Frequency (Hz) 90 125 Temperature (°C) GAIN-BANDWIDTH PRODUCT AND SLEW RATE vs TEMPERATURE TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY 1.25 13 1 G = +3 RL = 8 GBW 20W 12 0.75 11 SR+ 0.5 10 0.25 10W THD+N (%) 1 Slew Rate (V/µs) Gain-Bandwidth Product (MHz) CMRR (dB) Common-Mode Rejection (dB) 100 0.1 0.1W 1W 0.01 9 SR 0 75 50 25 0 25 50 75 100 0.001 8 125 20 Temperature (°C) 100 1k 10k 20k Frequency (Hz) ® 5 OPA548 OPA548 TYPICAL PERFORMANCE CURVES (CONT) At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted. OUTPUT VOLTAGE SWING vs OUTPUT CURRENT OUTPUT VOLTAGE SWING vs TEMPERATURE 5 4 4 VSUPPLY VOUT (V) VSUPPLY VOUT (V) 5 (V+) VO 3 (V) VO 2 1 IO = +3A IO = 3A 3 2 IO = +0.6A 1 IO = 0.6A 0 0 0 1 2 3 75 4 50 25 0 25 50 75 Output Current (A) MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY 10 Maximum Output Voltage Without Slew Rate Induced Distortion RL = 8 Leakage Current (mA) Output Voltage (Vp) 25 20 15 10 RCL = 5 RCL = 0 0 5 Output Disabled VE/S < (V) + 0.8V 5 0 1k 10k 100k 10 40 1M 30 20 10 0 10 20 Frequency (Hz) 30 40 Output Voltage (V) OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 20 14 Typical distribution of packaged units. Typical production distribution of packaged units. 12 16 Percent of Amplifiers (%) Percent of Amplifiers (%) 125 OUTPUT LEAKAGE CURRENT vs APPLIED OUTPUT VOLTAGE 30 18 100 Temperature (°C) 14 12 10 8 6 4 10 8 6 4 2 2 0 0 0 10 9 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 Offset Voltage (mV) Offset Voltage Drift (µV/°C) ® OPA548 OPA548 10 20 30 40 50 60 70 80 90 100 110 120 130 6 TYPICAL PERFORMANCE CURVES (CONT) At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE G = 3, CL = 1000pF, RL = 8 SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 50 G = +1 10V/div 30 20 G = 1 10 0 0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k 5µs/div Load Capacitance (pF) SMALL-SIGNAL STEP RESPONSE G = 1, CL = 1000pF 100mV/div SMALL-SIGNAL STEP RESPONSE G = 3, CL = 1000pF 50mV/div Overshoot (%) 40 2µs/div 2µs/div ® 7 OPA548 OPA548 APPLICATIONS INFORMATION With the OPA548 OPA548, the simplest method for adjusting the current limit uses a resistor or potentiometer connected between the ILIM pin and V according to the equation: Figure 1 shows the OPA548 OPA548 connected as a basic noninverting amplifier. The OPA548 OPA548 can be used in virtually any op amp configuration. R CL = Power supply terminals should be bypassed with low series impedance capacitors. The technique shown, using a ceramic and tantalum type in parallel is recommended. In addition, we recommend a 0.01µF capacitor between V+ and V as close to the OPA548 OPA548 as possible. Power supply wiring should have low series impedance. G = 1+ 0.1µF(2) R1 Figure 3 shows a simplified schematic of the internal circuitry used to set the current limit. Leaving the ILIM pin open programs the output current to zero, while connecting ILIM directly to V programs the maximum output current limit, typically 5A. R2 R1 SAFE OPERATING AREA Stress on the output transistors is determined both by the output current and by the output voltage across the conducting output transistor, VS VO. The power dissipated by the output transistor is equal to the product of the output current and the voltage across the conducting transistor, VS VO. The Safe Operating Area (SOA curve, Figure 2) shows the permissible range of voltage and current. R2 5 2 VIN E/S 7 OPA548 OPA548 6 3 1 ILIM(1) 4 13750 I LIM The low level control signal (0 to 330µA) also allows the current limit to be digitally controlled. V+ 10µF + (15000 )( 4. 75) VO ZL 0.1µF(2) 0.01µF(2) 10µF + SAFE OPERATING AREA 10 V Current-Limited Output Current (A) NOTE: (1) ILIM connected to V gives the maximum current limit, 5A (peak). (2) Connect capacitors directly to package power supply pins. FIGURE 1. Basic Circuit Connections. POWER SUPPLIES PD Output current can be limited to less than 3A-see text. 1 PD TC = 25°C =5 0W =2 6W =1 0W TC = 85°C The OPA548 OPA548 operates from single (+8V to +60V) or dual (±4V to ±30V) supplies with excellent performance. Most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the typical performance curves. Pulse Operation Only T = 125°C (Limit rms current to 3A) C 0.1 1 2 5 10 20 50 100 VS VO (V) FIGURE 2. Safe Operating Area. Some applications do not require equal positive and negative output voltage swing. Power supply voltages do not need to be equal. The OPA548 OPA548 can operate with as little as 8V between the supplies and with up to 60V between the supplies. For example, the positive supply could be set to 55V with the negative supply at 5V, or vice-versa. The safe output current decreases as VS VO increases. Output short-circuits are a very demanding case for SOA. A short-circuit to ground forces the full power supply voltage (V+ or V) across the conducting transistor. Increasing the case temperature reduces the safe output current that can be tolerated without activating the thermal shutdown circuit of the OPA548 OPA548. For further insight on SOA, consult Application Bulletin AB-039 AB-039. ADJUSTABLE CURRENT LIMIT The OPA548 OPA548 features an accurate, user-selected current limit. Current limit is set from 0 to 5A by controlling the input to the ILIM pin. Unlike other designs which use a power resistor in series with the output current path, the OPA548 OPA548 senses the load indirectly. This allows the current limit to be set with a 0 to 330µA control signal. In contrast, other designs require a limiting resistor to handle the full output current (5A in this case). AMPLIFIER MOUNTING Figure 4 provides recommended solder footprints for both the TO-220 and DDPAK power packages. The tab of both packages is electrically connected to the negative supply, V. It may be desirable to isolate the tab of TO-220 package from its ® OPA548 OPA548 PD 8 DAC METHOD (Current or Voltage) RESISTOR METHOD Max IO = ILIM ±ILIM = 13750 4.75V (4.75) (15000) Max IO = ILIM 13750 + RCL ±ILIM =15000 ISET 3 3 RCL 4 D/A 0.01µF (optional, for noisy environments) 4 V V RCL = 15000 (4.75V) ILIM 13750 4.75V ISET ISET = ILIM/15000 ILIM/15000 13750 VSET = (V) + 4.75V (13750) (ILIM)/15000 OPA547 OPA547 CURRENT LIMIT: 0 to 5A DESIRED CURRENT LIMIT RESISTOR(1) (RCL) CURRENT (ISET) VOLTAGE (VSET) 0A 1A 2.5A 3A 4A 5A ILIM Open 57.6k 14.7k 10k 4.02k ILIM Connected to V 0µA 67µA 167µA 200µA 267µA 333µA (V) + 4.75V (V) + 3.8V (V) + 2.5V (V) + 2V (V) + 1.1V (V) NOTE: (1) Resistors are nearest standard 1% values. FIGURE 3. Adjustable Current Limit. 7-Lead DDPAK(1) (Package Drawing #328) 7-Lead TO-220 (Package Drawing #327) 0.45 0.04 0.2 0.05 0.085 0.15 0.335 0.51 0.05 0.035 0.105 Mean dimensions in inches. Refer to end of data sheet or Appendix C of Burr-Brown Data Book for tolerances and detailed package drawings. NOTE: (1) For improved thermal performance increase footprint area. See Figure 6, "Thermal Resistance vs Circuit Board Copper Area". FIGURE 4. TO-220 and DDPAK Solder Footprints. mounting surface with a mica (or other film) insulator (see Figure 5). For lowest overall thermal resistance it is best to isolate the entire heat sink/OPA548 structure from the mounting surface rather than to use an insulator between the semiconductor and heat sink. dissipation. Figure 6 shows typical thermal resistance from junction-to-ambient as a function of the copper area POWER DISSIPATION Power dissipation depends on power supply, signal, and load conditions. For dc signals, power dissipation is equal to the product of output current times the voltage across the For best thermal performance, the tab of the DDPAK surface-mount version should be soldered directly to a circuit board copper area. Increasing the copper area improves heat ® 9 OPA548 OPA548 THERMAL RESISTANCE vs ALUMINUM PLATE AREA Aluminum Plate Area Thermal Resistance JA (°C/W) 18 Vertically Mounted in Free Air Flat, Rectangular Aluminum Plate 16 14 0.030in Al 12 0.050in Al 10 Aluminum Plate Thickness 0.062in Al 8 0 1 2 3 4 5 6 7 Optional mica or film insulator for electrical isolation. Adds OPA548 OPA548 approximately 1°C/W. TO-220 Package 8 Aluminum Plate Area (inches2) FIGURE 5. TO-220 Thermal Resistance vs Aluminum Plate Area. THERMAL RESISTANCE vs CIRCUIT BOARD COPPER AREA Thermal Resistance, JA (°C/W) 50 Circuit Board Copper Area OPA548F OPA548F Surface Mount Package 1oz copper 40 30 20 10 0 0 1 2 Copper Area 3 4 OPA548 OPA548 Surface Mount Package 5 (inches2) FIGURE 6. DDPAK Thermal Resistance vs Circuit Board Copper Area. conducting output transistor. Power dissipation can be minimized by using the lowest possible power supply voltage necessary to assure the required output voltage swing. tion of the amplifier but may have an undesirable effect on the load. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heat sink. For reliable operation, junction temperature should be limited to 125°C, maximum. To estimate the margin of safety in a complete design (including heat sink) increase the ambient temperature until the thermal protection is triggered. Use worst-case load and signal conditions. For good reliability, thermal protection should trigger more than 35°C above the maximum expected ambient condition of your application. This produces a junction temperature of 125°C at the maximum expected ambient condition. For resistive loads, the maximum power dissipation occurs at a dc output voltage of one-half the power supply voltage. Dissipation with ac signals is lower. Application Bulletin AB-039 AB-039 explains how to calculate or measure power dissipation with unusual signals and loads. THERMAL PROTECTION Power dissipated in the OPA548 OPA548 will cause the junction temperature to rise. The OPA548 OPA548 has thermal shutdown circuitry that protects the amplifier from damage. The thermal protection circuitry disables the output when the junction temperature reaches approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again enabled. Depending on load and signal conditions, the thermal protection circuit may cycle on and off. This limits the dissipa- The internal protection circuitry of the OPA548 OPA548 was designed to protect against overload conditions. It was not intended to replace proper heat sinking. Continuously running the OPA548 OPA548 into thermal shutdown will degrade reliability. ® OPA548 OPA548 10 HEAT SINKING Most applications require a heat sink to assure that the maximum operating junction temperature (125°C) is not exceeded. In addition, the junction temperature should be kept as low as possible for increased reliability. Junction temperature can be determined according to the equation: TJ = TA + PDJA TJ = TA + PD(JC + CH + HA) (2) TJ = Junction Temperature (°C) TA = Ambient Temperature (°C) PD = Power Dissipated (W) JC = Junction-to-Case Thermal Resistance (°C/W) CH = Case-to-Heat Sink Thermal Resistance (°C/W) HA = Heat Sink-to-Ambient Thermal Resistance (°C/W) JA = Junction-to-Air Thermal Resistance (°C/W) HA = Another variable to consider is natural convection vs forced convection air flow. Forced-air cooling by a small fan can lower CA (CH + HA) dramatically. Heat sink manufactures provide thermal data for both of these cases. For additional information on determining heat sink requirements, consult Application Bulletin AB-038 AB-038. MAXIMUM POWER DISSIPATION vs AMBIENT TEMPERATURE Power Dissipation (Watts) 8 As mentioned earlier, once a heat sink has been selected the complete design should be tested under worst-case load and signal conditions to ensure proper thermal protection. PD = (TJ (max) TA) / JA TJ (max) = 150°C With infinite heat sink ( JA = 2.5°C/W), max PD = 50W at TA = 25°C. 6 ENABLE/STATUS (E/S) PIN The Enable/Status Pin provides two functions: forcing this pin low disables the output stage, or, E/S can be monitored to determine if the OPA548 OPA548 is in thermal shutdown. One or both of these functions can be utilized on the same device using single or dual supplies. For normal operation (output enabled), the E/S pin can be left open or pulled high (at least 2.4V above the negative rail). A small value capacitor connected between the E/S pin and V may be required for noisy applications. DDPAK JA = 26°C/W (3 in2 one oz copper mounting pad) 4 2 DDPAK or TO-220 JA = 65°C/W (no heat sink) 0 0 25 50 75 100 125° C 40° C ( 2.5° C/ W + 1° C/ W ) = 13.5° C/ W 5W To maintain junction temperature below 125°C, the heat sink selected must have a HA less than 14°C/W. In other words, the heat sink temperature rise above ambient must be less than 67.5°C (13.5°C/W x 5W). For example, at 5 Watts Thermalloy model number 6030B 6030B has a heat sink temperature rise of 66°C above ambient (HA = 66°C/5W = 13.2°C/W), which is below the 67.5°C required in this example. Figure 7 shows power dissipation versus ambient temperature for a TO-220 package with a 6030B 6030B heat sink. The difficulty in selecting the heat sink required lies in determining the power dissipated by the OPA548 OPA548. For dc output into a purely resistive load, power dissipation is simply the load current times the voltage developed across the conducting output transistor, PD = IL(VsVO). Other loads are not as simple. Consult Application Bulletin AB039 AB039 for further insight on calculating power dissipation. Once power dissipation for an application is known, the proper heat sink can be selected. TO-220 with Thermalloy 6030B 6030B Heat Sink JA = 16.7°C/W TJ TA ( JC + CH ) PD HA = Figure 7 shows maximum power dissipation versus ambient temperature with and without the use of a heat sink. Using a heat sink significantly increases the maximum power dissipation at a given ambient temperature as shown. 10 (3) TJ, TA, and PD are given. JC is provided in the specification table, 2.5°C/W (dc). CH can be obtained from the heat sink manufacturer. Its value depends on heat sink size, area, and material used. Semiconductor package type, mounting screw torque, insulating material used (if any), and thermal joint compound used (if any) also affect CH. A typical CH for a TO-220 mounted package is 1°C/W. Now we can solve for HA: (1) where, JA = JC + CH + HA Combining equations (1) and (2) gives: 125 Ambient Temperature (°C) FIGURE 7. Maximum Power Dissipation vs Ambient Temperature. Output Disable A unique feature of the OPA548 OPA548 is its output disable capability. This function not only conserves power during idle periods (quiescent current drops to approximately 6mA) but also allows multiplexing in low frequency (f