NTP30N20 220AB NTP30N20/D AN569 - Datasheet Archive

 

Preferred Device Advance Information Power MOSFET 30 Amps, 200 Volts N­Channel Enhancement­Mode TO­220

 

NTP30N20 NTP30N20 Preferred Device Advance Information Power MOSFET 30 Amps, 200 Volts N­Channel Enhancement­Mode TO­220 http://onsemi.com Features · Source­to­Drain Diode Recovery Time Comparable to a Discrete 30 AMPERES 200 VOLTS 68 m @ VGS = 10 V (Typ) Fast Recovery Diode · Avalanche Energy Specified · IDSS and RDS(on) Specified at Elevated Temperature Typical Applications · PWM Motor Controls · Power Supplies · Converters N­Channel D MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Symbol Value Drain­to­Source Voltage VDSS 200 Vdc Drain­to­Source Voltage (RGS = 1.0 M) VDGR 200 Vdc Gate­to­Source Voltage ­ Continuous ­ Non­Repetitive (tpv10 ms) VGS VGSM G Unit "30 "40 Rating Drain Current ­ Continuous @ TA 25°C ­ Continuous @ TA 100°C ­ Pulsed (Note 1) S Vdc MARKING DIAGRAM & PIN ASSIGNMENT ID ID IDM 30 22 90 PD 178 1.43 W W/°C Operating and Storage Temperature Range TJ, Tstg ­55 to +175 °C Single Drain­to­Source Avalanche Energy ­ Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, IL(pk) = 20 A, L = 3.0 mH, RG = 25 ) EAS Total Power Dissipation @ TA = 25°C Derate above 25°C Thermal Resistance ­ Junction­to­Case ­ Junction­to­Ambient Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds 4 Drain Adc 4 mJ 450 TO­220AB 220AB CASE 221A STYLE 5 1 NTP30N20 NTP30N20 LLYWW 1 Gate 2 3 3 Source 2 Drain °C/W RJC RJA 0.7 62.5 TL 260 °C 1. Pulse Test: Pulse Width = 10 µs, Duty Cycle = 2%. NTP30N20 NTP30N20 LL Y WW = Device Code = Location Code = Year = Work Week ORDERING INFORMATION Device NTP30N20 NTP30N20 Package Shipping TO­220AB 220AB 50 Units/Rail Preferred devices are recommended choices for future use and best overall value. This document contains information on a new product. Specifications and information herein are subject to change without notice. © Semiconductor Components Industries, LLC, 2001 October, 2001 ­ Rev. 1 1 Publication Order Number: NTP30N20/D NTP30N20/D NTP30N20 NTP30N20 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 200 ­ ­ 307 ­ ­ ­ ­ ­ ­ 5.0 125 ­ ­ ±100 2.0 ­ 2.9 ­8.9 4.0 ­ ­ ­ ­ 0.068 0.067 0.200 0.081 0.080 0.240 ­ 2.0 2.5 gFS ­ 20 ­ mhos pF OFF CHARACTERISTICS Drain­to­Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 µAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Collector Current (VGS = 0 Vdc, VDS = 200 Vdc, TJ = 25°C) (VGS = 0 Vdc, VDS = 200 Vdc, TJ = 175°C) IGSS mV/°C µAdc IDSS Gate­Body Leakage Current (VGS = ±30 Vdc, VDS = 0) Vdc nAdc ON CHARACTERISTICS Gate Threshold Voltage VDS = VGS, ID = 250 µAdc) Temperature Coefficient (Negative) VGS(th) Static Drain­to­Source On­State Resistance (VGS = 10 Vdc, ID = 15 Adc) (VGS = 10 Vdc, ID = 10 Adc) (VGS = 10 Vdc, ID = 15 Adc, TJ = 175°C) RDS(on) Drain­to­Source On­Voltage (VGS = 10 Vdc, ID = 30 Adc) VDS(on) Forward Transconductance (VDS = 15 Vdc, ID = 15 Adc) Vdc mV/°C Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss ­ 2335 ­ Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) (VDS = 160 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Coss ­ ­ 380 148 ­ ­ Reverse Transfer Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Crss ­ 75 ­ td(on) ­ ­ 10 12 ­ ­ SWITCHING CHARACTERISTICS (Notes 2 & 3) Turn­On Delay Time ns Rise Time (VDD = 100 Vdc, ID = 18 Adc, VGS = 5.0 Vdc, RG = 2.5 ) , ) tr ­ ­ 20 70 ­ ­ Turn­Off Delay Time (VDD = 160 Vdc, ID = 30 Adc, VGS = 10 Vdc, RG = 9.1 ) td(off) ­ ­ 40 82 ­ ­ tf ­ ­ 24 88 ­ ­ Qtot ­ ­ 75 48 100 ­ Qgs ­ ­ 20 16 ­ ­ Qgd ­ 32 ­ VSD ­ ­ 0.91 0.80 1.1 ­ Vdc trr ­ 230 ­ ns ta ­ 140 ­ tb ­ 85 ­ QRR ­ 1.85 ­ Fall Time Gate Charge (VDS = 160 Vdc, ID = 30 Adc, VGS = 10 Vdc) (VDS = 160 Vdc, ID = 18 Adc, VGS = 5 0 Vdc) 5.0 nC BODY­DRAIN DIODE RATINGS (Note 2) Forward On­Voltage (IS = 30 Adc, VGS = 0 Vdc) (IS = 30 Adc, VGS = 0 Vdc, TJ = 150°C) Reverse Recovery Time (IS = 30 Adc, VGS = 0 Vdc, Ad Vd dIS/dt = 100 A/µs) Reverse Recovery Stored Charge 2. Indicates Pulse Test: P. W. = 300 µs max, Duty Cycle = 2%. 3. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 µC NTP30N20 NTP30N20 60 VGS = 10 V 6V ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 60 9V 50 TJ = 25°C 8V 40 7V 30 5V 20 10 VDS 10 V 50 40 30 20 TJ = 25°C 10 TJ = 100°C 4V 0 0 2 4 6 8 VDS, DRAIN­TO­SOURCE VOLTAGE (VOLTS) 0 10 0 RDS(on), DRAIN­TO­SOURCE RESISTANCE (W) 0.2 VGS = 10 V TJ = 100°C 0.15 0.1 TJ = 25°C 0.05 0 TJ = ­55°C 5 15 25 35 45 ID, DRAIN CURRENT (AMPS) 10 55 0.1 TJ = 25°C 0.09 VGS = 10 V 0.08 VGS = 15 V 0.07 0.06 0.05 5 Figure 3. On­Resistance versus Drain Current and Temperature 15 25 35 45 ID, DRAIN CURRENT (AMPS) 55 Figure 4. On­Resistance versus Drain Current and Gate Voltage 3 2.5 2 4 6 8 VGS, GATE­TO­SOURCE VOLTAGE (VOLTS) Figure 2. Transfer Characteristics 100000 VGS = 0 V ID = 15 A VGS = 10 V TJ = 175°C 10000 IDSS, LEAKAGE (nA) RDS(on), DRAIN­TO­SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN­TO­SOURCE RESISTANCE (W) Figure 1. On­Region Characteristics TJ = ­55°C 2 1.5 1 1000 TJ = 100°C 100 0.5 0 ­50 ­25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) 10 175 20 Figure 5. On­Resistance Variation with Temperature 40 60 80 100 120 140 160 180 200 VDS, DRAIN­TO­SOURCE VOLTAGE (VOLTS) Figure 6. Drain­to­Source Leakage Current versus Voltage http://onsemi.com 3 NTP30N20 NTP30N20 POWER MOSFET SWITCHING The capacitance (Ciss) is read from the capacitance curve at Switching behavior is most easily modeled and predicted a voltage corresponding to the off­state condition when by recognizing that the power MOSFET is charge calculating td(on) and is read at a voltage corresponding to the controlled. The lengths of various switching intervals (t) on­state when calculating td(off). are determined by how fast the FET input capacitance can At high switching speeds, parasitic circuit elements be charged by current from the generator. complicate the analysis. The inductance of the MOSFET The published capacitance data is difficult to use for source lead, inside the package and in the circuit wiring calculating rise and fall because drain­gate capacitance which is common to both the drain and gate current paths, varies greatly with applied voltage. Accordingly, gate produces a voltage at the source which reduces the gate drive charge data is used. In most cases, a satisfactory estimate of current. The voltage is determined by Ldi/dt, but since di/dt average input current (IG(AV) can be made from a is a function of drain current, the mathematical solution is rudimentary analysis of the drive circuit so that complex. The MOSFET output capacitance also t = Q/IG(AV) complicates the mathematics. And finally, MOSFETs have finite internal gate resistance which effectively adds to the During the rise and fall time interval when switching a resistance of the driving source, but the internal resistance resistive load, VGS remains virtually constant at a level is difficult to measure and, consequently, is not specified. known as the plateau voltage, VSGP. Therefore, rise and fall The resistive switching time variation versus gate times may be approximated by the following: resistance (Figure 9) shows how typical switching tr = Q2 x RG/(VGG ­ VGSP) performance is affected by the parasitic circuit elements. If tf = Q2 x RG/VGSP the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. where The circuit used to obtain the data is constructed to minimize VGG = the gate drive voltage, which varies from zero to VGG common inductance in the drain and gate circuit loops and RG = the gate drive resistance is believed readily achievable with board mounted and Q2 and VGSP are read from the gate charge curve. components. Most power electronic loads are inductive; the data in the figure is taken with a resistive load, which During the turn­on and turn­off delay times, gate current is approximates an optimally snubbed inductive load. Power not constant. The simplest calculation uses appropriate MOSFETs may be safely operated into an inductive load; values from the capacitance curves in a standard equation for however, snubbing reduces switching losses. voltage change in an RC network. The equations are: td(on) = RG Ciss In [VGG/(VGG ­ VGSP)] td(off) = RG Ciss In (VGG/VGSP) 6000 VDS = 0 V C, CAPACITANCE (pF) 5000 VGS = 0 V TJ = 25°C Ciss 4000 3000 Crss Ciss 2000 1000 Coss Crss 0 0 0 5 VGS 5 10 15 20 25 VDS GATE­TO­SOURCE OR DRAIN­TO­SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation http://onsemi.com 4 180 QT VDS 10 150 120 8 Q1 6 VGS Q2 90 60 4 ID = 30 A TJ = 25°C 2 0 0 10 20 30 40 50 QG, TOTAL GATE CHARGE (nC) 60 30 0 70 1000 VDD = 160 V ID = 30 A VGS = 10 V tf 100 t, TIME (ns) 12 VDS,DRAIN­TO­SOURCE VOLTAGE (VOLTS) VGS GATE­TO­SOURCE VOLTAGE (VOLTS) , NTP30N20 NTP30N20 tr td(off) 10 1 td(on) 1 Figure 8. Gate­To­Source and Drain­To­Source Voltage versus Total Charge 10 RG, GATE RESISTANCE () 100 Figure 9. Resistive Switching Time Variation versus Gate Resistance DRAIN­TO­SOURCE DIODE CHARACTERISTICS IS, SOURCE CURRENT (AMPS) 30 VGS = 0 V TJ = 25°C 25 20 15 10 5 0 0.5 0.6 0.7 0.8 0.9 VSD, SOURCE­TO­DRAIN VOLTAGE (VOLTS) 1 Figure 10. Diode Forward Voltage versus Current SAFE OPERATING AREA reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and adjusted for operating conditions differing from those specified. Although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. The energy rating decreases non­linearly with an increase of peak current in avalanche and peak junction temperature. Although many E­FETs can withstand the stress of drain­to­source avalanche at currents up to rated pulsed current (IDM), the energy rating is specified at rated continuous current (ID), in accordance with industry custom. The energy rating must be derated for temperature as shown in the accompanying graph (Figure 12). Maximum energy at currents below rated continuous ID can safely be assumed to equal the values indicated. The Forward Biased Safe Operating Area curves define the maximum simultaneous drain­to­source voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (TC) of 25°C. Peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in AN569 AN569, "Transient Thermal Resistance­General Data and Its Use." Switching between the off­state and the on­state may traverse any load line provided neither rated peak current (IDM) nor rated voltage (VDSS) is exceeded and the transition time (tr,tf) do not exceed 10 µs. In addition the total power averaged over a complete switching cycle must not exceed (TJ(MAX) ­ TC)/(RJC). A Power MOSFET designated E­FET can be safely used in switching circuits with unclamped inductive loads. For http://onsemi.com 5 NTP30N20 NTP30N20 I D, DRAIN CURRENT (AMPS) 1000 VGS = 20 V SINGLE PULSE TC = 25°C 100 10 µs 100 µs 10 1 ms 10 ms 1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.1 0.1 dc 1000 1.0 10 100 VDS, DRAIN­TO­SOURCE VOLTAGE (VOLTS) E , SINGLE PULSE DRAIN­TO­SOURCE AS AVALANCHE ENERGY (mJ) SAFE OPERATING AREA 500 ID = 30 A 400 300 200 100 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 175 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature 1.0 D = 0.5 0.2 0.1 0.1 P(pk) 0.05 0.02 t1 0.01 t2 DUTY CYCLE, D = t1/t2 SINGLE PULSE 0.01 0.00001 0.0001 0.001 0.01 t, TIME (µs) RJC(t) = r(t) RJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) ­ TC = P(pk) RJC(t) 0.1 Figure 13. Thermal Response di/dt IS trr ta tb TIME 0.25 IS tp IS Figure 14. Diode Reverse Recovery Waveform http://onsemi.com 6 1.0 10 NTP30N20 NTP30N20 PACKAGE DIMENSIONS TO­220 THREE­LEAD TO­220AB 220AB CASE 221A­09 ISSUE AA SEATING PLANE ­T­ B C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 -0.080 STYLE 5: PIN 1. 2. 3. 4. http://onsemi.com 7 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 -2.04 NTP30N20 NTP30N20 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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