NJU7507A NJU7507AD NJU7507AM NJU3555 DUTY50 NJU7305 NJU7306

BAND PASS FILTER FOR AUDIO SPECTRUM ANALYZER DISPLAY GENERAL DESCRIPTION PACKAGE OUTLINE The NJU7507A is a band pass filter for

NJU7507A NJU7507A BAND PASS FILTER FOR AUDIO SPECTRUM ANALYZER DISPLAY GENERAL DESCRIPTION PACKAGE OUTLINE The NJU7507A NJU7507A is a band pass filter for audio spectrum analyzer display. It consists of high and low band pass filters, CR oscillation circuit, control circuit and DC transfer circuit. Each band pass filter using the switched capacitor filter technology operates at the shared time by 7 bands which filter constant is switched by the internal clock. Therefore, the audio signal shared of 7 bands is output from a serial output terminal. The 14 bands version using the double by the cascade connection is prepared. NJU7507AD NJU7507AD NJU7507AM NJU7507AM PIN CONFIGURATION FEATURES BPF for the audio spectrum analyzer display of the 7 bands 14 bands extension is available by the cascade connection BPF using the switched capacitor filter technology CR oscillation circuit on chip (External clock input is available) Power-on initialization circuit on chip (External reset input is available) C-MOS Technology Package Outline DIP8, DMP8 OSC1 1 5 VDD OSC2 2 6 AIN 3 7 AOUT 4 8 VSS RSTb/CLKO RD BLOCK DIAGRAM Audio Signal RSTb/CLKO Control Signal Clock Signal RD OSC1 OSC2 fOSC fOSC/16 fOSC/4 iH BPF High Band AIN Input BUF VDD + VSS Ver.2008-07-30 iL RL RH H L High Band Peak Detector Level Shifter & Output BUF LPF VDD - Power-on Initialize Control Circuit OSC BPF Low Band AOUT Low Band Peak Detector AGND VSS -1- NJU7507A NJU7507A TERMINAL DESCRIPTION NO. 1 2 SYMBOL OSC1 OSC2 3 RSTb/CLKO 4 5 6 7 8 RD VSS AOUT AIN VDD FUNCTION External Resistor connecting terminal. External Resistor connecting terminal or External clock input terminal. Both as Reset input terminal and the clock of (2/3)*fOSC output terminal. Trigger signal for reading-out the AOUT of each band output terminal. GND 0V Peak voltage of each band output terminal. Audio signal input terminal. Positive power supply +5.0 V PEAK FREQUENCY The peak frequency in each band of NJU7507A NJU7507A are a suitable band interval which is the 7 bands at using the single and is the 14 bands at using the double by the cascade connection. Peak Frequency ( Hz ) Using the single Using the double 16k 16k 10.7k 6.3k 6.3k 4.2k 2.5k 2.5k 1.7k 1k 1k 670 400 400 265 160 160 107 63 63 42* Band f1a f1b f2a f2b f3a f3b f4a f4b f5a f5b f6a f6b f7a f7b Note 1) It may not be output along the expectation at the peak frequency of * marking, since the sampling time is not enough. Note 2) The bands of f1a, f2a, . f7a correspond to the master side and the bands of f1b, f2b, . f7b correspond to the slave side at the cascade connection of the double. The example of using the single OSC1 AOUT The example of using the double NJU7507A NJU7507A NJU7507A NJU7507A fOSC VSS -2- OSC2 AOUT OSC1 f1a~f7a OSC1 f1a~f7a Master fOSC OSC2 RSTb/ CLKO AOUT NJU7507A NJU7507A f1b~f7b Slave 2/3 x fOSC OSC2 VSS Ver.2008-07-30 NJU7507A NJU7507A NJU3555 NJU3555 FUNCTIONAL DESCRIPTION · Interface to external controller The example of the interface between the NJU7507A NJU7507A and the external controller is shown below; (1) Example of the interface to the external controller ( Using the single ) After the RSTb signal from the external controller is input and then the internal circuit is initialized, each band data is output as shown below timing chart; Since the RD signal is output before each band is switched, the external controller is to count the number of the RD signal and is to recognize the status of the band and is to read the output data from the AOUT terminal through the external A/D converter. The output type of the external controller connected to the RSTb/CLKO terminal as the RSTb input should be the N-channel and open-drain type or the diode should be connected between the RSTb/CLKO terminal and the output terminal of the external controller, so that the voltage of the RSTb/CLKO terminal is not gotten over the VSS level. AIN OSC1 NJU7507A NJU7507A A/D AOUT OSC2 fOSC Converter RD RSTb/ CLKO VSS µ CON 16 2 / fosc AOUT f1 f2 f1 f4 f3 f2 f3 f7 f4 f7 f1 f1 f2 f6 f2 f6 f3 f5 f5 f3 f4 f1 f1 f4 f1 RD RSTb 248 / fOSC Since the RD signal is output before 248/fOSC of each band switched, the output data should be read out within the limited time as shown right; If the RSTb signal which pulse width is more than 4/fOSC is input, the internal circuit is initialized and the data of f1 band is output from the AOUT terminal after 52/fOSC of the rise edge of the RSTb signal. Ver.2008-07-30 AOUT RD 8 / fOSC Available Period of Read-out AOUT fn 4 / fOSC[MIN] f1 52 / fOSC RSTb -3- NJU7507A NJU7507A (2) Example of the interface to the external controller (Using the double) The 14 bands application is available using the cascade connection of the double NJU7507A NJU7507A as shown blow. After the RSTb signals from the external controller are input to each of the master and the slave of the NJU7507A NJU7507A and then each internal circuit is initialized, each band data is output as shown below timing chart; Since the RD signals are output from the master and the slave before each band is switched, the external controller is to count the number of the RD signals and is to recognize the status of the band and is to read the output data from each AOUT terminals through the external A/D converter. The master clock for the slave is provided with the output signal from the RSTb/CLKO terminal of the master. The master clock for the slave is stopped when the RSTb signal is input from the external controller to the master, so that the RSTb/CLKO terminal of the master is used both as the RSTb input of the master and the master clock for the slave. The output type of the external controller connected to each RSTb/CLKO terminal as the RSTb input should be the N-channel and open-drain type or the diode's should be connected between each RSTb/CLKO terminal and the output terminals of the external controller, so that the voltage of each RSTb/CLKO terminal is not gotten over the VSS level. AIN AIN OSC1 OSC2 NJU7507A NJU7507A NJU7507A NJU7507A Slave Master AOUT AOUT A/D OSC2 Converter RD RSTb/ CLKO RD RSTb/ CLKO VSS µ CON Master AOUT RD 216 / fosc f1 f2 f1 f3 f2 f4 f3 f4 f7 f7 f1 f1 f2 f2 f6 f6 f3 f3 f5 f5 f4 f4 f1 f2 f1 f3 f2 f4 f3 f7 f1 f4 f2 f1 f2 RST Slave AOUT RD 216 / fosc x 3/2 f1 f2 f1 f2 f3 f3 f4 f4 f7 f7 f1 f1 f2 f2 RST Since each RD signal of the master and the slave is output before 248/fOSC (248/fOSC*3/2) of each band switched, the output data should be read out within the limited time as shown right; * The "( )" is corresponded to the slave. If the RSTb signal which pulse width is more than 4/fOSC is input to the master, the internal circuit is initialized and the data of f1 band is output from the AOUT terminal of the master after 52/fOSC of the rise edge of the RSTb signal. The RSTb signal for the slave should be set to "L" level while the RSTb signal for the master is "L" level and should keep "L" level more than 6/fOSC. So the slave operates as same as the master after 78/fOSC of the rise edge of the RSTb signal for the slave. -4- f6 f6 f3 f3 f5 f5 f4 f1 f4 f1 f1 248 / fOSC (248 / fOSC x 3/2) AOUT RD 8 / fOSC (8 / fOSC x 3/2) Available Period of Read-out AOUT fn 4 / fOSC[MIN] f1 52 / fOSC RSTb RSTb AOUT 6 / fOSC [MIN] fn' 78 / fOSC f1' Ver.2008-07-30 NJU7507A NJU7507A NJU3555 NJU3555 ABSOLUTE MAXIMUM RATINGS PARAMETER Supply Voltage Input Voltage Output Voltage Power Dissipation Operating Temperature Storage Temperature SYMBOL VDD VIN VIO VOUT PD RATINGS -0.3 to +7 -0.3 to VDD+0.3 -0.3 to 0 -0.3 to VDD+0.3 500(DIP), 300(DMP) UNIT V Topr -30 to 85 °C Tstg -55 to 125 (Ta=25°C) NOTE °C V 7 5, 8 V mW Note 3) If the IC are used on condition above the absolute maximum ratings, the IC may be destroyed. Using the IC within electric characteristic conditions will cause malfunction and poor reliability. Note 4) All voltage values are specified as VSS = 0V. Note 5) When the voltage of the RSTb/CLKO terminal is gotten over the VSS level, the diode should be connected between the RSTb/CLKO terminal and the external. Note 6) Decoupling capacitor should be connected between the VDD terminal and the VSS due to the stabilization of the operation. Note 7) Applied to the AIN or the OSC2 terminals. Note 8) Applied to the RSTb/CLKO terminal. DC CHARACTERISTICS PARAMETER Operating Voltage Operating Current Input Leak Current 1 Input Leak Current 2 External Clock Input Voltage Output Voltage 1 Output Voltage 2 Output Offset Voltage BPF Output Voltage SYMBOL VDD IDD IIL1 IIH1 IIL2 VILC VIHC VOL1 VOH1 VOL2 VOH2 VOS VOUT CONDITITONS VDD Terminal AIN Terminal RSTb/CLKO Terminal VIL1=0V VIH1=5V VIH2=0V OSC2 Terminal IOL1=100µA IOH1=-100µA RSTb/CLKO IOL1=100µA Terminal IOH1=-5µA AOUT Terminal AIN:OPEN AOUT Terminal Sine Wave Input fIN=f1 to f7 VIN=200mVp RD Terminal MIN 4.5 -0.1 0.033 -0.2 0 3.5 0 4.5 0 4.25 3.5 TYP 5.0 6.0 -0.05 0.05 -0.1 4.5 26.0 - (VDD=5V, VSS= 0V, Ta=25°C) MAX UNIT NOTE 6.0 V 12.0 mA -0.033 mA 0.1 -0.05 mA 1.5 V 5.0 0.5 V 5.0 0.5 V 4.75 300 mV dB 9,10,11 V 9,10 Note 9) This specification is tested on condition of fCLK=400kHz (The external clock is input to the OSC2 terminal through the capacitor for AC coupling. Note 10) Each input frequency of f1 to f7 is referred to the table of the " PEAK FREQUENCY ". Note 11) This specification is calculated from " VOUT / VIN ". Ver.2008-07-30 -5- NJU7507A NJU7507A AC CHARACTERISTICS PARAMETER SYMBOL Oscillation Clock Freq fOSC External Clock Frequency fCLK CONDITIONS RSTb/CLKO Terminal VDD=5V RSTb/CLKO Terminal VILC=0V VIHC=VDD MIN 360 tPWRD Slave RSTb Pulse Width tPWRS RSTb Rise/Fall Time tr, tf Master Slave RSTb/CLKO Terminal 440 kHz 12 800 kHz 13 µs 14 µs 15 µs 15 8/fOSC 8/fCLK 12/fOSC 12/fCLK RD Terminal RSTb/CLKO Terminal 400 400 Master RD Pulse Width ( VDD=4.5 to 6.0V, VSS=0V, Ta=25°C) TYP MAX UNIT NOTE 4/fOSC 4/fCLK 6/fOSC 6/fCLK 100 Note 12) The example for the CR Oscillation OSC1 RT: 13k(±2%) CT: 220pF(±5%) RT OSC2 CT *The oscillation clock frequency is calculated from the output frequency of the RSTb/CLKO terminal by 3/2. VSS Note 13) The example for the external clock input Open OSC1 The input signal for the OSC2 terminal should be the condition of the pulse of DUTY50 DUTY50%±10%. Oscillator OSC2 * The oscillation clock frequency is calculated from the output frequency of the RSTb/CLKO terminal by 3/2. Note 14) The output wave form of the RD terminal. 0.8VDD 0.8VDD tPWRD Note 15) The input wave form of the RSTb terminal. tf tPWRS tr 0.8VDD 0.2VDD -6- 0.8VDD 0.2VDD Ver.2008-07-30 NJU7507A NJU7507A NJU3555 NJU3555 APPLICATION CIRCUIT (1) AUDIO IN AUDIO IN Lch AUDIO OUT Rch + + RESONANCE CIRCUIT NJU7305 NJU7305 or NJU7306 NJU7306 AUDIO OUT RESONANCE CIRCUIT *1 ATT *2 AIN OSC1 13k NJU7507A NJU7507A OSC1 220pF RSTb/ CLKO RD AOUT *3 A/D µ CON DISPLAY DRIVER DISPLAY *1 ) The capacitor for AC coupling connected to the AIN terminal should be needed. *2 ) Connecting the attenuator, the dynamic range of the display can be changed. *3 ) When the voltage of the output terminal of the µCON gets over the VSS level, the diode should be connected between the RSTb/CLKO terminal and the output of the µCON. Ver.2008-07-30 -7- NJU7507A NJU7507A APPLICATION CIRCUIT (2) AUDIO IN AUDIO IN Lch Rch + AUDIO OUT + NJU7305 NJU7305 or NJU7306 NJU7306 RESONANCE CIRCUIT AUDIO OUT RESONANCE CIRCUIT *1 ATT ATT *2 *2 AIN AIN OSC1 13k OSC2 NJU7507A NJU7507A NJU7507A NJU7507A OSC2 220pF RSTb/ CLKO RSTb/ CLKO RD AOUT A/D RD AOUT *3 *3 A/D µ CON DISPLAY DRIVER DISPLAY *1 ) The capacitor for AC coupling connected to the AIN terminal should be needed. *2 ) Connecting the attenuator, the dynamic range of the display can be changed. *3 ) When the voltage of the output terminal of the µCON gets over the VSS level, the diode should be connected between the RSTb/CLKO terminal and the output of the µCON. -8- [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2008-07-30