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SN7476N-00 Texas Instruments TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 visit Texas Instruments
SN7476N-10 Texas Instruments TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 visit Texas Instruments

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N7476N Datasheet

Part Manufacturer Description PDF Type
N7476N Signetics Dual J-K Flip-Flop Scan
N7476N Signetics Dual J-K Flip-Flop Scan
N7476N Signetics Dual JK Flip-Flop Scan
N7476N Signetics DUAL JK FLIP - FLOP Scan
N7476N Signetics Integrated Circuits Catalogue 1978/79 Scan

N7476N

Catalog Datasheet MFG & Type PDF Document Tags

7476 truth table

Abstract: 74ls76 jk flip-flop logic symbol and truth table 5V ± 10%; Ta = -55°C to -125°C Plastic DIP Fig A Fig A N7476N â'¢ N74H76N N74LS76N Ceramic DIP
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OCR Scan
74H76 S5476F 7476 truth table 74ls76 jk flip-flop logic symbol and truth table jk flip flop 7476 7476 PIN DIAGRAM pin diagram of 7476 54H/74H76 54LS/74LS76 74LS76 N7476F N74H76F

logic ic 7476 pin diagram

Abstract: and pin diagram of IC 7476 V ± 1 0 % ; T a = - 5 5 ° C to *1 2 5 ° C V cc = Pin 5 GND = Pin 13 Plastic DIP N7476N ·
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OCR Scan
logic ic 7476 pin diagram and pin diagram of IC 7476 logic ic 7476 flip-flop pin diagram pin diagram for IC 7476 pin configuration of 74LS76 IC IC 74LS76 N74LS76F S54H76F S54LS76F S54H76W S54LS76W S5476W

ci 7476

Abstract: 7476 PIN DIAGRAM 5V±5%; TA = 0°C to +70°C Plastic DIP N7476N, N74LS76N note: For information regarding devices
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OCR Scan
ci 7476 pin diagram of ttl 7476 7476 7476 PIN DIAGRAM input and output 7476 J-K Flip-Flop 7476 ttl 1N916 1N3064

jk flip flop 7476

Abstract: 7476 PIN DIAGRAM 0°C to +70°C Plastic DIP N7476N, N74LS76N For information regarding devices processed to Military
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OCR Scan
TTL 74ls76 PIN CONFIGURATION 7476 TTL 7476 J-K Flip-Flop 7476 74LS76 ttl Jk 7476

pin diagram of 7476

Abstract: 7476 J-K Flip-Flop Manual. COMMERCIAL RANGE Vcc = 5 V ± 5 % ; Ta = 0°C to +70°C N7476N, N74LS76N INPUT AND OUTPUT
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OCR Scan
7476 FUNCTION TABLE Jk 74ls76 pin out flip-flop 74ls76 7476 logic diagram 7476 pin configuration Diagram of 7476

pin diagram of 7476

Abstract: PIN CONFIGURATION 7476 Manual. COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to +70°C N7476N, N74LS76N INPUT AND OUTPUT
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OCR Scan
7476 signetics TTL 7476 signetics

PIN CONFIGURATION 7476

Abstract: pin diagram of 7476 COMMERCIAL RANGE VCC = S V ±5% ; T A = 0°C to +70°C N7476N, N74LS76N NOTE: For information regarding
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OCR Scan
LS 7476 74LS76 logic diagram Flip-Flop 7476 Pin Configuration of 7476

55252f

Abstract: rb1-e Signetics Integrated Circuits TTL TYPE NO DESCRIPTION STOCK NO. OUTLINE DRWG. NO. CONNECTION DIAG. NO. N7476N Dual J-K Master-Slave F/F 55234X 2 B55 n7480n Gated Full Adder 52235H 1 B56 N7483N 4-Bit Binary Full Adder 55236F 2 B57 N7483AN 4-Bit Binary Full Adder 55344R 2 B57 N7485N 4-Blt Magnitude Comparator 55237D 2 B59 n7486n Quad 2-lnput Exclusive OR Gate 55238B 1 B60 N7490N Decade Counter 55239X 1 B61 N7491N 8-Bit Shift Register 55240C 1 B62 N7492N Divide-By-Twelve Counter 55241A 1 B63
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OCR Scan
N74121N 55252f rb1-e I8t10 SO3A N74155N N7493N 55242X N7494N 55243H N7495N 55244F