NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS

Datasheet Archive - Datasheet Search Engine

 

Direct from the Manufacturer

Part Manufacturer Description PDF Samples Ordering
PC-SOIC/DIP20-04 Ironwood Electronics SOIC to DIP Package Converters; Top Package Code: SO20A_SO20B_SO20D; Bottom Package Code: 0.3; Top Pitch (mm): 1.27; Bottom Pitch (mm): 2.54; Top Pin Count: 20; Bottom Pin Count: 20; Top Array Size: N/A; Bottom Array Size: N/A; Top Interface: SOIC Land Pattern; Bottom Interface: Thru Hole Pins; Inside Land Dim. - Ouside land dim. (in.): 0.275 - 0.475; Adapter Size Length X Width (in.): 1 x 0.4; Part Description: SOIC to DIP Converter; ri Buy
PC-SOIC/DIP24-01 Ironwood Electronics SOIC to DIP Package Converters; Top Package Code: SOJ24A_SOJ24B_SOJ24C_SOJ24D; Bottom Package Code: 0.3; Top Pitch (mm): 1.27; Bottom Pitch (mm): 2.54; Top Pin Count: 24; Bottom Pin Count: 24; Top Array Size: N/A; Bottom Array Size: N/A; Top Interface: SOIC Land Pattern; Bottom Interface: Thru Hole Pins; Inside Land Dim. - Ouside land dim. (in.): 0.167 - 0.367; Adapter Size Length X Width (in.): 1.2 x 0.4; Part Description: SOIC to DIP Converter; ri Buy
PC-SOIC/DIP8-01 Ironwood Electronics SOIC to DIP Package Converters; Top Package Code: SO8A_S08B_SO8E; Bottom Package Code: 0.3; Top Pitch (mm): 1.27; Bottom Pitch (mm): 2.54; Top Pin Count: 8; Bottom Pin Count: 8; Top Array Size: N/A; Bottom Array Size: N/A; Top Interface: SOIC Land Pattern; Bottom Interface: Thru Hole Pins; Inside Land Dim. - Ouside land dim. (in.): 0.15 - 0.375; Adapter Size Length X Width (in.): 0.4 x 0.4; Part Description: SOIC to DIP Converter; ri Buy

Motorola CMOS Dynamic RAM 1M x 1

Catalog Datasheet Results Type PDF Document Tags
Abstract: 8=x4 9 = x 4 with OE Motorola Component (Qualified) Memory 62 = 5 V CMOS 63 = 3.3 V CMOS 67 = , device numbering schemes, i.e., MCM62990A MCM62990A is a CMOS 16K x 16 and NOT a 512K x 90 device. MPC designates , 256K Address Depth Motorola Master Selection Guide FAST STATIC RAM MODULES (Contact Fast Static , 16K x 15 CacheTag Motorola MPC105 MPC105, Motorola MPC106 MPC106 Flow'-hrough Burst 512KB 512KB Cache 66 MHz , Modules 1M x 32 20/25 ns Now 72 Pin SIMM (SG) Uses eight 4M SRAMs MCM321024 MCM321024 512K x 32 ... Original
datasheet

8 pages,
108.26 Kb

1K x4 static ram 1mx1 DRAM DIP 4Mx8 dram simm 64K CMOS Static RAM motorola MCM54100a MCM63P531 MCM69F536B MCM69P536B 1K x4 static ram application note Motorola CMOS Dynamic RAM 16m x 32 TSOP 400 86 mcm511000 MCM511000A datasheet abstract
datasheet frame
Abstract: Order this document by 5VFPMU32D/D 5VFPMU32D/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1, 2, 4M x 32 , 1M x 32 (4MB), 2M x 32 (8MB) 72­LEAD SMALL OUTLINE DIMM CASE 992­01 BACK FRONT 2 1 PART , APPLICATION 0.227 PC BOARD 11/6/96 © Motorola, Inc. 1996 MOTOROLA DRAM 5VFPMU32D 5VFPMU32D 1 1M, 2M, 4M , 5VFPMU32D 5VFPMU32D 2 Speed MOTOROLA DRAM 1M, 2M, 4M x 32 5 V FPM U 4MB BLOCK DIAGRAM CAS0 LCAS , MOTOROLA DRAM 1M, 2M, 4M x 32 5 V FPM U 16MB BLOCK DIAGRAM CAS0 RAS0 CAS RAS G CAS RAS ... Original
datasheet

20 pages,
255.93 Kb

Motorola CMOS Dynamic RAM 2m x 8 MA321BT08TADG60 MA321BT08TADG70 MA321BT08TADN60 MA321BT08TADN70 MA322BT08TADG60 MA322BT08TADG70 MA324CT00TBDG60 MA324CT00TBDG70 Motorola CMOS Dynamic RAM 1M Motorola CMOS Dynamic RAM 1M x 1 FPM RAM 5VFPMU32D/D 5VFPMU32D/D abstract
datasheet frame
Abstract: Technology Ð Reduces system costs / needs less memory µ MOTOROLA Semiconductor Products Sector 1 , Frames 81 MCF5200 MCF5200 93 893 3 1 1Implemented Mnemonics x Addressing modes x Operand sizes , O N T R O L C Operand Exec Pipeline w Technology Ð 0.42µm TLM CMOS µ MOTOROLA , 2Q97 * Dhrystone 1.1 MIPS using Diab 3.6f compiler µ MOTOROLA Semiconductor Products Sector 1 , * Dhrystone 1.1 MIPS using Diab 3.6f compiler µ MOTOROLA Semiconductor Products Sector 1/97 25 ... Original
datasheet

47 pages,
1381.29 Kb

dhrystone 68020 cold fire 5206 68LC060 68EC030 68000 motorola vme 54XX 52XX green hills ppc compiler green hills ppc compiler manual LC040 SBC 68060 microtek service manual MCF55XX datasheet abstract
datasheet frame
Abstract: SIDE VIEW LOW PROFILE APPLICATION REV 1 1/17/97 M O TO RO LA ) Motorola, Inc. 1997 1M, 2M , 3VEDOU32D 3VEDOU32D 2 MOTOROLA DRAM 1M, 2M, 4M 4MB BLOCK DIAGRAM CASO RASO LCAS RAS 1/01 I/02 I/03 I/04 I/05 I , 3VEDOU32D 3VEDOU32D 4 MOTOROLA DRAM 1M, 2M, 4M 16MB BLOCK DIAGRAM X 32 · 3.3 V · EDO · U Vcc ' C1 - C8 ^ VSS' 0.22 nF (MIN) DRAMs DRAMs MOTOROLA DRAM 3VEDOU32D 3VEDOU32D 5 1M, 2M, 4M X 32 · , X 32 · 3.3 V · EDO · U WRITE CYCLE MOTOROLA DRAM 3VEDOU32D 3VEDOU32D 9 1M, 2M, 4M x 32 · 3.3 V ... OCR Scan
datasheet

20 pages,
646.19 Kb

3VEDOU32D/D 3VEDOU32D/D abstract
datasheet frame
Abstract: 1M x 480 ns DRAM, 1 PAL, code APR405/D APR405/D Logarithmic/Linear Conversion Routines Application , high-density CMOS Memory Table 1 lists the memory configurations of the DSP56004/007 DSP56004/007. On-chip Harvard , contents Table 1 Memory Configurations (Word width is 24 bits) Program ROM Part Type DSP56004 DSP56004 X , , dynamic RAM, ISA bus, Host APR11/D APR11/D Twin CODEC Expansion Board for the DSP56000 DSP56000 ADS Application , Order this document by DSP56004/D DSP56004/D Rev. 2 MOTOROLA SEMICONDUCTOR TECHNICAL DATA SymphonyTM ... Original
datasheet

10 pages,
110.25 Kb

PAL 007 A I2S* sony DSP56007 DSP56004ROM DSP56004 DSP56000 APR7 code fir filter DSP56004/D DSP56004/D abstract
datasheet frame
Abstract: ) consisting of eight MCM514400 MCM514400 DRAMs housed in standard 350-mil-wide SOJ packages and four CMOS 1M x 1 DRAMs , Motorola 1M dynamic RAM. Page mode operation consists of holding the RAS clock active while cycling the CAS , : MCM36200S MCM36200S = 16 ms (Max) MCM36L200S MCM36L200S = 128 ms (Max) • Consists of Sixteen 1M x 4 DRAMs, Eight 1M x 1 DRAMs , Ä0V 2 7 1990 MOTOROLA SEMICONDUCTOR wam-m-m^mm TECHNICAL DATA Product Preview 2M x 36 Bit , capacitor mounted under each DRAM. The MCM514400 MCM514400 is a CMOS high speed, dynamic random access memory ... OCR Scan
datasheet

14 pages,
580.03 Kb

MCM514400 MCM36L200 MCM36200 Motorola CMOS Dynamic RAM 1M x 1 datasheet abstract
datasheet frame
Abstract: tyy k? li-,« MOTOROLA - SEMICONDUCTOR TECHNICAL DATA Order this document by MCM411000/D MCM411000/D 1M x 1 CMOS Dynamic RAM Page Mode The MCM411000 MCM411000 is a 1.0 |i CMOS high-speed dynamic random access memory. It is organized as 1,048,576 one-bit words and fabricated with CMOS silicon-gate process technology. , on a selected row of the 1M dynamic RAM. Read access time in page mode (tQAC) ¡s typically haif the , 5.5 mW (Max, CMOS Levels) MCM41L1000 MCM41L1000 = 1.65 mW (Max, CMOS Levels) MCM411000 MCM411000 MCM41L1000 MCM41L1000 d[ 1 • ... OCR Scan
datasheet

14 pages,
607.79 Kb

822B 411000 Motorola CMOS Dynamic RAM 1M x 1 411000 dram MCM411000/D MCM411000/D abstract
datasheet frame
Abstract: ) M B 72 X B X XX X Motorola Memory Prefix E D O _ Width _ Depth (1 = 1M , CMOS 47 2/6/97 (M ) M O T O R O L A © Motorola, Inc. 1997 1M x72.3V .E D O . B PIN , 3VEDOB72D 3VEDOB72D 2 MOTOROLA DRAM 1 M x 7 2 * 3 V * EDO · B 8MB BLOCK DIAGRAM BO _G2-P > -[> " , 3VEDOB72D 3VEDOB72D 4 MOTOROLA DRAM 1 M x 7 2 * 3 V « EDO · B DC CHARACTERISTICS AND SUPPLY CURRENTS (All , MOTOROLA DRAM 3VEDOB72D 3VEDOB72D 7 1 M x 7 2 » 3 V » EDO · B TIMING DIAGRAMS READ CYCLE 3VEDOB72D 3VEDOB72D 8 ... OCR Scan
datasheet

24 pages,
821.14 Kb

3VEDOB72D/D 3VEDOB72D/D abstract
datasheet frame
Abstract: © Motorola, Inc. 1996 1M, 2M, 4M, 8M X 32 · 5 V · FPM · U PIN ASSIGNMENTS Pin 1 2 3 4 5 6 7 8 9 10 11 12 , OUT Figure 1. Hidden Refresh Cycle 5VFPMU32S 5VFPMU32S 16 MOTOROLA DRAM 1M, 2M, 4M, 8M x 32 · 5 V · , MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1 , 2 , 4 , 8 M Order this document by 5VFPMU32S/D 5VFPMU32S/D X , NC NC vss NC NC Vss NC NC 5VFPMU32S 5VFPMU32S 2 MOTOROLA DRAM 1M, 2M, 4M, 8M X 32 · 5 V · , 1M, 2M, 4M, 8M X 32 · 5 V · FPM · U 8MB BLOCK DIAGRAM CASO DQ0-DQ15 DQ0-DQ15 LCAS RASO ' RAS 1/01 I/02 1 ... OCR Scan
datasheet

20 pages,
709.8 Kb

MCM32C400ASH60 MCM32BT FPM RAM 5VFPMU32S/D 5VFPMU32S/D abstract
datasheet frame
Abstract: Order this document by 5VEDOU32S/D 5VEDOU32S/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1, 2, 4, 8M x , BACK NOT POPULATED ON 4M x 32 (16MB) 12/5/96 © Motorola, Inc. 1996 MOTOROLA DRAM 5VEDOU32S 5VEDOU32S 1 , PD4 5VEDOU32S 5VEDOU32S 2 Speed 32MB MOTOROLA DRAM 1M, 2M, 4M, 8M x 32 5 V EDO U 4MB BLOCK , 4 0.22 µF (MIN) DRAMs MOTOROLA DRAM 1M, 2M, 4M, 8M x 32 5 V EDO U 16MB BLOCK DIAGRAM , C8 VSS MOTOROLA DRAM 0.22 µF (MIN) DRAMs 5VEDOU32S 5VEDOU32S 5 1M, 2M, 4M, 8M x 32 5 V EDO ... Original
datasheet

24 pages,
353.09 Kb

MB324CT00TBSN60 MB321BJ08TASN60 MB321BT08TASG60 MB321BT08TASN60 MB322BJ08TASN60 MB322BT08TASG60 MB324CJ00TBSN60 MB321BJ08TASG60 MB322BJ08TASG60 MB322BT08TASN60 5VEDOU32S/D 5VEDOU32S/D abstract
datasheet frame

Datasheet Content (non pdf)

Abstract Saved from Date Saved File Size Type Download
Over 1.1 million files (1986-2014): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
*AN805/D AN805/D AN805/D AN805/D The 5 Volt, 64K Dynamic RAM Is Here, So Is the 32K, So Is the 16K!!! 2.0MHz MC68B09E MC68B09E MC68B09E MC68B09E System with Transparent Refresh of Dynamic RAM AN971/D AN971/D AN971/D AN971/D Avoiding : BR905/D BR905/D BR905/D BR905/D Military Fast Static RAM Fact Sheet BR915/D BR915/D BR915/D BR915/D The Military 32K x 8 is Available Motorola DRAM & Memory Module Data DL156/D DL156/D DL156/D DL156/D Fast Static RAM Component and Module Data MC88200UM MC88200UM MC88200UM MC88200UM SG172/D SG172/D SG172/D SG172/D Dynamic kRAM Update SG366/D SG366/D SG366/D SG366/D TTL, ECL, CMOS and Special Logic Circuits Selector
www.datasheetarchive.com/files/motorola/design-n/lit/html/br135a/memories.htm
Motorola 25/11/1996 5.89 Kb HTM memories.htm
1M VGA RAM 1M Video RAM 65,536 Colors per TV Video Pixel 5:6:5 RGB Format Motorola Video 4 Mbyte DRAM direct drive (256k x 4, 1M x 4, and 256k x 16 DRAM types supported) Up to 768 x 560 a leader in communications technology worldwide, Motorola MDAD is firmly committed to be the of various Motorola components exists in the present multimedia communications market, tomorrow's short, Motorola is taking charge in creating a complete core technology multimedia communications
www.datasheetarchive.com/files/motorola/design-n/sps/mctg/mdad/mmedia_o.htm
Motorola 25/11/1996 15.39 Kb HTM mmedia_o.htm
The 5 Volt, 64K Dynamic RAM Is Here, So Is the 32K, So Is the 16K!!! *AN806A/D AN806A/D AN806A/D AN806A/D AN941/D AN941/D AN941/D AN941/D A 2.0MHz MC68B09E MC68B09E MC68B09E MC68B09E System with Transparent Refresh of Dynamic RAM AN942/D AN942/D AN942/D AN942/D MC68605 MC68605 MC68605 MC68605 X.25 Protocol Controller AN971/D AN971/D AN971/D AN971/D Avoiding Bus Contention in Fast Access RAM MOTOROLA APPLICATION NOTE AND ENGINEERING BULLETIN ABSTRACTS July 1996 Applications and Product Literature Alphanumeric Listing This file contains the Motorola Applications
www.datasheetarchive.com/files/motorola/design-n/lit/html/br135a/br135apn.htm
Motorola 25/11/1996 72.26 Kb HTM br135apn.htm
. RAM CONTROLLER ALLOWS TO INTER- FACE UP TO : -16 MEGABYTES OF DYNAMIC RAM OR -1 MEGABYTE OF STATIC . . . . . . . . . . . . . . . 15 III.1 THE SWITCHING MATRIX N x 64 KBits/S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 III.5.5.2 1M x n DRAM . . . . . . 42 VI.1 DYNAMIC MEMORIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 VIII.1 IDENTIFICATION AND DYNAMIC COMMAND REGISTER .
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5110-v2.htm
STMicroelectronics 14/06/1999 159.8 Kb HTM 5110-v2.htm
DYNAMIC RAM OR -1 MEGABYTE OF STATIC RAM . INTERRUPT CONTROLLER TO STORE AUTOMATICALLY EVENTS IN III.5.5.2 1M x n DRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 VI.1 DYNAMIC MEMORIES . . . . . . . . 55 VIII.1 IDENTIFICATION AND DYNAMIC COMMAND REGISTER . . . . . . . . . . . IDCR (00)H . . . . . . . . . . . . . . . . . . . 32 Figure 21 : 1M x 16 DRAM Circuit Organization . . . .
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5110-v1.htm
STMicroelectronics 20/10/2000 167.43 Kb HTM 5110-v1.htm
. RAM CONTROLLER ALLOWS TO INTER- FACE UP TO : -16 MEGABYTES OF DYNAMIC RAM OR -1 MEGABYTE OF STATIC . . . . . . . . . . . . . . . 15 III.1 THE SWITCHING MATRIX N x 64 KBits/S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 III.5.5.2 1M x n DRAM . . . . . . 42 VI.1 DYNAMIC MEMORIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 VIII.1 IDENTIFICATION AND DYNAMIC COMMAND REGISTER .
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5110.htm
STMicroelectronics 02/04/1999 159.84 Kb HTM 5110.htm
OR 32 BIT MICROPROCESSORS . RAM CONTROLLER ALLOWS TO INTER- FACE UP TO : -16 MEGABYTES OF DYNAMIC RAM OR -1 MEGABYTE OF STATIC RAM . INTERRUPT CONTROLLER TO STORE AUTOMATICALLY EVENTS IN SHARED MEMORY . . . . . . . 15 III.1 - The Switching Matrix N x 64 KBits/S . . . . . . . . . . . . 1M x n DRAM Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 VI.1 - Dynamic
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5174-v1.htm
STMicroelectronics 02/04/1999 199.18 Kb HTM 5174-v1.htm
ALLOWS TO INTER- FACE UP TO : -16 MEGABYTES OF DYNAMIC RAM OR -1 MEGABYTE OF STATIC RAM . INTERRUPT . 15 III.1 - The Switching Matrix N x 64 KBits/S . . . . . . . . . . . . . . . . . . . . . . . . . 39 III.5.5.2 - 1M x n DRAM Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 VI.1 - Dynamic Memories . . . . . . . . . . . . . . . . . . . . . 68 VIII.1 - Identification and Dynamic
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5174.htm
STMicroelectronics 20/10/2000 212.74 Kb HTM 5174.htm
CONTROLLER ALLOWS TO INTER- FACE UP TO : -16 MEGABYTES OF DYNAMIC RAM OR -1 MEGABYTE OF STATIC RAM . . . . . . . . . . . . 15 III.1 - The Switching Matrix N x 64 KBits/S . . . . . . 39 III.5.5.2 - 1M x n DRAM Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 VI.1 - Dynamic Memories . . . . . . . . . . . . . . . . . . . . . . . . . 68 VIII.1 - Identification and Dynamic Command
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5174-v2.htm
STMicroelectronics 25/05/2000 205.22 Kb HTM 5174-v2.htm
No abstract text available
www.datasheetarchive.com/download/32714451-483227ZC/860um.zip (860UMC.PDF)
Motorola 12/09/1996 4066.41 Kb ZIP 860um.zip