NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| TNETE2008PBE | Texas Instruments | TNETE2008 3.3V 10Mb Octal PHY | 
|
|
|
| F104X8A | Freescale Semiconductor | Vitesse PHY Part # VSC8514XMK-10 Ext Tmp |
|
|
|
| PX1011BI-EL1/G,518 | NXP Semiconductors | IC PCI-EXPRESS X1 PHY 81LFBGA |
|
|
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: single-port 88E1111 product performs all of the physical layer (PHY) functions for half- and full-duplex , testing and diagnostics APPLICATIONS The Marvell Alaska single-port 88E1111 transceiver is the Þrst , PHY (88E1111) MAC Interface Options: ¥ GMII/MII ¥ RGMII ¥ SGMII ¥ TBI ¥ RTBI ¥ Serial , Single-Port PHY (88E1111) Serial Interface Fiber Optics Media Types: ¥ 1000BASE-LX 1000BASE-LX ¥ , Transceiver (88E1111) Fiber Applications Diagram The Marvell Alaska single-port GbE transceivers come with ... | Original |
2 pages, |
88E1111 registers phy 88e1111 88E1111 BCC package sgmii marvell 88e1111 Marvell PHY 88E1111 footprint 88E1111 SFP Marvell PHY 88E1111 alaska sfp 88E1111 88E1111 PCB EVALUATION BOARD 88E1111 Marvell PHY 88E1111 88e1111 mii 88E1111 88E1111 abstract |
|
|||
| Abstract: a LatticeSCTM device and the MARVELL 88E1111/88E1112 devices. Specifically, this technical note discusses the following topics: · Overview of LatticeSC devices and MARVELL AlaskaTM Ultra 88E1111/ 88E1112 88E1112 devices. · Gigabit Ethernet Physical Layer Interoperability testing of the LatticeSC and MARVELL 88E1111 , Cyclic Redundancy Code (CRC) checking. Marvell Alaska Ultra 88E1111/88E1112 Overview 88E1111/88E1112 , between a LatticeSC device and the MARVELL 88E1111/ 88E1112 88E1112 devices. The purpose of these tests is to ... | Original |
10 pages, |
88E1111 "mdio registers" alaska ultra reference design programming 88E1111 Marvell 88e111 EVALUATION BOARD 88E1111 Marvell PHY 88E111 88E1112 board layout marvell 88e111 alaska reference design Marvell PHY 88E1112 88e111 Marvell 88E1111 specification TN1120 TN1120 abstract |
|
|||
| Abstract: On-board Oscillator 2 88E1111 PHY 88E1112 88E1112 PHY SGMII MAC Device SMA Marvell 88E1112/1118 88E1112/1118 , interoperability tests between a LatticeSCTM device and the Marvell 88E1111/88E1112 devices. Specifically, this , 88E1111/ 88E1112 88E1112 devices. · SGMII Physical Layer Interoperability testing of the LatticeSC and Marvell , Interoperability Lattice Semiconductor Marvell Alaska Ultra 88E1111/88E1112 Overview 88E1111/88E1112 , Virtual Cable Tester Software GUI Figure 6. PHY Register Control Panel 6 LatticeSC/Marvell ... | Original |
13 pages, |
sgmii specification ieee 88E1111 "mdio registers" Marvell 88E1111 specification marvell 88E1118 register RGMII 88E1118 phy 88e111 Marvell PHY 88E1118 Datasheet sgmii marvell 88e1111 Marvell PHY 88E1118 88E1112 Marvell PHY 88E1112 88E1112 sGMII TN1127 1000BASE-SX TN1127 abstract |
|
|||
| Abstract: RJ45 88E1111 PHY On-board Oscillator 88E1112 88E1112 PHY SGMII MAC Device SMA Marvell 88E1112 88E1112 , interoperability tests between a LatticeECP2MTM device and the Marvell 88E1111/88E1112 devices. Specifically, this , 88E1111/ 88E1112 88E1112 devices. · SGMII Physical Layer Interoperability testing of the LatticeECP2M and Marvell , Marvell 88E1111/ 88E1112 88E1112 devices. The purpose of these tests is to confirm the correct processing of , 12. SMB-2000 SMB-2000 Counter Window Marvell 88E1112/88E111 88E1112/88E111 Evaluation Board In one direction, the 88E1111 ... | Original |
12 pages, |
EVALUATION BOARD 88E1111 Alaska Ultra 88E1111 88E1111 PHY registers 88E1111 "mdio registers" programming 88E1111 sgmii Marvell PHY 88E1111 alaska Marvell 88E1112 Marvell PHY 88E1118 Marvell 88E1111 88e1111 SGMII mode SFP EVAL BOARD TN1133 1000BASE-SX TN1133 abstract |
|
|||
| Abstract: interoperability test between a LatticeECP2MTM device and the Marvell® Alaska® Ultra 88E1111/ 88E1112 88E1112 devices. The , soft IP) Marvell Alaska Ultra 88E1111/88E1112 Overview 88E1111/88E1112 Features The Alaska Ultra , Evaluation Board The Marvell 88E1112 88E1112 64-QFN 64-QFN Evaluation Board includes among others: · 88E1111 device · , tests between the LatticeECP2M device and the Marvell 88E1111/ 88E1112 88E1112 devices. The purpose of these , 1000BASE-T 1000BASE-T TX RX 2 2 RJ45 88E1111 PHY On-board Oscillator 88E1112 88E1112 PHY SMA ... | Original |
12 pages, |
1000BASE-X Marvell 88E1111 specification Marvell PHY 88E1112 Gigabit Ethernet PHY TBI 88E1111 fiber Marvell 88e111 88e111 88E1118 RGMII 88E1112 board layout Marvell 88E1111 Marvell PHY 88E1118 Marvell 88E1112 TN1163 1000BASE-X TN1163 abstract |
|
|||
| Abstract: designed of physical layer IC (Marvell 88E1111), which can be programmed via two-wire interface with the device address 0xA6. For details of PHY IC registers in 88E1111, see Marvell document "Alaska Ultra , www.atmel.com 4. "Alaska Ultra 88E1111 Integrated 10/100/1000 Gigabit Ethernet Transceiver", Marvell , in 10/100/1000 Base-T with SGMII interface by reconfiguration of the PHY within the SFP. 2. This , of the PHY within the SFP. 3. This part supports the 10/100/1000 Base-T with SGMII interface by ... | Original |
8 pages, |
88E1111 mac atmel 88e1111 board layout 88E1111 SFP sgmii marvell sgmii 88E1111 Marvell PHY 88E1111 alaska 88E1111 register 88E1111 current Alaska Ultra 88E1111 88E1111 registers sgmii marvell 88e1111 Marvell 88E1111 Marvell PHY 88E1111 Datasheet LCP-1250RJ3SR 1000BASE-T LCP-1250RJ3SR abstract |
|
|||
| Abstract: layer IC (Marvell 88E1111), which can be programmed via two-wire interface with the device address 0xAC. For details of PHY IC registers in 88E1111, see Marvell document "Alaska Ultra 88E1111 Integrated , supports the SGMII interface without clock on MAC side. Gigabit PHY device is integrated internally Internal PHY IC is configurable by host system software via SFP 2-wire-interface. Description The , configure the PHY device inner LCP-1250RJ3SR-S LCP-1250RJ3SR-S via SFP two-wire-interface. The SGMII interface without clock ... | Original |
9 pages, |
sgmii mode sfp 88E1111 PHY register 24 88e1111 SGMII mode 88E111 Marvell alaska 88E1111 Marvell PHY 88E1111 layout 88E1111 schematic MARV Marvell PHY 88E1111 schematic 88E111* HWCFG_MODE LCP-1250RJ3SR-S 1000BASE-T LCP-1250RJ3SR-S abstract |
|
|||
| Abstract: layer IC (Marvell 88E1111), which can be programmed via two-wire interface with the device address 0xAC. For details of PHY IC registers in 88E1111, see Marvell document "Alaska Ultra 88E1111 Integrated , Gigabit PHY device is integrated internally Internal PHY IC is configurable by host system software via , , the software can configure the PHY device inner LCP-1250RJ3SR-S LCP-1250RJ3SR-S via SFP two-wire-interface. Dec. , interface by reconfiguration of the PHY within the SFP. 2. This part uses the SFP's Rx-Los pin for link ... | Original |
8 pages, |
88E1111 PHY registers 88E1111 mac atmel sfp autonegotiation 88e1111 board layout sgmii marvell 88E1111 and SFP applications LCP-1250RJ3SR-L Alaska Ultra 88E1111 LCP-1250RJ3SR-S Marvell 88E1111 Marvell 88E1111 specification marvell ethernet switch sgmii LCP-1250RJ3SR-S abstract |
|
|||
| Abstract: internally designed of physical layer IC (Marvell 88E1111), which can be programmed via two-wire interface with the device address 0xAC. For details of PHY IC registers in 88E1111, see Marvell document "Alaska , software can configure the PHY device inner LCP-1250RJ3SR-L LCP-1250RJ3SR-L via SFP two-wire-inter- face. LCP-1250RJ3SR-L LCP-1250RJ3SR-L , Internal PHY IC is configurable by host system software via SFP 2-wire-interface Applications Gigabit , by reconfiguration of the PHY within the SFP. 3. This part supports the 10/100/1000 Base-T with SGMII ... | Original |
9 pages, |
Marvell PHY 88E1111 88E1111 schematic 88E111* HWCFG_MODE LCP-1250RJ3SR-L LCP-1250RJ3SR-L abstract |
|
|||
| Abstract: 88E1111), which can be programmed via two-wire interface with the device address 0xAC. For details of PHY IC registers in 88E1111, see Marvell document "Alaska Ultra 88E1111 Integrated Gigabit Ethernet , LCP-1250RJ3SR-L LCP-1250RJ3SR-L supports RX_LOS enabled Internal PHY IC is configurable by host system software via SFP , configure the PHY device inner LCP-1250RJ3SR-L LCP-1250RJ3SR-L via SFP two-wire-interface. LCP-1250RJ3SR-L LCP-1250RJ3SR-L can also be , Base-T with SGMII interface by reconfiguration of the PHY within the SFP. 2. This part uses the SFP's ... | Original |
8 pages, |
Marvell PHY 88E1111 layout 88e1111 SGMII mode 88E1111 full LCP-1250RJ3SR-L LCP-1250RJ3SR-L abstract |
|
|||