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FEDL6650DIGEST-05 MSM6650 MSM6375 AR761 AR762 MSM6652/53/54/55/56 - Datasheet Archive
FEDL6650DIGEST-05 Issue Date: Jan. 11, 2002 MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54-xx, MSM66P56-xx,
OKI Semiconductor FEDL6650DIGEST-05 FEDL6650DIGEST-05 Issue Date: Jan. 11, 2002 MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54-xx, MSM66P56-xx, MSM6650 MSM6650 Internal Mask ROM Voice Synthesis IC, Internal One-Time-Programmable (OTP) ROM Voice Synthesis IC, External ROM Drive Voice Synthesis IC This document contains minimum specifications. For full specifications, please contact your nearest Oki office or representative. GENERAL DESCRIPTION The MSM6650 MSM6650 family is the successor to OKI's MSM6375 MSM6375 family. To ensure high-quality voice synthesis, the MSM6650 MSM6650 family members offer adaptive differential pulse-code modulation (ADPCM) playback, pulse-code modulation (PCM) playback, 12-bit D/A conversion, and on-chip 40 dB/octave low-pass filter (LPF). The conventional "beep" tones and 2-channel playback are now easier to use. OKI has added additional functions such as melody play, fade-out, and random playback. OKI has improved external control by adding an Edit ROM. The Edit ROM can be used to form sentences by linking phrases. The MSM6650 MSM6650 family members can support a variety of applications as it can function in either Standalone Mode or Microcontroller Interface Mode. In Microcontroller Interface Mode, serial input control is available. Serial input control minimizes the number of microcontroller port pins required for voice synthesis control. The MSM6650 MSM6650 family includes an internal mask ROM version, internal one-time-programmable (OTP) ROM version, and external ROM version. The features of the MSM6650 MSM6650 family devices are as follows. · MSM6652/53/54/55/56-xxx These devices are single-chip voice synthesizers with an on-chip mask ROM using the CMOS technology. Standalone Mode or Microcontroller Interface Mode can be selected by mask option. · MSM6652A/53A/54A/55A/56A/58A-xxx The trial production period for these devices is shorter than those described above. These devices are suitable for developing prototype models and concept demonstration of new products. · MSM66P54-xx, MSM66P56-xx The device is a single-chip CMOS voice synthesizer with one-time-programmable (OTP) ROM. Standalone and Microcontroller Interface Modes are selected by using a code (01-04). The user can easily write voice data using the development tool AR761 AR761 or AR762 AR762, or P54 adapter. Unlike the mask ROM version, the OTP version is suited to applications which requires a small lot production of different type devices or short delivery time. · MSM6650 MSM6650 The MSM6650 MSM6650 device can directly connect external ROM or EPROM of up to 64 Mbits, which stores voice data. This device is ideally suited to an evaluation IC for the MSM6650 MSM6650 family because its circuit configuration is identical to those of the mask ROM-based and OTP version devices. 1/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family · Option Table Pin Name Microcontroller interface Mode Serial Input Standalone Mode Parallel Input With Standby No Standby MSM6652/53/54/55/56 MSM6652/53/54/55/56 MSM6652A/53A/54A/ MSM6652A/53A/54A/ 55A/56A/58A - MSM66P54/P56 MSM66P54/P56 - 01 02 03 04 CPU "H" "H" "L" "L" MSM6650 MSM6650 SERIAL "H" "L" "L" "L" STBY - - "L" "H" *1. *2. *1 Mask Option *2 The options for the mask ROM-based devices are mask options. The user should send OKI an option list before starting development. A sample of option list is shown below. A code of OTP version device corresponds to one of the options. The user should specify either MSM66P54-03 MSM66P54-03 or MSM66P54-04 MSM66P54-04 or MSM66P56-03 MSM66P56-03 or MSM66P56-04 MSM66P56-04. (In this case, no option list is required.) Oki Electric Industry Co., Ltd. Date: Option List You are requested to develop MSM665X-XXX MSM665X-XXX on the following conditions. 1. Options There are four options for the MSM6650 MSM6650 family. Choose and circle the desired option. Option Interface mode Input Standby conversion Option A Microcontroller Serial - Option B Microcontroller Parallel - Option C Standalone - Yes Option D Standalone - No 2. Package and quantity Item Ceramic sample Mold sample Mass production Package (circle the desired one) Quantity Note 18-pin DIP (ceramic) 24-pin SOP (ceramic) chip pcs Up to 10 samples. Operating temp. : 10 to 30°C 18-pin DIP (plastic) 24-pin SOP (plastic) chip pcs Up to 50 samples 18-pin DIP (plastic) 24-pin SOP (plastic) chip pcs per lot monthly Signed by Title : Company name : 2/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family STANDALONE MODE FEATURES Maximum playback time (sec) Device name ROM size fSAM = 4.0 kHz fSAM = 6.4 kHz fSAM = 8.0 kHz fSAM = 16 kHz MSM6652 MSM6652, 6652A 288 Kbits 16.9 10.5 8.4 4.2 MSM6653 MSM6653, 6653A 544 Kbits 31.2 19.5 15.6 7.8 MSM6654 MSM6654, 6654A 1 Mbit 63.8 39.9 31.9 15.9 MSM6655 MSM6655, 6655A 1.5 Mbits 96.5 60.3 48.2 24.1 MSM6656 MSM6656, 6656A 2 Mbits 129.1 80.7 64.5 32.2 MSM6658A MSM6658A 4 Mbits 259.7 162.9 129.8 64.9 MSM66P54 MSM66P54 1 Mbit 63.8 39.9 31.9 15.9 MSM66P56 MSM66P56 MSM6650 MSM6650 2 Mbit 129.1 80.7 64.5 32.2 64 Mbits (Max) 4194.3 2620.5 2096.4 1048.2 Note: Actual voice ROM area is smaller by 22 Kbits. · 4-bit ADPCM or 8-bit PCM sound generation · Melody function · Edit ROM function · Two-channel mixing function · Built-in random playback function · Fade-out function via four-step sound volume attenuation · Built-in beep tone of 0.5 kHz, 1.0 kHz, 1.3 kHz, or 2.0 kHz selectable with a specific code · Sampling frequency of 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz, or 32.0 kHz (32 kHz sampling is not possible when using RC oscillation) · Up to 120 phrases · Built-in 12-bit D/A converter · Built-in 40 dB/octave low-pass filter · Standby function · Selectable RC or ceramic oscillation · Package options: 18-pin plastic DIP (DIP18-P-300-2 DIP18-P-300-2.54) (Product name: MSM6652-xxxRS/MSM6653-xxxRS/ MSM6654-xxxRS/MSM6655-xxxRS/ MSM6656-xxxRS/MSM6652A-xxxRS/ MSM6653A-xxxRS/MSM6654A-xxxRS/ MSM6655A-xxxRS/MSM6656A-xxxRS/ MSM6658A-xxxRS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name: MSM6652-xxxGS-K/MSM6653-xxxGS-K/ MSM6654-xxxGS-K/MSM6655-xxxGS-K/ MSM6656-xxxGS-K/MSM6652A-xxxGS-K/ MSM6653A-xxxGS-K/MSM6654A-xxxGS-K/ MSM6655A-xxxGS-K/MSM6656A-xxxGS-K/ MSM6658A-xxxGS-K/MSM66P54-03GS-K/ MSM66P54-04GS-K/MSM66P56-03GS-K/ MSM66P54-04GS-K/MSM66P56-03GS-K/ MSM66P56-04GS-K MSM66P56-04GS-K) 20-pin plastic DIP (DIP20-P-300-2 DIP20-P-300-2.54-W1 54-W1) (Product name: MSM66P54-03RS/MSM66P54-04RS/ MSM66P54-03RS/MSM66P54-04RS/ MSM66P56-03RS/MSM66P56-04RS MSM66P56-03RS/MSM66P56-04RS) 64-pin plastic QFP (QFP64-P-1420-1 QFP64-P-1420-1.00-BK 00-BK) (Product name: MSM6650GS-BK MSM6650GS-BK) 64-pin plastic SDIP (SDIP64-P-750-1 SDIP64-P-750-1.778) (Product name: MSM6650SS MSM6650SS) 3/46 Random Circuit Address & Switching Controller OSC3 OSC2 7 RESET VDD GND Timing Controller 16 Bit (MSM6652/52A MSM6652/52A) 17 Bit (MSM6653/53A MSM6653/53A) 17 Bit (MSM6654/54A MSM6654/54A) 18 Bit (MSM6655/55A MSM6655/55A) 18 Bit (MSM6656/56A MSM6656/56A) 19 Bit (MSM6658A MSM6658A) Address Counter 16 Bit (MSM6652/52A MSM6652/52A) 17 Bit (MSM6653/53A MSM6653/53A) 17 Bit (MSM6654/54A MSM6654/54A) 18 Bit (MSM6655/55A MSM6655/55A) 18 Bit (MSM6656/56A MSM6656/56A) 19 Bit (MSM6658A MSM6658A) Multiplexer BEEP Tone Generator Melody Generator DATA Controller 8 AOUT LPF 12 Bit DAC 12 PCM Synthesizer ADPCM Synthesizer (Containing 22 Kbit Phrase Control Table & Phrase Address Table) OKI Semiconductor XT/CR OSC Ceramic/ Crystal/RC BUSY OSC1 I/O Interface RND TEST A2 A1 A0 SW3 SW2 SW1 SW0 288 Kbit (MSM6652/52A MSM6652/52A) 544 Kbit (MSM6653/53A MSM6653/53A) 1 Mbit (MSM6654/54A MSM6654/54A) 1.5 Mbit (MSM6655/55A MSM6655/55A) 2 Mbit (MSM6656/56A MSM6656/56A) 4 Mbit (MSM6658A MSM6658A) ROM FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family BLOCK DIAGRAMS MSM6652/53/54/55/56-xxx MSM6652A/53A/54A/55A/56A/58A-xxx 4/46 Random Circuit Address & Switching Controller OSC3 OSC2 7 RESET VDD GND Timing Controller Address Counter 17 Bit (MSM66P54-xx) 18 Bit (MSM66P56-xx) Multiplexer 17 Bit (MSM66P54-xx) 18 Bit (MSM66P56-xx) BEEP Tone Generator Melody Generator DATA Controller (Containing 22 Kbit Phrase Control Table & Phrase Address Table) 1 Mbit OTP ROM (MSM66P54-xx) 2 Mbit OTP ROM (MSM66P56-xx) PGM AOUT LPF 12 Bit DAC 12 PCM Synthesizer ADPCM Synthesizer 8 OKI Semiconductor XT/CR OSC (Ceramic/ Crystal/RC) BUSY OSC1 I/O Interface RND TEST A2 A1 A0 SW3 SW2 SW1 SW0 Program Circuit VPP FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family MSM66P54/P56-xx 5/46 Random Circuit Controller Switching Address & OSC3 XT/OSC2 Timing Controller Counter 23 Bit Address 23 Bit Multiplexer D7 LPF 12 Bit DAC 12 PCM Synthesizer ADPCM Synthesizer 8 8 Bit LATCH AGND AVDD AOUT BEEP Tone Generator Generator Melody DATA Controller RESET CPU STBY TEST2 DVDD DGND 7 RA0 D0 OKI Semiconductor XT/CR OSC (Ceramic/ Crystal/RC) CE RCS BUSY NAR IBUSY STANDBY XT/OSC1 I/O Interface RND TEST1, 3 A2 A1 A0 SW3 SW2 SW1 SW0 RA22 FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family MSM6650 MSM6650 6/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family PIN CONFIGURATION (TOP VIEW) The MSM66P54-xx and MSM66P56-xx has two more pins than the MSM6652-6658A MSM6652-6658A while their pin configurations are identical. The additional two pins (VPP, PGM) of the MSM66P54-xx/P56-xx may be open at playback after completion of writing. MSM6652-6658A MSM6652-6658A (Mask ROM) MSM66P54/P56 MSM66P54/P56 (OTP) 1 20 PGM 17 SW2 A0 2 19 SW3 A2 3 16 SW1 A1 3 18 SW2 TEST 4 15 SW0 A2 4 17 SW1 RESET 5 14 RND TEST 5 16 SW0 15 RND A0 1 18 SW3 A1 2 VPP BUSY 6 13 OSC3 RESET 6 7 12 OSC2 BUSY 7 14 OSC3 AOUT 8 11 OSC1 XT/CR 8 13 OSC2 10 AOUT 9 12 OSC1 XT/CR GND 9 VDD GND 10 18-Pin Plastic DIP 11 VDD 20-Pin Plastic DIP MSM6652-xxxRS, MSM6653-xxxRS, MSM6654-xxxRS, MSM6655-xxxRS, MSM6656-xxxRS, MSM6652A-xxxRS, MSM6653A-xxxRS, MSM6654A-xxxRS, MSM6655A-xxxRS, MSM6656A-xxxRS, MSM6658A-xxxRS MSM66P54-03/-04RS MSM66P54-03/-04RS MSM66P56-03/-04RS MSM66P56-03/-04RS MSM6652-6658A MSM6652-6658A (Mask ROM) MSM66P54/P56 MSM66P54/P56 (OTP) 1 24 GND OSC1 2 23 AOUT OSC2 3 22 XT/CR NC 4 21 NC OSC3 5 20 NC NC 6 19 NC 18 NC PGM 7 18 VPP 8 17 RESET RND 8 17 RESET 9 16 TEST SW0 9 16 TEST SW1 10 15 A2 SW1 10 15 A2 SW2 11 14 A1 SW2 11 14 A1 SW3 12 13 A0 SW3 12 13 A0 1 24 GND OSC1 2 23 AOUT OSC2 3 22 XT/CR NC 4 21 NC OSC3 5 20 NC 6 19 NC 7 RND SW0 VDD BUSY 24-Pin Plastic SOP SM6652-xxxGS-K, MSM6653-xxxGS-K, MSM6654-xxxGS-K, MSM6655-xxxGS-K, MSM6656-xxxGS-K, MSM6652A-xxxGS-K, MSM6653A-xxxGS-K, MSM6654A-xxxGS-K, MSM6655A-xxxGS-K, MSM6656A-xxxGS-K, MSM6658A-xxxGS-K VDD BUSY 24-Pin Plastic SOP SM66P54-03/-04GS-K SM66P54-03/-04GS-K MSM66P56-03/-04GS-K MSM66P56-03/-04GS-K 7/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family MSM6650 MSM6650 52 53 54 55 56 57 58 59 60 61 62 51 2 50 3 49 4 48 5 47 6 46 7 45 8 44 RA10 RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 D7 D6 D5 D4 D3 D2 D1 NC CE RCS D0 32 33 31 34 19 30 35 18 29 17 RESET 36 28 37 16 27 38 15 26 39 14 25 13 A1 A2 TEST3 40 24 41 12 23 42 11 22 43 21 9 10 20 OSC3 TEST1 RND XT/CR CPU TEST2 IBUSY NC 1 STANDBY SW0 SW1 SW2 SW3 A0 NC NC BUSY NAR AOUT AGND DGND AVDD DVDD XT/OSC1 XT/OSC2 63 64 STBY RA22 RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14 RA13 RA12 RA11 Product name: MSM6650GS-BK MSM6650GS-BK NC: No connection 64-Pin Plastic QFP 8/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family Product name: MSM6650SS MSM6650SS XT/OSC2 1 64 XT/OSC1 OSC3 2 63 DVDD TEST1 3 62 AVDD RND 4 61 DGND XT/CR 5 60 AGND CPU 6 59 AOUT TEST2 7 58 NAR IBUSY 8 57 BUSY NC 9 56 NC STANDBY 10 SW0 11 55 54 STBY RA22 SW1 12 53 RA21 SW2 13 52 RA20 SW3 14 51 RA19 A0 15 50 RA18 A1 16 49 RA17 A2 17 TEST3 18 48 RA16 47 RA15 RESET 19 46 RA14 CE RCS 21 45 RA13 44 RA12 D0 22 43 RA11 NC 23 42 RA10 D1 24 41 NC D2 25 40 RA9 D3 26 39 RA8 D4 27 38 RA7 D5 28 37 RA6 D6 29 36 RA5 D7 30 35 RA4 RA0 RA1 31 34 RA3 32 33 RA2 20 NC: No connection 64-Pin Plastic SDIP 9/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family PIN DESCRIPTIONS 1. MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx 18-Pin plastic DIP Pin Symbol Type Description 5 RESET I Reset. Setting this pin to "L" puts the LSI In standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. This pin has an internal pull-up resistor. 6 BUSY O Busy. This pin outputs a "L" level during playback. At power-on, this pin Is at "H" level. 7 XT/CR I XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. 8 AOUT O Sound Output. This is the synthesized output pin of the internal low-pass filter. 11 OSC1 I Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. 12 OSC2 O Oscillator 2. This pin is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. 13 OSC3 O Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level in standby status. 14 RND I Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an Internal pull-up resistor. 15-18 SW0-SW3 I Phrase Inputs. These pins are phrase input pins corresponding to playback. If the Input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. 1-3 A0-A2 I Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. 9 GND - Ground. 10 VDD - Power supply. Insert a 0.1 µF or more bypass capacitor between this pin and GND. 4 TEST I Test Mode. Set to "H" level. This pin has an Internal pull-up resistor 10/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family 2. MSM66P54-xx, MSM66P56-xx 20-Pin plastic DIP Pin Symbol Type Description 6 RESET I Reset. Setting this pin to "L" puts the LSI in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. This pin has an internal pull-up resistor. 7 BUSY O Busy. This pin outputs a "L" level during playback. At power-on, this pin Is at "H" level. 8 XT/CR I XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. 9 AOUT O Sound Output. This is the synthesized output pin of the internal low-pass filter. 12 OSC1 I Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. 13 OSC2 O Oscillator 2. This pin Is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. 14 OSC3 O Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level In standby status. 15 RND I Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an Internal pull-up resistor. 16-19 SW0-SW3 I Phrase Inputs. These pins are phrase Input pins corresponding to playback. If the Input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. 2-4 A0-A2 I Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. 10 GND - Ground. 11 VDD - Power supply. Insert a 0.1 µF or more bypass capacitor between this pin and GND. 5 TEST I 1 VPP - Power supply used when writing data to Internal OTP ROM. Leave open or set to "H" level during playback. 20 PGM I Interface with voice analysis edit tool AR203 AR203 or AR204 AR204. Set to "L" level or leave open during playback. Test Mode. Set to "H" level. This pin has an Internal pull-up resistor. 11/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family 3. MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54-xx, MSM66P56-xx 24-Pin plastic SOP Pin Symbol Type Description 17 RESET I Reset. Setting this pin to "L" puts the LSI in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. This pin has an internal pull-up resistor. 20 BUSY O Busy. This pin outputs a "L" level during playback. At power-on, this pin Is at "H" level. 22 XT/CR I XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. 23 AOUT O Sound Output. This is the synthesized output pin of the internal low-pass filter. 2 OSC1 I Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. 3 OSC2 O Oscillator 2. This pin Is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. 5 OSC3 O Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level In standby status. 8 RND I Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an Internal pull-up resistor. 9-12 SW0-SW3 I Phrase Inputs. These pins are phrase Input pins corresponding to playback. If the Input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. 13-15 A0-A2 I Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. 24 GND - Ground. 1 VDD - Power supply. Insert a 0.1 µF or more bypass capacitor between this pin and GND. 16 TEST I 18 VPP* - Power supply used when writing data to Internal OTP ROM. Leave pen or set to "H" level during playback. 7 PGM* I Interface with voice analysis edit tool AR203 AR203 or AR204 AR204. Set to "L" level or leave open during playback. Test Mode. Set to "H" level. This pin has an Internal pull-up resistor. * Pins for MSM66P54/56-xx only 12/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family 4. MSM6650 MSM6650 64-Pin plastic QFP (64-Pin plastic SDIP) Pin Symbol Type Description 29 (19) RESET I Reset. Setting this pin to "L" puts the LSI in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. This pin has an internal pull-up resistor. 3 (57) BUSY O Busy. This pin outputs a "L" level during playback. At power-on, this pin Is at "H" level. 15 (5) XT/CR I XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. 5 (59) AOUT O Sound Output. This is the synthesized output pin of the internal low-pass filter. 10 (64) XT/OSC1 I Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. 11 (1) XT/OSC2 O Oscillator 2. This pin Is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. 12 (2) OSC3 O Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level In standby status. 14 (4) RND I Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an Internal pull-up resistor. 21-24 (11-14) SW0-SW3 I Phrase Inputs. These pins are phrase Input pins corresponding to playback. If the input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. 25-27 (15-17) A0-A2 I Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. 13/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family Pin Symbol Type 6 (60) AGND - Description 7 (61) DGND - Digital ground pin. Analog ground pin. 8 (62) AVDD - Analog power pin. Insert a 0.1 µF or more bypass capacitor in between this pin and AGND. 9 (63) DVDD - Digital power pin. Insert a 0.1 µF or more bypass capacitor in between this pin and DGND. 16 (6) CPU I CPU Mode. Set to "L" level to select Standalone Mode. Set to "H" level to select Microcontroller Interface Mode. 13, 28 (3, 18) TEST1, 3 I Test. Set these pins to "H" level. The TEST1 and TEST3 pins have internal pull-up resistor. 17 (7) TEST2 I Test Set this pin to "L" level. 18 (8) IBUSY O l Busy. Outputs a "L" level during voice playback (except during standby conversion time), or when the AOUT pin is at half VDD level. 20 (10) STANDBY O Standby indicator. This output pin remains at "L" level during oscillation. 30 (20) CE O Chip Enable. CE is a timing output pin to control read of external memory. This pin outputs when RCS is at the "L" level. This pin outputs "H" level when RCS is at the "H" level. 31 (21) RCS I Read Chip Select. The data bits D0-D7 are internally pulled down when RCS is high. Addresses and CE are output when RCS is at "L" level. The RA22-RA0 RA22-RA0 address pins become high impedance and CE pin outputs "H" level when RCS is at the "H" level. 32 34-40 (22, 2430) D0-D7 I External Memory Data Bus. Data Is input when RCS Is low When RCS is high, these pins become low due to Internal pull-down resistors. 41-63 (31-40, 42-54) RA0-RA22 RA0-RA22 O External Memory Address. These are address pins for an external memory output when RCS Is low. These pins become high impedance status If RCS is in "H" level. 64 (55) STBY I Standby Contorl. If set to "L" level, the MSM6650 MSM6650 enters standby mode 0.2 seconds after voice ends. If set to "H" level, the MSM6650 MSM6650 AOUT output maintains half VDD after voice ends. 14/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family ABSOLUTE MAXIMUM RATINGS (GND = 0 V) Parameter Symbol Power supply voltage VDD Input voltage VIN Storage temperature TSTG Condition Rating V 55 to +150 - V 0.3 to VDD + 0.3 Ta = 25°C Unit 0.3 to +7.0 °C RECOMMENDED OPERATING CONDITIONS (GND = 0 V) Parameter Symbol Condition Range Unit VDD MSM6652-56 MSM6652-56, MSM6650 MSM6650, MSM6652A-56A MSM6652A-56A 2.4 to 5.5 V VDD MSM6658A MSM6658A, MSM66P54/P56 MSM66P54/P56 3.5 to 5.5 V Operating temperature TOP - 40 to +85 °C Master clock frequency 1 fOSC1 When crystal selected Master clock frequency 2 fOSC2 When RC selected (*) Power supply voltage Min. Typ. Max. 3.5 4.096 4.5 200 256 300 MHz kHz * If RC oscillation is selected, 32 kHz sampling frequency cannot be selected. 15/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family ELECTRICAL CHARACTERISTICS DC Characteristics (VDD = 5.0 V, GND = 0 V, Ta = 40 to +85°C) Parameter "H" input voltage Symbol Condition Min. Typ. Max. Unit VIH - 4.2 - - V "L" input voltage VIL - - - 0.8 V "H" output voltage VOH lOH = 1 mA 4.6 - - V "L" output voltage VOL lOL = 2 mA - - 0.4 V "H" input current 1 lIH1 VIH = VDD - - 10 µA "H" input current 2 lIH2 Internal pull-down resistance 30 90 200 µA "L" input current 1 lIL1 VIL= GND 10 - - µA "L" input current 2 (note) lIL2 Internal pull-up resistance 200 90 30 µA Operating power consumption IDD - - 6 10 mA Standby power consumption lDS Ta = 40°C to +50°C - - 10 µA Ta = 40°C to +85°C - - 30 µA DC Characteristics (VDD = 3.1 V, GND = 0 V, Ta = 40 to +85°C) Parameter Symbol Condition Min. Typ. Max. Unit "H" input voltage VIH - 2.7 "L" input voltage VIL - - - - V - 0.5 V "H" output voltage VOH lOH = 1 mA 2.6 - - V "L" output voltage VOL "H" input current 1 lIH1 lOL = 2 mA - - 0.4 V VIH = VDD - - 10 µA "H" input current 2 lIH2 Internal pull-down resistance 10 30 100 µA "L" input current 1 lIL1 VIL = GND 10 - - µA "L" input current 2 lIL2 Internal pull-up resistance 100 30 10 µA Operating power consumption IDD - - 4 7 mA Standby power consumption lDS Ta = 40°C to +50°C - - 5 µA Ta = 40°C to +85°C - - 20 µA LPF driving resistance RAOUT When LPF output is selected 50 - - k LPF output impedance RLPF IF = 100 µA - 1 3 k 16/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family APPLICATION CIRCUITS GND OSC1 A2 OSC3 OSC2 A1 RND A0 TEST XT/CR SW3 SW2 SW1 SW0 AOUT MSM6652/53/54/55/56 MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56 MSM66P54/P56 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VDD (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx) Application Circuit in Standalone Mode Supporting 15 Switch-Selected Phrases 17/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx) S4 S3 S2 S1 SW1 SW2 SW3 TEST RND XT/CR A0 MSM6652/53/54/55/56 MSM6652/53/54/55/56 SW0 MSM6652A/53A/54A/55A/56A/58A MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56 MSM66P54/P56 VDD A1 VDD AOUT OSC3 OSC2 OSC1 A2 GND Application Circuit in Standalone Mode Supporting Four Switch-Selected Words Switches and Playback Addresses A2 A1 A0 SW3 SW2 SW1 SW0 ADR S1 0 0 0 0 0 0 1 01 S2 0 0 0 0 0 1 0 02 S3 0 0 0 0 1 0 0 04 S4 0 0 0 1 0 0 0 08 18/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family CE GND OSC1 A2 OSC2 A1 OSC3 OE O0 O7 D7 XT/CR D0 TEST1, 3 RND CE A0 SW2 SW1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SW3 A0 A15 AOUT RA15 SW0 MSM6650 MSM6650 RA0 VPP DVDD AVDD MSM27C512 MSM27C512 DGND AGND VCC (MSM6650 MSM6650) Application Circuit in Standalone Mode Supporting 15 Switch-Selected Phrases 19/46 MSM6650 MSM6650 VDD CE CE GND O0 O0 A0 A16 OE VPP O7 MSM27C101 MSM27C101 O7 A0 A16 OE VPP 74HC139 74HC139 VDD MSM27C101 MSM27C101 GND CE O0 O7 A0 A16 OE VPP VDD MSM27C101 MSM27C101 GND CE O0 O7 A0 A16 OE VPP VDD MSM27C101 MSM27C101 GND OKI Semiconductor DGND AGND RA0 TEST1 TEST3 D7 RND TEST2 STBY D0 XT/CR CPU OSC3 A0 OSC2 A1 OSC1 A2 DVDD AVDD AOUT CE RA18 SW0 RA17 SW1 RA16 SW2 SW3 2G 1B 1Y3 1Y2 1Y1 1A 1Y0 1G FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family (MSM6650 MSM6650) Application Circuit in Standalone Mode Supporting Four 1 Mbit EPROMs 20/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family MICROCONTROLLER INTERFACE MODE FEATURES Device name DATA ROM size MSM6652 MSM6652, 6652A MSM6653 MSM6653, 6653A Maximum playback time (sec) fSAM = 4.0 kHz fSAM = 6.4 kHz fSAM = 8.0 kHz fSAM = 16 kHz fSAM = 32 kHz 288 Kbits 16.9 10.5 8.4 4.2 2.1 544 Kbits 31.2 19.5 15.6 7.8 3.9 MSM6654 MSM6654, 6654A 1 Mbit 63.8 39.9 31.9 15.9 7.9 MSM6655 MSM6655, 6655A 1.5 Mbits 96.5 60.3 48.2 24.1 12.0 MSM6656 MSM6656, 6656A 2 Mbits 129.1 80.7 64.5 32.2 16.1 MSM6658A MSM6658A 4 Mbits 259.7 162.9 129.8 64.9 32.4 MSM66P54 MSM66P54 1 Mbit 63.8 39.9 31.9 15.9 7.9 MSM66P56 MSM66P56 MSM6650 MSM6650 2 Mbit 129.1 80.7 64.5 32.2 16.1 64 Mbits (Max) 4194.3 2620.5 2096.4 1048.2 524.1 Note: Actual voice ROM area is smaller by 22 Kbits. · 4-bit ADPCM or 8-bit PCM sound generation · Melody function · Edit ROM function · Two-channel mixing function · Fade-out function via four-step sound volume attenuation · Serial input or parallel input selectable · Built-in beep tone of 0.5 kHz, 1.0 kHz, 1.3 kHz, or 2.0 kHz selectable with a specific code · Sampling frequency of 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz, or 32.0 kHz (32 kHz sampling is not possible when using RC oscillation) · Up to 127 phrases · Built-in 12-bit D/A converter · Built-in 40 dB/octave low-pass filter · Standby function · Package options: 18-pin plastic DIP (DIP18-P-300-2 DIP18-P-300-2.54) (Product name: MSM6652-xxxRS/MSM6653-xxxRS/ MSM6654-xxxRS/MSM6655-xxxRS/ MSM6656-xxxRS/MSM6652A-xxxRS/ MSM6653A-xxxRS/MSM6654A-xxxRS/ MSM6655A-xxxRS/MSM6656A-xxxRS/ MSM6658A-xxxRS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name: MSM6652-xxxGS-K/MSM6653-xxxGS-K/ MSM6654-xxxGS-K/MSM6655-xxxGS-K/ MSM6656-xxxGS-K/MSM6652A-xxxGS-K/ MSM6653A-xxxGS-K/MSM6654A-xxxGS-K/ MSM6655A-xxxGS-K/MSM6656A-xxxGS-K/ MSM6658A-xxxGS-K/MSM66P54-01GS-K/ MSM66P54-02GS-K/MSM66P56-01GS-K/ MSM66P54-02GS-K/MSM66P56-01GS-K/ MSM66P56-02GS-K MSM66P56-02GS-K) 20-pin plastic DIP (DIP20-P-300-2 DIP20-P-300-2.54-W1 54-W1) (Product name: MSM66P54-01RS/MSM66P54-02RS/ MSM66P54-01RS/MSM66P54-02RS/ MSM66P56-01RS/MSM66P56-02RS MSM66P56-01RS/MSM66P56-02RS) 64-pin plastic QFP (QFP64-P-1420-1 QFP64-P-1420-1.00-BK 00-BK) (Product name:MSM6650GS-BK MSM6650GS-BK) 64-pin plastic SDIP (SDIP64-P-750-1 SDIP64-P-750-1.778) (Product name: MSM6650SS MSM6650SS) 21/46 XT XT NAR BUSY CMD ST CH I6/SD I5/SI I4 I3/PORT1 I2/PORT0 I1 I0 OSC I/O Interface Address & Command Controller 7 VDD GND BEEP Tone Generator Melody Generator DATA Controller 8 AOUT LPF 12-Bit DAC 12 PCM Synthesizer ADPCM Synthesizer (Containing 22-Kbit Phrase Control Table & Phrase Address Table) 288-KBit (MSM6652/52A MSM6652/52A) 544-KBit (MSM6653/53A MSM6653/53A) 1-MBit (MSM6654/54A MSM6654/54A) 1.5-MBit (MSM6655/55A MSM6655/55A) 2-MBit (MSM6656/56A MSM6656/56A) 4-MBit (MSM6658A MSM6658A) OKI Semiconductor RESET Timing Controller Address Counter 16-Bit (MSM6652/52A MSM6652/52A) 17-Bit (MSM6653/53A MSM6653/53A) 17-Bit (MSM6654/54A MSM6654/54A) 18-Bit (MSM6655/55A MSM6655/55A) 18-Bit (MSM6656/56A MSM6656/56A) 19-Bit (MSM6658A MSM6658A) 16-Bit (MSM6652/52A MSM6652/52A) 17-Bit (MSM6653/53A MSM6653/53A) 17-Bit (MSM6654/54A MSM6654/54A) 18-Bit (MSM6655/55A MSM6655/55A) 18-Bit (MSM6656/56A MSM6656/56A) 19-Bit (MSM6658A MSM6658A) Multiplexer FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family BLOCK DIAGRAMS MSM6652/53/54/55/56-xxx MSM6652A/53A/54A/55A/56A/58A-xxx 22/46 XT XT CMD BUSY NAR ST CH I6/SD I5/SI I4 I3/PORT1 I2/PORT0 I1 I0 OSC I/O Interface Address & Command Controller 7 RESET GND BEEP Tone Generator Melody Generator DATA Controller (Containing 22-Kbit Phrase Control Table & Phrase Address Table) 1-Mbit OTP ROM (MSM66P54-xx) 2-Mbit OTP ROM (MSM66P56-xx) PGM AOUT LPF 12-Bit DAC 12 PCM Synthesizer ADPCM Synthesizer 8 OKI Semiconductor VDD Timing Controller Address Counter 17-Bit (MSM66P54-xx) 18-Bit (MSM66P56-xx) Multiplexer 17-Bit (MSM66P54-xx) 18-Bit (MSM66P56-xx) Program Circuit VPP FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family MSM66P54/P56-xx 23/46 MCK XT XT CH ST CMD CE RCS BUSY NAR IBUSY STANDBY I6/SD I5/SI I4 I3/PORT1 I2/PORT0 I1 I0 TEST1 OSC I/O Interface Controller Switching Address & Timing Controller Counter 23-Bit Address 23-Bit Multiplexer RA0 D7 LPF 12-Bit DAC 12 PCM Synthesizer ADPCM Synthesizer 8 8-Bit LATCH D0 OKI Semiconductor AGND AVDD AOUT BEEP Tone Generator Generator Melody DATA Controller RESET CPU TEST2 SERIAL DVDD DGND 7 RA22 FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family MSM6650 MSM6650 24/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family PIN CONFIGURATION (TOP VIEW) The MSM66P54/P56-xx has two more pins than the MSM6652-6658A MSM6652-6658A while their pin configurations are identical. The additional two pins (VPP, PGM) of the MSM66P54/P56-xx may be open at playback after completion of writing. MSM6652-6658A MSM6652-6658A (Mask ROM) MSM66P54/P56 MSM66P54/P56 (OTP) I4 1 18 I3/PORT1 I5/SI 2 17 I2/PORT0 VPP 1 20 PGM I4 2 19 I3/PORT1 18 I2/PORT0 I6/SD 3 16 I1 I5/SI 3 CH 4 15 I0 I6/SD 4 17 I1 CH 5 16 I0 RESET 5 14 ST BUSY 6 13 CMD RESET 6 15 NAR 7 12 XT BUSY 7 14 CMD AOUT 8 11 XT NAR 8 GND 9 10 VDD AOUT 9 13 XT 12 XT GND 10 18-Pin Plastic DIP ST 11 VDD 20-Pin Plastic DIP MSM6652-xxxRS, MSM6653-xxxRS, MSM6654-xxxRS, MSM6655-xxxRS, MSM6656-xxxRS, MSM6652A-xxxRS, MSM6653A-xxxRS, MSM6654A-xxxRS, MSM6655A-xxxRS, MSM6656A-xxxRS, MSM6658A-xxxRS MSM66P54-01/-02RS MSM66P54-01/-02RS MSM66P56-01/-02RS MSM66P56-01/-02RS MSM6652-6658A MSM6652-6658A (Mask ROM) MSM66P54/P56 MSM66P54/P56 (OTP) 1 24 GND XT 2 23 AOUT XT 3 22 NC 4 CMD NC VDD VDD 1 24 GND XT 2 23 AOUT NAR XT 3 22 NAR 21 NC NC 4 21 NC 5 20 BUSY CMD 5 20 BUSY 6 19 NC NC 6 19 NC NC PGM 7 18 VPP ST 8 17 RESET NC 7 18 ST 8 17 I0 9 16 CH I0 9 16 CH I1 10 15 I6/SD I1 10 15 I6/SD I2/PORT0 11 14 I5/SI I2/PORT0 11 14 I5/SI I3/PORT1 12 13 I4 I3/PORT1 12 13 I4 RESET 24-Pin Plastic SOP MSM6652-xxxGS-K, MSM6653-xxxGS-K, MSM6654-xxxGS-K, MSM6655-xxxGS-K, MSM6656-xxxGS-K, MSM6652A-xxxGS-K, MSM6653A-xxxGS-K, MSM6654A-xxxGS-K, MSM6655A-xxxGS-K, MSM6656A-xxxGS-K, MSM6658A-xxxGS-K 24-Pin Plastic SOP MSM66P54-01/-02GS-K MSM66P54-01/-02GS-K MSM66P56-01/-02GS-K MSM66P56-01/-02GS-K 25/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family MSM6650 MSM6650 RA11 52 53 54 55 56 57 58 59 60 61 62 43 10 42 11 41 12 40 13 39 14 38 15 37 16 36 17 35 18 34 19 33 RCS D0 I4 I5/SI I6/SD CH RESET CE RA10 RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 D7 D6 D5 D4 D3 D2 D1 NC 32 44 9 31 8 30 45 29 7 28 46 27 47 6 26 48 5 25 4 24 49 23 3 22 50 21 51 2 20 1 STANDBY I0 I1 I2/PORT0 I3/PORT1 NC NC BUSY NAR AOUT AGND DGND AVDD DVDD XT XT MCK CMD ST TEST1 CPU SERIAL IBUSY NC 63 64 TEST2 RA22 RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14 RA13 RA12 Product name: MSM6650GS-BK MSM6650GS-BK NC: No connection 64-Pin Plastic QFP 26/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family Product name: MSM6650SS MSM6650SS XT 1 64 XT MCK 2 63 DVDD CMD 3 62 AVDD ST 4 61 DGND TEST1 5 60 AGND CPU 6 59 AOUT SERIAL 7 58 NAR IBUSY 8 57 BUSY NC 9 56 NC STANDBY I0 10 55 11 54 TEST2 RA22 I1 12 53 RA21 I2/PORT0 13 52 RA20 I3/PORT1 14 51 RA19 I4 15 50 RA18 I5/SI 16 49 RA17 I6/SD 17 48 RA16 CH 18 47 RA15 RESET 19 46 RA14 CE 20 45 RA13 RCS 21 44 RA12 D0 22 43 RA11 NC 23 42 RA10 D1 24 41 NC D2 25 40 RA9 D3 26 39 RA8 D4 27 38 RA7 D5 28 37 RA6 D6 29 36 RA5 D7 30 35 RA4 RA0 31 34 RA3 RA1 32 33 RA2 NC: No connection 64-Pin Plastic SDIP 27/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family PIN DESCRIPTIONS 1. MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx 18-Pin plastic DIP Pin Symbol Type Description 5 RESET I Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops The AOUT output goes to ground and the IC status is reinitialzed. This pin has an internal pull-up resistor. 6 BUSY O Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. 7 NAR O The CMD and ST inputs become effective when high. NAR indicates whether the address bus (10 through 16) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 8 AOUT O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. 11 XT I Ceramic Oscillator Input. This pin has an internal 0.5 to 5 M feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. 12 XT O Ceramic Oscillator Output. If an external clock is used, leave this pin open. 13 CMD I Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level This pin has an Internal pull up resistor. 14 ST I Start. Speech playback starts at the fall of the ST pulse. The 10-16 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. 4 CH I Channel Control. Channel 1 is selected when the input Is pulled high. Channel 2 is selected when the Input is low. This pin has an internal pull-up resistor. 3 l6/SD I This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. 2 I5/SI I This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. 1 I4 I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. 18 I3/PORT1 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 17 I2/PORT0 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 15, 16 I0, I1 I 9 GND - 10 VDD This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. Ground pin. Power supply. Insert a 0.1 µF ro more bypass capacitor between this pin and GND. 28/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family 2. MSM66P54/P56-xx 20-Pin plastic DIP Pin Symbol Type Description 6 RESET I Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops. The AOUT output goes to ground and the IC status is reinitialized This pin has an internal pull-up resistor. 7 BUSY O Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. 8 NAR O The CMD and ST inputs become effective when high. NAR indicates whether the address bus (10 through 16) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 9 AOUT O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. 12 XT I Ceramic Oscillator Input. This pin has an internal 0.5 to 5 M feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. 13 XT O Ceramic Oscillator Output. If an external clock is used, leave this pin open. 14 CMD I Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level. This pin has an internal pull-up resistor. 15 ST I Start. Speech playback starts at the fall of the ST pulse. The 10-16 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. 5 CH I Channel Control. Channel 1 is selected when the input is pulled high. Channel 2 is selected when the input is low. This pin has an internal pull-up resistor. 4 I6/SD I This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. 3 I5/SI I This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. 2 I4 I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. 19 I3/PORT1 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 18 I2/PORT0 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 16, 17 I0, I1 I 10 GND - Ground pin. 11 VDD - Power supply. Insert a 0.1 µF ro more bypass capacitor between this pin and GND. 1 VPP - Supply voltage for writing data to internal OTP ROM. 20 PGM I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. Interface with voice analysis edit tools AR203 AR203 and AR204 AR204. Set to "L" level or leave open during playback. This pin has an internal pull-down resistor. 29/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family 3. MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx 24-Pin plastic SOP Pin Symbol Type Description 17 RESET I Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops. The AOUT output goes to ground and the IC status is reinitialized This pin has an internal pull-up resistor. 20 BUSY O Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. 22 NAR O The CMD and ST inputs become effective when high. NAR indicates whether the address bus (10 through 16) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 23 AOUT O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. 2 XT I Ceramic Oscillator Input. This pin has an internal 0.5 to 5 M feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. 3 XT O Ceramic Oscillator Output. If an external clock is used, leave this pin open. 5 CMD I Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level. This pin has an internal pull-up resistor. 8 ST I Start. Speech playback starts at the fall of the ST pulse. The 10-16 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. 16 CH I Channel Control. Channel 1 is selected when the input is pulled high. Channel 2 is selected when the input is low. This pin has an internal pull-up resistor. 15 I6/SD I This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. 14 I5/SI I This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. 13 I4 I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. 12 I3/PORT1 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 11 I2/PORT0 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 30/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family Pin Symbol Type Description 9, 10 I0, I1 I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. 24 GND - Ground pin. 1 VDD - Power supply. Insert a 0.1 µF ro more bypass capacitor between this pin and GND. 18 VPP * - 7 PGM * I Supply voltage for writing data to internal OTP ROM. Interface with voice analysis edit tools AR761 AR761 and AR762 AR762. Set to "L" level or leave open during playback. This pin has an internal pull-down resistor. * Pins for MSM66P54/56-xx only 31/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family 4. MSM6650 MSM6650 64-Pin plastic QFP (64-Pin plastic SDIP) Pin Symbol Type Description 29 (19) RESET I Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops The AOUT output goes to ground and the IC status is reinitialized. This pin has an internal pull-up resistor. 3 (57) BUSY O Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. 4 (58) NAR O The CMD and ST Inputs become effective when high. NAR indicates whether the address bus (10 through 16) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 5 (59) AOUT O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. 10 (64) XT I Ceramic Oscillator Input. This pin has an internal 0.5 to 5 M feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. 11 (1) XT O Ceramic Oscillator Output. If an external clock is used, leave this pin open. 13 (3) CMD I Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level This pin has an Internal pull up resistor. 14 (4) ST I Start. Speech playback starts at the fall of the ST pulse. The 10-16 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. 28 (18) CH I Channel Control. Channel 1 is selected when the input Is pulled high. Channel 2 is selected when the Input is low. This pin has an internal pull-up resistor. 27 (17) l6/SD I This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. 26 (16) I5/SI I This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. 25 (15) I4 I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. 24 (14) I3/PORT1 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 23 (13) I2/PORT0 I/O This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. 21, 22 (11, 12) I0, I1 I This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. 32/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor Pin Symbol MSM6650 MSM6650 Family Type Description 6 (60) AGND - Analog ground pin. 7 (61) DGND - Digital ground pin. 8 (62) AVDD - Analog power pin. Insert a 0.1 µF or more bypass capacitor between this pin and AGND. 9 (63) DVDD - Digital power pin. Insert a 0.1 µF or more bypass capacitor between this pin and DGND. 12 (2) MCK O Main clock output pin. Use MCK as a connection pin for the MSC1192 MSC1192, etc. When the IC is standby status, MCK is held high. 16 (6) CPU I CPU Mode. Set to "H" level to select Microcontroller Interface mode. 17 (7) SERIAL I Serial/Parallel Interface Select. This input selects either the parallel or the serial input interface. The serial input interface is selected with a high level; the parallel input interface is selected with a low level. 30 (20) CE O Chip Enable. CE is a timing output pin to control read of external memory. This pin outputs when RCS is at the "L" level. This pin outputs "H" level when RCS is at the "H" level. 31 (21) RCS I Read Chip Select. The data bits D0-D7 are internally pulled down when RCS is high. Addresses and CE are output when RCS is at "L" level. The RA22-RA0 RA22-RA0 address pins become high impedance and CE pin outputs "H" level when RCS is at the "H" level. 32, 3440 (22, 2430) D0-D7 I External Memory Data Bus. Data is input when RCS is low. When RCS is high, these pins become low due to internal pull-down resistors. 41-63 (31-40, 42-54) RA0-RA22 RA0-RA22 O External Memory Address. These are address pins for an external memory output when RCS is low. These pins become high impedance status if RCS is in "H" level. 15, 64 (5, 55) TEST1, 2 I Test. Set these pins to "H" level. 18 (8) IBUSY O Outputs a "L" level during playback or when AOUT is at 1/2 VDD (except standby conversion) 20 (10) STANDBY O Outputs a "L" level during which the device is oscillating. 33/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family ABSOLUTE MAXIMUM RATINGS (GND = 0 V) Parameter Symbol Power supply voltage VDD Input voltage VIN Storage temperature TSTG Condition Rating V 55 to +150 - V 0.3 to VDD + 0.3 Ta = 25°C Unit 0.3 to +7.0 °C RECOMMENDED OPERATING CONDITIONS (GND = 0 V) Parameter Condition Range Unit 2.4 to 5.5 V VDD MSM6652-56 MSM6652-56, MSM6650 MSM6650, MSM6652A-56A MSM6652A-56A MSM6658A MSM6658A, MSM66P54/P56 MSM66P54/P56 Power supply voltage Symbol 3.5 to 5.5 V 40 to +85 °C Operating temperature TOP - Master clock frequency fOSC - Min. Typ. Max. 3.5 4.096 4.5 MHz 34/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family ELECTRICAL CHARACTERISTICS DC Characteristics (VDD = 5.0 V, GND = 0 V, Ta = 40 to +85°C) Parameter Symbol Condition Min. Typ. Max. Unit VIH High level input voltage - 4.2 - - V Low level input voltage VIL - - - 0.8 V High level output voltage VOH lOH = 1 mA 4.6 - - V Low level output voltage VOL lOL = 2 mA - - 0.4 V High level input current 1 lIH1 VIH = VDD - - 10 µA High level input current 2 lIH2 Internal pull-down resistor 30 90 200 µA Low level input current 1 lIL1 VIL = GND 10 - - µA lIL2 Internal pull-up resistor 200 90 30 µA Operating current IDD - - 6 10 mA Standby current lDS Ta = 40°C to +50°C Ta = 40°C to +85°C - - 10 µA - - 30 µA D/A output relative accuracy |VDAE| When D/A output selected - - 40 mV D/A output impedance RDAO When D/A output selected *2 15 25 35 k When D/A output selected *3 15 30 45 k LPF driving resistance RAOUT When LPF output selected 50 - - k LPF output impedance RLPF lF = 100 µA - 1 3 k Low level input current 2 *1 *1. Applied to RESET, CMD, ST, CH. *2. Applied to MSM6652/53/54/55/56 MSM6652/53/54/55/56, MSM6652A/53A/54A/55A/56A/58A MSM6652A/53A/54A/55A/56A/58A, MSM6650 MSM6650. *3. Applied to MSM66P54/P56 MSM66P54/P56. DC Characteristics (VDD = 3.1 V, GND = 0 V, Ta = 40 to +85°C) Parameter High level input voltage Symbol Condition Min. Typ. Max. Unit VIH - 2.7 - - V Low level input voltage VIL - - - 0.5 V High level output voltage VOH lOH = 1 mA 2.6 - - V Low level output voltage VOL lOL = 2 mA - - 0.4 V High level input current 1 lIH1 VIH = VDD - - 10 µA High level input current 2 lIH2 Internal pull-down resistor 10 30 100 µA Low level input current 1 lIL1 VIL = GND 10 - - µA Low level input current 2 (Note) lIL2 Internal pull-up resistor 100 30 10 µA Operating current IDD - - 4 7 mA Standby current lDS Ta = 40°C to +50°C Ta = 40°C to +85°C - - 5 µA - - 20 µA D/A output relative accuracy |VDAE| When D/A output selected - - 20 mV D/A output impedance RDAO When D/A output selected 15 25 35 k LPF driving resistance RAOUT When LPF output selected 50 - - k LPF output impedance RLPF lF = 100 µA - 1 3 k Note: Applied to RESET, CMD, ST, CH. 35/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family APPLICATION CIRCUITS (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx) I5/SI P1.2 ST P2.0 RESET P3.0 NAR XT RESET XT VDD MSM6652/53/54/55/56 MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56 MSM66P54/P56 I6/SD P1.1 MSM83C154 MSM83C154 P1.0 CH CMD PORT0 PORT1 AOUT GND AMP I4 I1 I0 Application Circuit in Serial Input Interface Mode 36/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx) P2.0 CH P3.1 CMD P2.2 ST RESET P3.0 NAR XT RESET XT VDD MSM6652/53/54/55/56 MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56 MSM66P54/P56 I6 I5 I4 I3 I2 I1 I0 P2.1 MSM83C154 MSM83C154 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 AOUT AMP GND Application circuit in Parallel Input Interface Mode 37/46 MSM83C154 MSM83C154 RESET P2.0 P1.0 P1.1 P1.2 P3.0 MSM6650 MSM6650 DGND AGND XT D0 XT GND VDD A16 VPP OE A0 MSM27C101 MSM27C101 CE CE O0 O7 O0 O7 A0 A16 VPP OE 74HC139 74HC139 GND VDD CE O0 O7 A0 A16 VPP OE GND VDD CE O0 O7 A0 A16 VPP OE GND VDD OKI Semiconductor I1 I0 RCS I4 CH CMD TEST1 RA0 TEST2 D7 CPU SERIAL ST NAR DVDD AVDD CE AOUT RA18 RESET RA17 I6/SD RA16 I5/SI 1G 2G 1Y3 1B 1Y2 1Y1 1Y0 1A FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family (MSM6650 MSM6650) MSM27C101 MSM27C101 MSM27C101 MSM27C101 MSM27C101 MSM27C101 Application Circuit in Microcontroller Interface Mode Using Four 1-Mbit EPROMs (Serial Input Interface) 38/46 RESET MSM83C154 MSM83C154 P2.1 P2.0 P3.1 P1.0 P2.0 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P3.0 MSM6650 MSM6650 A0 A16 VPP OE 74HC139 74HC139 D7 GND VDD CE O0 O7 A0 A16 VPP OE GND VDD CE O0 O7 A0 A16 VPP OE GND VDD CE O0 O7 A0 A16 VPP OE GND VDD OKI Semiconductor CE O0 O7 RA0 D0 TEST1 XT TEST2 CPU XT RCS SERIAL DGND AGND CH ST CMD NAR DVDD AVDD CE AOUT RA18 RESET RA17 I6/SD I5/SI RA16 I4 I3 I2 I1 I0 1G 2G 1Y3 1B 1Y2 1Y1 1Y0 1A FEDL6650DIGEST-05 FEDL6650DIGEST-05 MSM6650 MSM6650 Family (MSM6650 MSM6650) MSM27C101 MSM27C101 MSM27C101 MSM27C101 MSM27C101 MSM27C101 MSM27C101 MSM27C101 Application Circuit in Microcontroller Interface Mode Using Four 1-Mbit EPROMs (Parallel Input Interface) 39/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family PACKAGE DIMENSIONS (Unit: mm) 40/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family (Unit: mm) SOP24-P-430-1.27-K Mirror finish 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (5µm) 0.58 TYP. 5/Oct. 13, 1998 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 41/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family (Unit: mm) DIP20-P-300-2 DIP20-P-300-2.54-W1 54-W1 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (5µm) 1.50 TYP. 2/Dec. 11, 1996 42/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family (Unit: mm) Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 43/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family (Unit: mm) SDIP64-P-750-1 SDIP64-P-750-1.778 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin Cu alloy Solder plating (5µm) 8.70 TYP. 2/Dec. 11, 1996 44/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family REVISION HISTORY Page Previous Current Edition Edition Document No. Date FEDL6650DIGEST-04 FEDL6650DIGEST-04 Jul. 2000 Jan. 11, 2002 14 14 FEDL6650DIGEST-05 FEDL6650DIGEST-05 33 33 Description Edition 4 Modified descriptions of CS and RCS. 45/46 FEDL6650DIGEST-05 FEDL6650DIGEST-05 OKI Semiconductor MSM6650 MSM6650 Family NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2002 Oki Electric Industry Co., Ltd. 46/46