MON960 PCI80960DP EP80960BB IQ80960RP IQ80960RPLV IQ80960RD IQ80960RM/RN - Datasheet Archive

 

Debug Monitor User's Guide Order Number: 484290-008 Revision Revision History Date -001 Original Issue. 01/93 -002 Updated for

 

MON960 MON960 Debug Monitor User's Guide Order Number: 484290-008 Revision Revision History Date -001 Original Issue. 01/93 -002 Updated for V1.1 release. 02/93 -003 Revised for MON960 MON960 release 2.0. 05/94 -004 Revised for MON960 MON960 release 2.1. 11/94 -005 Revised for MON960 MON960 release 3.0. 12/95 -006 Revised for MON960 MON960 release 3.1. 01/97 -007 Revised for MON960 MON960 release 3.3 08/98 -008 Revised for MON960 MON960 release 3.3 12/98 In the United States, additional copies of this manual or other Intel literature may be obtained by writing: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 Or you can call the following toll-free number: 1-800-548-4725 or visit Intel's website at http://www.intel.com In locations outside the United States, obtain additional copies of Intel documentation by contacting your local Intel sales office. Intel Corporation makes no warranty of any kind with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. Intel Corporation assumes no responsibility for any errors that may appear in this document. Intel Corporation makes no commitment to update nor to keep current the information contained in this document. Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied. Intel software products are copyrighted by and shall remain the property of Intel Corporation. Use, duplication or disclosure is subject to restrictions stated in Intel's Software License Agreement, or in the case of software delivered to the government, in accordance with the software license agreement as defined in FAR 52.227-7013. No part of this document may be copied or reproduced in any form or by any means without prior written consent of Intel Corporation. Intel Corporation retains the right to make changes to these specifications at any time, without notice. Contact your local sales office to obtain the latest specifications before placing your order. * Other brands and names are the property of their respective owners. Copyright © 1993-1995, 1997, 1998. Intel Corporation. All rights reserved. Contents Preface Purpose . xiii Audience. xiii Notational Conventions. xiii Contents . xv Preface . xv Chapter 1: Getting Started . xv Chapter 2: Overview . xv Chapter 3: Using the Monitor . xv Chapter 4: Monitor Commands . xv Chapter 5: Retargeting the Monitor . xvi Chapter 6: Theory of Operation. xvi Chapter 7: The MON960 MON960 Application Environment. xvi Chapter 8: Host Debugger Interface (HDI) . xvi Appendix A: Target Board Notes. xvi Appendix B: mondb Execution Utility. xvi Customer Support. xvi Additional Information Sources . xvii Electronic Information . xviii Chapter 1 Getting Started MON960 MON960 Contents . 1-1 Installation Requirements. 1-1 Why Install the Source and ROM Hex Files . 1-1 Preparing for Installation on UNIX. 1-2 Installing on UNIX Hosts . 1-3 iii MON960 MON960 Debug Monitor User's Guide Preparing for Installation in Windows . 1-4 Installing on Windows Hosts . 1-4 What's Next? . 1-5 Chapter 2 Overview Product Summary . 2-1 Monitor Features . 2-2 Components of the Monitor . 2-2 Downloading . 2-5 Serial Download . 2-6 Parallel Download . 2-6 PCI Download . 2-7 Board Configurations . 2-7 mondb TCP/IP Communications Support. 2-8 Aplink Support . 2-9 JTAG Support . 2-9 Chapter 3 Using the Monitor Purpose . 3-1 Connecting to the User Interface . 3-1 Setting Breakpoints. 3-2 Displaying Memory . 3-3 Trace Events. 3-4 Loading MON960 MON960 Into Flash . 3-5 Building and Loading New MON960 MON960 Code . 3-6 PCI80960DP PCI80960DP and EP80960BB EP80960BB Evaluation Platform Programming Procedure . 3-7 IQ80960RP IQ80960RP Eval Board Flash Programming Procedure 3-10 IQ80960RPLV IQ80960RPLV and IQ80960RD IQ80960RD Eval Board Flash Programming Procedure . 3-12 IQ80960RM/RN IQ80960RM/RN Eval Board Flash Programming. 3-15 iv Contents Chapter 4 Monitor Commands Elements of the Command Language. 4-1 Names . 4-1 Addresses . 4-1 Numbers . 4-2 Overview of Commands. 4-2 Alphabetical Command Reference . 4-6 Chapter 5 Retargetting the Monitor Output Files . 5-1 Types of Source Files . 5-2 Code Areas Affected by Retargeting. 5-2 Modifying Board-specific Files . 5-4 Board-specific Files . 5-5 board.h. 5-5 board_hw.c . 5-6 Memory Configuration. 5-11 Creating the ROM Image . 5-18 Edit the Makefile. 5-19 Copy the Linker-directives File . 5-19 Configure the Makefile . 5-20 Specifying Makefile Build Options . 5-22 Make the Monitor Files Using a Make Utility. 5-25 Produce New FLASH . 5-25 Install the New a FLASH . 5-26 Debugging the Monitor. 5-26 Verifying Monitor Operation. 5-27 Troubleshooting Host-target Serial Communication Problems. 5-28 PCI Retargeting . 5-29 Board Initialization . 5-30 v MON960 MON960 Debug Monitor User's Guide Routines in leds_sw.c . 5-32 Serial Device Driver Routines . 5-38 Routines in 82510.c and 16552.c. 5-39 Routines in flash.c. 5-40 Local Routines in flash.c. 5-44 Routines in paradrvr.c. 5-45 Parallel Download Example Code . 5-46 Retargeting JTAG . 5-47 Chapter 6 Theory of Operation System Initialization . 6-1 Faults. 6-5 Stacks. 6-6 Program Execution . 6-8 System Calls. 6-9 High Speed Downloading. 6-13 Parallel Download . 6-13 PCI Download . 6-14 Monitor Core Source. 6-16 Variables . 6-17 Private Monitor Routines . 6-18 Public Monitor Routines. 6-20 User Interface Source . 6-21 Host Interface Source . 6-21 Serial Device Driver. 6-23 Communications Packet Structure . 6-23 Com Layer. 6-25 Serial Autobaud. 6-25 MON960 MON960 Support for PCI Communication . 6-25 JTAG Device Driver. 6-27 vi Contents Chapter 7 The MON960 MON960 Application Environment Purpose . 7-1 Execution Environment . 7-1 System Procedure Table. 7-1 Fault Table . 7-5 Interrupt Table. 7-5 Control Table . 7-5 Monitor Stacks . 7-6 Changing the Environment. 7-6 Libraries. 7-11 libll. 7-11 libmon . 7-12 Compiling an Application Program . 7-15 Interrupts . 7-16 Debugging Interrupt Routines . 7-18 Faults and Interrupts While Executing . 7-19 i960 Processor Cache Invalidation by MON960 MON960. 7-20 System Calls. 7-20 Reserved Registers . 7-21 Linking the Monitor with an Application . 7-25 Chapter 8 Host Debugger Interface (HDI) Purpose . 8-1 Types and Variables . 8-3 Imported Routines . 8-10 Host Debugger Interface Library Routines (HDIL). 8-12 hdi_aplink_sync. 8-13 HDIL Support for PCI Communication . 8-48 vii MON960 MON960 Debug Monitor User's Guide Appendix A Target Board Notes Cyclone Board Configurations. A-1 Cyclone Evaluation Boards . A-1 EP80960BB EP80960BB and PCI80960DP PCI80960DP Evaluation Boards. A-1 DIP Switches and LEDs on Cyclone Boards . A-2 IQ80960RP IQ80960RP Evaluation Boards. A-3 IQ80960RPLV IQ80960RPLV and IQ80960RD IQ80960RD Evaluation Boards. A-4 IQ80960RM/RN IQ80960RM/RN Evaluation Boards . A-5 Appendix B MONDB Execution Utility TCP/IP Communication. B-2 Hardware Requirements. B-3 Software Requirements. B-3 Server Semantics . B-3 Client Semantics . B-4 PCI Communication . B-4 Hardware Requirements. B-4 Software Requirements - PCI Driver Installation . B-5 Mechanics . B-5 Semantics . B-6 Example . B-6 Serial Communication . B-6 Hardware Requirements. B-6 Windows PCI Download. B-7 Hardware Requirements. B-7 Mechanics . B-7 Windows Parallel Download. B-8 Hardware Requirements. B-8 Mechanics . B-8 UNIX Parallel Download . B-9 Hardware Requirements. B-10 viii Contents Mechanics. B-10 Selecting the Parallel Port On Your UNIX Host . B-10 Default Serial and Parallel Port Devices . B-12 Invocation Syntax . B-13 TCP/IP Options . B-13 PCI Options. B-14 Parallel Download Options . B-15 Communication Protocol Options . B-16 Serial Communication Options . B-17 mondb Commands . B-19 Examples of Using mondb . B-20 Windows PCI Downloading . B-20 UNIX Parallel Downloading (SPARCstation 5) . B-21 Communicating from UNIX Hosts at 57600 or 115200 Baud. B-21 Index Figures 2-1 2-2 5-1 5-2 5-3 5-4 6-1 6-2 MON960 MON960 Structure . 2-3 TCP/IP Server/Workstation Communication . 2-8 Memory Map for Cyclone i960 Sx/Kx/Cx/Jx/Hx Boards . 5-14 Memory Map for IQ80960RP IQ80960RP Cyclone Board . 5-15 Memory Map for Cyclone i960 IQ80960RPLV IQ80960RPLV and IQ80960RD IQ80960RD Boards. 5-16 Memory Map for Cyclone i960 IQ80960RM/RN IQ80960RM/RN Board . 5-17 Stack Switch . 6-7 MON960 MON960 System Call Sequence. 6-10 ix MON960 MON960 Debug Monitor User's Guide Tables 4-1 4-2 4-3 4-4 5-1 5-2 5-3 5-4 5-5 5-6 5-7 5-8 6-1 6-2 6-3 8-1 A-1 A-2 A-3 A-4 A-5 A-6 A-7 A-8 x Execution and Break Commands . 4-4 Memory Access Commands . 4-5 Monitor Environment Commands. 4-6 PCI Commands. 4-6 List of Cyclone Board Names and Abbreviations. 5-2 Minimum makefile Symbols. 5-21 Optional makefile Symbols. 5-22 LED Symbols . 5-24 Define Symbols for LED Use. 5-33 Arguments for fatal_error(). 5-35 LED Display for fatal_error(). 5-35 Pause Times for Pause Routine. 5-37 Monitor Initialization Routines . 6-3 Packet Field Values . 6-24 pcidrvr.c Routines . 6-26 Error Codes. 8-4 Cyclone Board DIP Switches for EP80960BB EP80960BB and PCI80960DP PCI80960DP . A-2 Cyclone Board LEDs for Usage After EP80960BB EP80960BB and PCI80960DP PCI80960DP . A-2 Cyclone Board DIP Switches for PCI80960RP PCI80960RP. A-3 Cyclone Board LEDs for PCI80960RP PCI80960RP . A-3 Cyclone Board DIP Switches for IQ80960RPLV IQ80960RPLV and PCI80960RD PCI80960RD. A-4 Cyclone Board LEDs for IQ80960RPLV IQ80960RPLV and PCI80960RD PCI80960RD. A-4 Cyclone Board DIP Switches for IQ80960RM/RN IQ80960RM/RN . A-5 Cyclone Board LED Usage During Bootup for IQ80960RM/RN IQ80960RM/RN . A-6 Contents A-9 Cyclone Board LED Usage After Bootup for IQ80960RM/RN IQ80960RM/RN . A-7 B-1 Default Serial Port Devices . B-12 B-2 Default Parallel Port Devices . B-12 xi Preface Purpose This manual describes the MON960 MON960 debug monitor. It is written for engineers designing systems based on i960® processors. Look in your Getting Started with the i960 Processor Development Tools manual for a complete list of i960 processor and tool manuals. Audience To use this product, you must be familiar with your host operating system, the architecture of the i960 processor, and i960 processor program development tools. This manual assumes that you know techniques for writing and debugging software, though not necessarily using Intel debugging tools. Notational Conventions The following notational and terminology conventions are used throughout this manual: i960 Cx/Jx/Hx/Rx processor refers generically to the following i960 processors: · CA, CF · JA, JD, JF · JT · HA, HD, HT · RP, RD, · RM, RN xiii MON960 MON960 Debug Monitor User's Guide i960 Kx processor refers generically to the i960 processors KA, KB, SA, and SB target processor refers to the i960 processor on the target board. This processor can be any of the following i960 processor families: · CA, CF · JA, JD, JF · JT · HA, HD, HT · KA, KB · SA, SB · RP, RD · RM, RN this type style indicates an element of syntax, a reserved word, a keyword, a filename, computer output, or part of a program example. The text appears in lowercase unless uppercase is significant. l is lowercase letter L in examples 1 is the number 1 in examples O is the uppercase letter O in examples 0 is the number 0 in examples This type style This type style indicates a place holder for an identifier, an expression, a string, a symbol, or a value. Substitute one of these items for the place holder. [] xiv indicates the exact characters you type in examples. means the syntactic symbols enclosed by the braces are optional. Preface {} means you must select one, and only one, of the syntactic symbols enclosed in the braces. | means exclusive or. Select only one of the syntactic items on opposite sides of the bar. Contents This guide includes the following chapters: Preface This preface describes the contents of this user's guide. Chapter 1: Getting Started The Getting Started chapter explains how to install MON960 MON960 files. Read this chapter if you plan to retarget the monitor, update existing monitor files, or build tools in CTOOLS from source. Chapter 2: Overview Chapter 2 describes how the components of the monitor function together to support software debugging. Chapter 3: Using the Monitor Chapter 3 describes the user interface and how to perform simple debugging tasks. Chapter 4: Monitor Commands Chapter 4 details the mon960 commands in alphabetical order. xv MON960 MON960 Debug Monitor User's Guide Chapter 5: Retargeting the Monitor Chapter 5 explains how to modify the source files and create a monitor specific to your target board. Chapter 6: Theory of Operation Chapter 6 describes the mon960 source code, its structure and uses. Chapter 5 describes how to modify the source code to run on an i960 processor board. You need the information in this chapter only if you are using the monitor on an evaluation board other than a Cyclone or Cyclone PCI. Chapter 7: The MON960 MON960 Application Environment Chapter 7 explains how to set up your debug environment. Chapter 8: Host Debugger Interface (HDI) This chapter describes the Host Debugger Interface (HDI). It is used by debuggers to control a remote target board based on the i960 processor. Appendix A: Target Board Notes This appendix provides information specific to target boards the monitor supports. Appendix B: mondb Execution Utility This appendix describes the mondb utility, which enables a host system to download and execute an application program on a target board. Customer Support If you need service or assistance with the mon960 debug monitor, see Chapter 3 of the Getting Started with the i960 Processor Development Tools guide. xvi Preface Additional Information Sources Intel documentation is available from your Intel sales representative or Intel Literature Sales. Call 1-800-548-4725 Document Title Order Getting Started With The i960 Processor Development Tools Intel Order # 485544 i960 Processor Compiler User's Guide Intel Order # 651230 i960 Processor Library Supplement Intel Order # 651231 i960 Processor Assembler User's Guide Intel Order # 485276 i960 Processor Software Utilities User's Guide Intel Order # 485277 gdb960 User's Manual Intel Order # 485546 i960 Processor Tools License Guide Intel Order # 614851 Professional I/O Application Developer's Kit Intel Order # 273190-001 i960 Cx I/O Microprocessor User's Manual Intel Order # 270710-003 i960 Hx I/O Microprocessor User's Manual Intel Order # 272484-001 i960 Jx Microprocessor Developer's Manual Intel Order # 272483-002 i960 Rx I/O Microprocessor Developer's Manual Intel Order # 272736-002 i960 RM/RN I/O Microprocessor Developer's Manual Intel Order # 273158-001 Using the 28F020 28F020 Flash Memory, volume 1 Intel Order # 210830013 IQ80960Rx Evaluation Platform Board Manual Intel Order # 273012-001 IQ80960RM/RN IQ80960RM/RN Evaluation Platform Board Manual Intel Order # 273160-001 xvii MON960 MON960 Debug Monitor User's Guide Electronic Information Intel's World-Wide Web Home Page Intel's Developers Web Site http://developer.intel.com/ Cyclone Microsystems http://www.cyclone.com Spectrum Digital, Inc. xviii http://www.intel.com/ http://www.spectrumdigital.com/ 1 Getting Started The following sections describe installing the MON960 MON960 files on UNIX* and Windows* 95/Windows NT* 4.0 host systems. MON960 MON960 Contents · · · mon960 mondb source code monitor code machine level debugger builds mon960 and mondb NOTE. MON960 MON960 is the product name. mon960 is the monitor program name. Installation Requirements · · eight megabytes hard drive space for mon960 and mondb four megabytes hard drive space for source code Why Install the Source and ROM Hex Files MON960 MON960 is available as a separate product, and is also included in the CTOOLS software development toolset. MON960 MON960 includes source code and ROM hex files for the evaluation boards identified in Chapter 2. Typically, you install MON960 MON960 files for one of three reasons: 1. You are already using MON960 MON960 with an Intel or Cyclone evaluation board and want to update your version of MON960 MON960. 2. You plan to retarget the MON960 MON960 source code for your target environment. 1-1 1 MON960 MON960 Debug Monitor User's Guide 3. You plan to build the CTOOLS debugger gdb960 or the MON960 MON960 debugger mondb. Building the debuggers requires the libraries HDIL and HDILCOMM which are part of MON960 MON960 source. Preparing for Installation on UNIX 1. Back up any previously installed versions of the MON960 MON960 files. 2. Determine the installation directory for the MON960 MON960 files. It should be the same directory in which you installed CTOOLS. Ensure that you have write permission on this directory. If you want to install the new MON960 MON960 release files in an existing intel960 directory, you must first remove MON960 MON960 from this directory. If you want to retain the MON960 MON960 files in an existing directory, either move them or choose another location in which to install the new version. 3. Determine your interrupt key sequence (usually Ctrl-C) by using stty. 4. Determine the name of your system's tape device. 5. Place the installation tape in the tape device. 6. Decide if you need to install source code for MON960 MON960, or ROM image files. The installation script prompts you to enter this information. Source code for the MON960 MON960 monitor allows you to modify the monitor for your target environment. MON960 MON960 ROM image files provides the monitor for use on Intel evaluation boards. NOTE. You can repeat the installation program later if you need components of MON960 MON960 that you omit during the initial installation. 1-2 Getting Started 1 Installing on UNIX Hosts 1. Change directory (cd) to an empty or temporary directory. 2. Extract the installation script from the tape device, using the tape device name you determined in step 4 (above). Enter: tar xvf tape_device install.mon 3. To save time during tape scanning, watch for the message: x install.mon, num bytes, num media blocks After you see this message, you may optionally enter your interrupt key sequence, using the sequence you determined in step 3 (above) and continue to the next step. 4. Execute the installation program. Enter: ./install.mon 5. When prompted for the installation directory, specify the directory in which to install MON960 MON960. Entering a Carriage Return specifies the default /usr/local/intel960. This manual references the installation directory using the Windows environment variable %INTEL960 INTEL960%. You can also specify a full path name to install the MON960 MON960 files in a custom location (e.g., /usr/projects/p1/ctools). 6. If the directory you specify has files in it, a warning similar to the following appears: WARNING: Directory dirname is not empty. Attempting to install will corrupt your files. Do you wish to proceed (y/n)? Default is [n] Entering y may overwrite or remove the old files in the directory and may cause an installation failure. If you enter n, the installation script prompts you for a new location to install the MON960 MON960 files. The installation script continues, prompting you for the following information: Tape device (default provided) Host and operating system (table provided) 1-3 1 MON960 MON960 Debug Monitor User's Guide Whether or not to install source code for MON960 MON960 (default and table provided) Whether or not to install source code for MON960 MON960 ROM images During installation, the system displays several progress indicator messages related to the renaming of files. No action is required in response to these messages. A message notifies you when the installation is complete. If you want MON960 MON960 to be owned by root with a Group ID of bin, have your system administrator make that change now. Preparing for Installation in Windows Determine the installation directory for the MON960 MON960 files. In previous version of MON960 MON960 the default installation directory c:\intel960. With version 3.3 and above, the installation directory is consistent installation directory of c:\Program Files\[company name]\[product name]. Therefore, by default, the installation program places the files in c:\Program Files\intel\CTOOLS. The installation path is referenced throughout the manual as environment variable %INTEL960 INTEL960%. You can also specify a custom directory when the installation program prompts you. (If you want to save a previous version of the MON960 MON960 files, you must copy it to a different directory, or specify a different installation directory for the new version.) Installing on Windows Hosts To install the MON960 MON960 files on a Windows host, insert CD into your drive. The CD autorun features will launch the install program. If for any reason the autorun fails to execute the installation, run setup.exe from the CD. MON960 MON960 is usually installed in the same directory as CTOOLS. 1-4 Getting Started 1 What's Next? If your target board is one supported by MON960 MON960, go to Chapter 3, Using the Monitor. If your target board is not supported, go to Chapter 5, Retargeting the Monitor. 1-5 This is a blank page Overview 2 Product Summary This manual describes the MON960 MON960 Debug Monitor. This monitor can help you debug software for embedded systems based on the i960 processor. The monitor resides on an i960 processor target board and lets you control the operation of the processor on that board. With the monitor, you can test your hardware by displaying and changing memory, displaying and changing registers, and disassembling memory. You can also test your software by downloading application programs, then stepping through the program, tracing values, and setting breakpoints. The monitor offers two command interfaces: 1. The User Interface (UI) is a simple command line interface. This interface is supported only through a serial connection to the target and requires either a terminal, a host computer terminal program, or mondb. This is a machine interface using hexadecimal references for address and values. The complete command list is defined in chapter 4. mondb is included in MON960 MON960 and described in Appendix B. 2. The Host Debugger Interface (HI) operates with symbolic debuggers such as gdb960 and gdb960v which are part of the CTOOLs software developers package. This interface supports target communication choices serial, serial with parallel download, serial with PCI download, PCI and JTAG. 2-1 2 MON960 MON960 Debug Monitor User's Guide Monitor Features The monitor User Interface supports the following features: · Memory Display. You can display memory in several forms, including floating-point numbers. · Disassembly. You can display memory as assembler instructions. · Memory modification. You can modify bytes and 32-bit words in memory. · Register display and modification. · Stepping. You can single-step through program execution or step over a procedure. · Breakpoints. You can set two instruction breakpoints with most i960 processors. In addition, you can set two data breakpoints for the i960 Cx, Jx, and Rx series processors. The i960 Hx series processors supports six instruction and data breakpoints. · Downloading. You can download application programs to RAM, flash, or EEPROM. · MON960 MON960 is supplied with hardware modules which allow retargeting support for popular UARTS, timers, and various size flash and EEPRPOM memory configurations. The Host Debugger Interface adds: · Serial, PCI and JTAG communication · Parallel Downloading. When using serial or PCI communication, you can also download application programs over a parallel cable for greater speed in downloading. Parallel download is described in Chapter 2. Components of the Monitor This section describes each component of the monitor and the host software that interfaces to the monitor. Figure 2-1 illustrates the monitor components and their interfaces. 2-2 2 Overview Figure 2-1 MON960 MON960 Structure Target System Host System Monitor MONDB or Debugger Core User Interface Interface Library Host Debugger Interpreter Message Layer Communication Packet Driver Host Interface Layer Communication Packet Driver Device Driver Terminal Emulator Device Driver Terminal A5315-01 A5315-01 Monitor Core The monitor core controls the basic operations of the monitor: · initializing the processor · determining the active interface · determining the active communication port · handling faults and trace events 2-3 2 MON960 MON960 Debug Monitor User's Guide · · · · · · saving and restoring user registers, setting and clearing hardware breakpoints reading and writing to user memory downloading application code setting breakpoints handling application code runtime requests starting the application When the terminal interface or host interface needs to take steps that affect the application, it calls the Core to perform the action. This arrangement enables the monitor to operate consistently, regardless of the interface used. The application register values are copied into a global array when the application stops, and they can be accessed by any part of the monitor. However, all access to user memory is performed by calls to the Core. In this way, access operations to user memory are controlled. For example, each call to write to user memory is checked to see if it affects EEPROM, and then the appropriate routine is called. For detailed information about the monitor core, refer to Chapter 6, Theory of Operation. User Interface The User Interface (UI) is the monitor code that communicates with a terminal. The User Interface parses ASCII commands from the user and calls the monitor core to complete the requested actions. It translates information or status from the Core into ASCII output. Host Debugger Interface Library The Host Debugger Interface Library (HDIL) implements the Host Debugger Interface (HDI), which is described in Chapter 8. This interface provides a high-level abstraction of the target. It can be linked into any 80960 debugger that uses the Host Debugger Interface to access its execution environment. The library generates messages to the target to perform actions required by calls. In addition, it: · maintains a software breakpoint table · maintains a memory cache 2-4 Overview · · · 2 maintains a register cache handles runtime service requests from the application while it is running provides a mechanism to interrupt the application while it is running The software breakpoint table is used for the following purposes: · When the debugger requests user memory, the library replaces any software breakpoints in the memory with the original code. · When a software breakpoint is encountered, the library adjusts the IP back to the address of the breakpoint. · When execution is resumed after a software breakpoint is encountered, the library (in cooperation with the target) restores the original instruction, steps over the instruction, restores the breakpoint, and continues execution, if appropriate. Host Interface The host interface processes messages from HDIL. It interprets the command code, extracts the arguments from the message, and calls the monitor core to complete the required actions. It responds to HDIL with a message containing the status of the command and any results. Downloading The monitor and HDIL support downloading programs to a target using one of three communication media: 1. serial 2. parallel 3. PCI bus Of these three, only serial download is available from the monitor's user Interface. 2-5 2 MON960 MON960 Debug Monitor User's Guide Serial Download All HDI debuggers support serial downloading of ELF/DWARF2, COFF, and b.out formats. Serial download is also available from the User Interface with the following restrictions: · A communications or terminal emulation program that supports Xmodem transfer protocol must be used to connect to the UI, and · The UI only downloads programs in Common Object File Format (COFF). (mondb supports ELF and b.out formats.) Furthermore, the UI only downloads COFF programs with object records in little-endian host and target byte order. The debugger HI does not have these OMF restrictions. Regardless of whether a debugger or the UI is used for serial download, the target must provide a serial port connector and hardware to which the monitor's serial communication API has been ported. With regard to debuggers, HDIL must have been modified for the host's serial I/O API. Currently supported hosts include: · AIX* 3.2 · HP-UX* 9.X · Solaris* 2.4 · SunOS* 4.1.X · Windows 95 and Windows NT Parallel Download Host debuggers may choose to augment serial communication with parallel download. The target must provide a parallel port connector and hardware to which the monitor's parallel download API is ported. Additionally, HDIL must have been modified for the host's parallel I/O API. Currently supported hosts include: · AIX 3.2 · HP-UX 9.X · Solaris 2.4 · SunOS 4.1.X · Windows 95 and Windows NT 2-6 2 Overview Windows parallel download rates of as much as 40 Kbytes per second are possible, while some UNIX hosts support more than 200 Kbytes per second. PCI Download The PCI bus typically provides download transfer rates that range from hundreds of Kbytes per second for small programs to more than one Mbyte per second for large programs. PCI download is available to any host debugger that supports PCI communication. Host debuggers may choose not to support PCI communication, but rather to augment serial communication with PCI download. PCI communications requirements are: · The target must provide PCI hardware to which the monitor's PCI communication API is ported. · The host must provide a PCI bus and PCI-compliant BIOS. · HDIL must have been modified for both the host and target's PCI I/O API. Board Configurations The monitor supports the following target boards: Processor Board Name Board Abbreviations · CYSX, CYKX, CYCX, CYJX, CYHX · Cyclone EP80960BB EP80960BB, PCI80960DP PCI80960DP (Sx, Kx, Cx, Jx, Hx) Cyclone IQ80960RP IQ80960RP (RP 5 volt) · Cyclone IQ80960RP IQ80960RP (RPLV, RD 3 volt) CYRD · Cyclone IQ80960RM IQ80960RM (RM, RN) CYRN CYRP Note: This guide refers to the Cyclone and Cyclone PCI boards as the Cyclone boards. To use the monitor on a target board other than those listed, you must first modify, or retarget, the monitor program for your board. Steps for completing that task are described in Chapter 5, Retargeting the Monitor. 2-7 2 MON960 MON960 Debug Monitor User's Guide mondb TCP/IP Communications Support With version 3.1 of mondb, a host can share an evaluation board with another workstation. The host workstation must run the mondb server software along with the software shown in Figure 2-2. The remote workstation communicates with the server via TCP/IP to access the evaluation board. TCP/IP client debuggers include gdb960, gdb960v (GUI) and mondb. When instructed, the server downloads the remote workstation's code to the evaluation board via PCI or serial connection. For more information on using this feature, see Appendix B. Figure 2-2 TCP/IP Server/Workstation Communication Target System Server Client MONDB Server MONDB or Debugger Interface Library Host Debugger Interface Library Host Debugger Layer Communication Layer Communication Monitor Core User Interface Interpreter Message Layer Communication Packet Driver Host Interface Packet Driver Packet Driver Device Driver TCP/IP Driver Device Driver A5317-01 A5317-01 2-8 Overview 2 Aplink Support Aplink is no longer supported. Ignore all references and comments to Aplink in the source code. JTAG Support JTAG Emulator support has been added to MON960 MON960, mon960 (monitor) and CTOOLS gdb960/gdb960v. The JTAG connection uses the Spectrum Digital Incorporated JTAG emulator: SPI610 SPI610. This emulator connects to the host system through a serial port and to the target system through a JTAG connector port as provided on some Cyclone evaluation boards. The debugger support is provided by CTOOLS gdb960 / gdb960v versions 6.1 and later. mondb does not currently support the JTAG connection. MON960 MON960 can be used in either a skeleton form or as a complete feature build. The skeleton form requires a pointer located at the end of the IBR which points to a JTAG descripter table, code to support system IO if functions such as printf are used, and special JTAG microcode for Jx and Rx JTAG supported processors. The Hx processors use internal JTAG microcode. The full build of MON960 MON960 includes these elements and allows support for the other communication connections supported by MON960 MON960. 2-9 3 This is a blank page Using the Monitor 3 Purpose This chapter explains how to use the MON960 MON960 debug monitor's user interface (UI) to perform simple machine interface debugging tasks. You can connect the target board to a terminal and use the monitor to set breakpoints, step through programs, and examine memory and processor registers. You can also use the monitor with a host system running a terminal program and download application programs using Xmodem protocol. You can also use mondb, supplied with MON960 MON960 to download ELF/DWARF2 or COFF OMF file formats. If you are using a Cyclone evaluation board as your target, the source and hexadecimal files that contain MON960 MON960 have been built for you and reside in the directory you specified during installation. You need only produce new flash from the hexadecimal files and install those flash on your target board. The Specifying Makefile Build Options section, in Chapter 5, has information about producing new flash for your target board. Connecting to the User Interface Complete these steps: 1. Connect a serial cable from the host system to the target board. See your target board documentation for details. 2. Run any standard terminal emulation program such as Windows Terminal, and connect to the port where the target board cable is connected. 3-1 3 MON960 MON960 Debug Monitor User's Guide 3. Set your communications settings to the following: · 9600 to 115,200 baud · Data bits = 8 · Stop bits = 1 · No parity Flow control = XON/XOFF · 4. Enter six carriage returns (). MON960 MON960 responds with an invocation header and a command prompt. You are now ready to enter any of the commands described in the sections that follow. Setting Breakpoints The monitor enables you to set instruction breakpoints, data breakpoints and manually inserted software breakpoints. Instruction breakpoints are set using the break command with the address of the instruction. For example, the following command sets an instruction breakpoint at address 80000040H 80000040H: =>break 80000040 You can set up to two instruction breakpoints on the i960 processors Sx, Kx, Cx, Jx, and Rx and six instruction breakpoints for the Hx. Enter break with no address to display current breakpoints. Enter delete [address] to delete a breakpoint. The break command sets a hardware instruction breakpoint using the breakpoint register in the processor. This type of breakpoint stops execution after the instruction is executed. See the break command in Chapter 4 for more information on hardware instruction breakpoints. 3-2 3 Using the Monitor Hardware breakpoints stop execution when an address you specify with the bdata command is either read from or written to. See the bdata command in Chapter 4 for more information on data breakpoints. Set data breakpoints using the bdata command. The bdata command sets a data breakpoint at the specified address. The monitor stops execution when the specified address is either read from or written to. This command applies only to the i960 Jx/Cx/Rx processors, which have two hardware data breakpoints. The i960 Hx processor supports six breakpoints. If you omit an address, the monitor displays the current data breakpoints. To delete a data breakpoint, use the delete command. You can insert software breakpoints manually. The monitor itself does not include a command to set software breakpoints. Software breakpoints stop execution before executing the instruction where they are set. To set software breakpoints manually: 1. Replace the instruction where you want to break with a mark or fmark instruction. 2. After execution stops at the breakpoint, replace the fmark instruction with the original instruction word and set the instruction pointer back to that instruction. 3. Single-step over the instruction with the step command. If you want to retain the breakpoint, replace the instruction with the fmark instruction again. Displaying Memory The monitor's memory-display commands let you display memory in several different formats, ranging from single bytes to quad words. The following command displays four bytes of memory, beginning at 80000004h, and displays printable ASCII characters within those four bytes. =>dbyte 80000004#4 08008004 : 63 08008005 : 61 c a 3-3 3 MON960 MON960 Debug Monitor User's Guide 08008006 : 67 08008007 : 68 g h The following command displays four quad words of memory beginning at 80000010h: =>dquad 80000010#4 08008010 : 080064e8 08008020 : 5c601e01 08008030 : 080064e8 08008040 : 5c601e01 8c603000 6563028c 8c603000 6563028c 00001000 5ca81615 00001000 5ca81312 5908408c 8a0a3200 5908408c 8c083000 Each memory-display command uses a single memory-access instruction to access memory. For example, the dquad command invokes a four-word burst fetch on the burst bus of the i960 processor. The memory display address must be aligned on a natural boundary. The dasm command lets you disassemble i960 instructions stored in memory. The monitor displays valid instructions in assembly-language format, and invalid instructions in the assembly format .word with the invalid instruction following in hexadecimal. See Chapter 4 for more information on memory display commands. Trace Events The step command single-steps and breaks after every instruction and the ps command steps over procedures. The monitor also supports the following types of instruction traces: Branch trace Call trace 3-4 breaks every time a branch is taken. A conditional branch must take the branch for a branch trace to occur. Branch-andlink instructions do not cause a branch trace to occur. The trace branch on command turns on branch tracing. breaks after any type of call or branchand-link instruction. The next instruction to be executed is the first 3 Using the Monitor instruction in the routine that was called. The trace call on command turns on call tracing. Return trace breaks any time a return instruction is executed. No return trace is generated for a return from a branch and link. The trace return on command turns on return tracing. Supervisor call trace breaks on supervisor calls that cause the processor to change from user mode to supervisor mode. The monitor, by default, leaves your program running in supervisor mode, so there is no mode change and this trace fault does not occur. If the program changes to user mode and then does supervisor calls, this trace fault occurs if the supervisor call trace is enabled. A supervisor return to user mode also triggers a supervisor trace event. The trace supervisor on command enables supervisor call tracing. After issuing a trace command, use the go command to continue executing the program. When a trace event occurs, program control returns to the monitor so you can look at memory or registers and determine the state of the program. See Chapter 4 for more information on the trace command. Loading MON960 MON960 Into Flash Some i960 processor-based boards contain at least two flash memory devices, one of which is used to run MON960 MON960. For example, the Cyclone boards with Cx, Hx and Jx CPU modules have flash memory. These boards are designed so that the flash memory can appear at memory locations E0000000H E0000000H and F0000000H F0000000H. You can load the flash memory 3-5 3 MON960 MON960 Debug Monitor User's Guide with a PROM programmer just like an EPROM, or you can load it while it is in the board. To load MON960 MON960 into flash memory while it is in the board, you must have another program or monitor installed that can do that. For example, if you are using the Cyclone board with a Cx CPU module, and you have a previous version of MON960 MON960 installed in the CPU module, you can use it to load the current MON960 MON960 into the expansion flash sockets. A RM/RN Cyclone board contains only one flash device. Reprogramming MON960 MON960 is not supported because there is only one flash. Reprogramming MON960 MON960 requires the Flash I/O utility which is supplied with the Pro I/O kit. If MON960 MON960 is programmed into the flash, then the monitor supports programming the application memory space of the flash. The monitor attempts to prevent programming over its own space. The RM/RN monitor occupies the memory space from 0xfefd0000 through feffff. Building and Loading New MON960 MON960 Code The sections that follow provide step-by-step instructions for updating the version of MON960 MON960 in the PCI80960DP PCI80960DP and IQ80960RP IQ80960RP evaluation platforms assuming a PC host environment. The RM and RN boards contain only one flash. The flash can be programmed with the Flash I/O Utility which is supplied with the Professional I/O Application Developer's Kit. If MON960 MON960 is programmed into the flash, then the flash programming command will allow programming the application space of the flash. However, it will not allow reprogramming MON960 MON960. 3-6 Using the Monitor 3 PCI80960DP PCI80960DP and EP80960BB EP80960BB Evaluation Platform Programming Procedure NOTE. In order to write to flash on your Cyclone base board, you need a 12 volt power supply. Also, These instructions are used with the CTOOLS 6.0 and MON960 MON960 3.2 toolsets and later. 1. Identify the flash on the Cyclone base board. A blank flash chip ships on each Cyclone evaluation baseboard in socket U22. To write MON960 MON960 to flash, you must move the blank flash from socket U22 to socket U27. 2. Select the operational MON960 MON960 flash. Locate the four-position DIP switch labeled S1. Flip S1.3 to the OFF position. This enables the flash on CPU module daughter board. 3. Set the Cyclone baseboard voltage to 12 volts. Locate the four-position DIP switch labeled S1. Flip S1.1 to the ON position. This enables VPP to the Cyclone base board flash. 4. Power up the Cyclone evaluation base board. Locate the four-pin connector that interfaces to a secondary power supply labeled J6. Three of the connector pins connect to +5 VDC, +12 VDC and ground. (On the PCI-SDK Platform, +12 VDC and +5 VDC power is supplied through the edge connector.) 5. Edit Version.c. (Optional only if you rebuild MON960 MON960 from source.) · Change directories to where the version.c file resides. The default installation directory for CTOOLS is: %INTEL960 INTEL960%\src\mon960\common 3-7 3 MON960 MON960 Debug Monitor User's Guide Version.c contains the following information: const char mon_version_byte = nn; /* version n.n = nn */ const char base_version[] = "MON960 MON960 n.n.n"; const char build_date[] = _DATE_; · Change the file contents to reflect that this is your version of MON960 MON960. For example, change const char base_version[] = "MON960 MON960 n.n.n"; to: const char base_version[] = "MY MON960 MON960"; · Save Version.c. 6. Build the new MON960 MON960 from source (optional). By default the source for MON960 MON960 is located at: c:\intel960\src\mon960\common. You may use the pre-built version of MON960 MON960 there, or build a custom version. To create a custom version: · Copy makefile.xxx to %INTEL960 INTEL960%\src\mon960\common\makefile. where xxx is one of the following make files makefile.ic (ic960 interface, COFF format) makefile.ice (ic960 interface, ELF format) makefile.gnu (gcc960 interface, COFF format) makefile.gne (gcc960 interface, ELF format) · Issue the commands: nmake -f makefile cyhx This creates a file called cyhx.fls. 1. Write the flash. To write the flash, use the mondb.exe utility located in the %INTEL960 INTEL960% in\ directory. If you are going to use the pre-built 3-8 3 Using the Monitor MON960 MON960 files, they are located in the %INTEL960 INTEL960%\roms directory. For example, if you used the default installation directory and are using the pre-built MON960 MON960 files for the 80960Hx, enter: mondb -ser com1 -par lpt1 -ef -ne %INTEL960 INTEL960%\roms\cyhx.fls The options in this command are: -ser com1 use serial port 1 -par lpt1 use parallel port 1 -ne no execute -ef erase flash cyhx.fls input flash filename Note also that if you built a version of MON960 MON960 from the source code as described previously, the cyhx.fls file will be located in the %INTEL960 INTEL960%\src\mon960\common\ directory. 2. Set board voltage back to +5 VDC. Locate the four-position DIP switch labeled S1. Flip S1.1 to the OFF position. This disables VPP to Cyclone EP base board flash and protects your flash. Note that the PCI80960DP PCI80960DP and i960 Hx processor evaluation platforms do not boot when VPP is enabled and MON960 MON960 is running from the evaluation board flash. 3. Set board to boot from U27 socket. Locate the four-position DIP switch labeled S1. Set S1.3 ROMSWAP to the ON position. This exchanges the addresses of the CPU Module ROM and the base board ROMs. When the switch is OFF the processor boots from the CPU Module ROM; when the switch is ON the processor boots from the base board ROMs. 4. Reset base board. Locate the reset button labeled S2. Use this button to manually reset the Cyclone base board and boot from the base board ROMs. 3-9 3 MON960 MON960 Debug Monitor User's Guide IQ80960RP IQ80960RP Eval Board Flash Programming Procedure 1. Identify the flash on the Cyclone base board. A blank flash chip ships on each Cyclone evaluation baseboard in socket U4. To write MON960 MON960 to flash, you must add a blank flash in socket U3. 2. Select the operational MON960 MON960 flash. Locate the four-position DIP switch labeled S1. Flip S1.3 to the OFF position. This enables the flash at U4. 3. Set the Cyclone baseboard voltage to 12 volts. Locate the four-position DIP switch labeled SW1. Flip SW1.1 to the ON position. This enables VPP to the Cyclone base board flash. 4. Power up or reset the host to test the Cyclone base board. On the IQ80960RP IQ80960RP Platform, +12 VDC and +5 VDC power is supplied through the edge connector. 5. Edit Version.c. (Optional only to rebuild MON960 MON960 from source.) · Change directories to where the version.c file resides. The default installation directory for CTOOLS is: %INTEL960 INTEL960%\src\mon960\common Version.c contains the following information: const char mon_version_byte = nn; /* version n.n = nn */ const char base_version[] = "MON960 MON960 n.n.n"; const char build_date[] = _DATE_; 3-10 Using the Monitor · 3 Change the file contents to reflect that this is your version of MON960 MON960. For example, change const char base_version[] = "MON960 MON960 n.n.n"; to: const char base_version[] = "MY MON960 MON960"; · Save Version.c. 6. Build the new MON960 MON960 from source (optional). By default the source for MON960 MON960 is located at: c:\intel960\src\mon960\common. You may use the pre-built version of MON960 MON960 there, or build a custom version. To create a custom version: · Copy makefile.xxx to %INTEL960 INTEL960%\src\mon960\common\makefile. where xxx is one of the following make files makefile.ic (ic960 interface, COFF format) makefile.ice (ic960 interface, ELF format) makefile.gnu (gcc960 interface, COFF format) makefile.gne (gcc960 interface, ELF format) · Issue the commands: nmake -f makefile cyrp This creates a file called cyrp.fls. 7. Write the flash. To write the flash, use the mondb utility supplied with MON960 MON960. If you are going to use the pre-built MON960 MON960 files, they are located in the %INTEL960 INTEL960%\roms directory. For example, if you used the default installation directory and are using the pre-built MON960 MON960 files for the 80960RP 80960RP, enter: mondb -ser com1 -ef -ne %INTEL960 INTEL960%\roms\cyrp.fls 3-11 3 MON960 MON960 Debug Monitor User's Guide The options in this command are: -ser com1 use serial port 1 -ne no execute -ef erase flash cyrp.fls input flash filename Note also that if you built a version of MON960 MON960 from the source code as described previously, the cyrp.fls file will be located in the %INTEL960 INTEL960%\src\mon960\common\ directory. 8. Disable the +12V programming voltage. Locate the four-position DIP switch labeled SW1. Flip S1.1 to the OFF position. This disables VPP to Cyclone EP base board flash and protects your flash. 9. Set board to boot from U3 socket. Locate the four-position DIP switch labeled SW1. Set SW1.3 ROMSWAP to the ON position. This exchanges the addresses of the U4 and U3 ROMs. When the switch is OFF the processor boots from the U4 ROM; when the switch is ON the processor boots from the U3 ROM. 10. Reset the base board. Reset the base board by rebooting the host PC. There is no reset switch on the IQ80960RP/RD IQ80960RP/RD evaluation board. IQ80960RPLV IQ80960RPLV and IQ80960RD IQ80960RD Eval Board Flash Programming Procedure 1. Only the soldered-in flash located at U9 can be reprogrammed. The socketed flash at U10 is not supplied with the necessary 12 volt program voltage, therefore it is not programmable on the board. 2. Select the operational MON960 MON960 flash. 3-12 3 Using the Monitor Locate the four-position DIP switch labeled S1. Flip S1.3 to the OFF position. This enables the flash at U10. 3. Reset the host system to reset the Cyclone base board. On the IQ80960RP IQ80960RP Platform, +12 VDC and +3 VDC power is supplied through the edge connector. 4. Edit Version.c. (Optional only to rebuild MON960 MON960 from source.) · Change directories to where the version.c file resides. The default installation directory for CTOOLS is: %INTEL960 INTEL960%\src\mon960\common Version.c contains the following information: const char mon_version_byte = nn; /* version n.n = nn */ const char base_version[] = "MON960 MON960 n.n.n"; const char build_date[] = _DATE_; · Change the file contents to reflect that this is your version of MON960 MON960. For example, change const char base_version[] = "MON960 MON960 n.n.n"; to: const char base_version[] = "MY MON960 MON960"; · Save Version.c. 5. Build the new MON960 MON960 from source (optional). By default the source for MON960 MON960 is located at: c:\intel960\src\mon960\common. You may use the pre-built version of MON960 MON960 there, or build a custom version. To create a custom version: · Copy makefile.xxx to %INTEL960 INTEL960%\src\mon960\common\makefile. where xxx is one of the following make files 3-13 3 MON960 MON960 Debug Monitor User's Guide · makefile.ic (ic960 interface, COFF format) makefile.ice (ic960 interface, ELF format) makefile.gnu (gcc960 interface, COFF format) makefile.gne (gcc960 interface, ELF format) Issue the commands: nmake -f makefile cyrd This creates a file called cyrd.fls. 6. Write the flash. To write the flash, use the mondb utility supplied with MON960 MON960. If you are going to use the pre-built MON960 MON960 files, they are located in the %INTEL960 INTEL960%\roms directory. For example, if you used the default installation directory and are using the pre-built MON960 MON960 files for the 80960RP 80960RP, enter: mondb -ser com1 -ef -ne %INTEL960 INTEL960%\roms\cyrd.fls The options in this command are: -ser com1 use serial port 1 -ne no execute -ef erase flash cyrp.fls input flash filename Note also that if you built a version of MON960 MON960 from the source code as described previously, the cyrd.fls file will be located in the %INTEL960 INTEL960%\src\mon960\common\ directory. 7. Set board to boot from U10 socket. Locate the four-position DIP switch labeled SW1. Set SW1.3 ROMSWAP to the ON position. This exchanges the addresses of the U9 and U10 ROMs. When the switch is OFF the processor boots from the U9 ROM; when the switch is ON the processor boots from the U10 ROM. 3-14 Using the Monitor 3 8. Reset the base board. Reset the base board by rebooting the host PC. There is no reset switch on the IQ80960RPLV IQ80960RPLV and RD evaluation board. IQ80960RM/RN IQ80960RM/RN Eval Board Flash Programming A RM/RN Cyclone board contains only one flash device. Reprogramming MON960 MON960 is not supported because there is only one flash. Reprogramming MON960 MON960 requires the Flash I/O utility which is supplied with the Pro I/O kit. If MON960 MON960 is programmed into the flash, then the monitor supports programming the application memory space of the flash. The monitor attempts to prevent programming over its own space. The RM/RN monitor occupies the memory space from 0xfefd0000 through feffff. 3-15 This is a blank page Monitor Commands 4 This chapter provides you with detailed information on the MON960 MON960 commands, including the elements of the command language, on overview of the commands, as well as a complete command reference. Elements of the Command Language The elements of the command language include names, addresses, and numbers, as described in the following sections. Names Names include command names and options. The monitor parses the command line using only the first two characters of names. Therefore, you can enter just the first two letters of each command or option. For example, the syntax in the following commands is equivalent: =>trace branch on =>tr br on Register names cannot be abbreviated. Addresses Addresses used in commands are hexadecimal and are accepted either with or without a leading zero. 4-1 4 MON960 MON960 Debug Monitor User's Guide Numbers Numbers used in display commands are decimal when preceded by #. Note that addresses are always in hex and values can be entered as decimal or hex. The default number of items displayed (for example, bytes or words) is one, unless you specify a number. Overview of Commands Below is a listing of all MON960 MON960 commands, in their abbreviated forms: Command Name Description . Repeats last entered command. bd[ata] [address] Sets a data breakpoint at the specified address. br[eak] [address] Sets an instruction breakpoint. cs Configures the secondary PCI bus. cf[lash] Checks to see if the flash memory is blank. da[sm] [address] #instructions Disassembles instructions beginning at the specified address. db[yte] address [#bytes] Displays memory in bytes beginning at the specified address. dc[char] address [#characters] dd[ouble] address [#doublewords] Displays memory as ASCII characters. de[lete] address Deletes an instruction breakpoint at the specified address. di[splay] address [#words] Displays memory in words beginning at the specified address. di[splay] register Displays the contents of the specified register. Displays memory in double words at the specified address. do[wnload] [offset] dq[uad] address [#quadwords] dp 4-2 Displays memory in quad words beginning at the specified address. Displays the current PRCB address. 4 Monitor Commands ds[hort] address [#shortwords] Displays memory in short words beginning at the specified address. dt[riple] address Displays memory in triple words beginning at the specified address. ef[lash] Erases flash memory. fi[ll] address1 address2 worddata Fills memory from address1 to address2 with the word value of worddata. fl[ong] address [#longreals] Displays long real (64-bit) floating-point numbers beginning at the specified address. fr[eal] address [#reals] Displays real (32-bit) floating-point numbers beginning at the specified address. fx[real] address [#extendedreals] Displays extended real (80-bit) floating-point numbers beginning at the specified address. go [address] Begins execution at the specified address. he[lp] [command] ? [command] la register value Displays help for a specified command. lm register value Sets the contents of the specified logical memory mask register to the designated value. mb[yte] address Modifies one byte of memory. mc[on] region value Sets the memory configuration register for the specified region to the specified value. md address hex-value Modifies one word in memory. md register hex-value Modifies the specified register. mo[dify] address [#words] Modifies one or more words in memory. mo[dify] register Modifies the specified register. pm [address] [hex value] Displays/modify the PC PCI shared memory space at address. po Runs the target's power-on self test. pp bus# device# [function#] Displays the PCI config space for the PCI device specified by the bus, device, and function members. Sets the contents of the specified logical memory address register to the designated value. 4-3 4 MON960 MON960 Debug Monitor User's Guide ps[tep] [address] Steps over a procedure. pt [address] [hex value] Displays the PCI register space at offset address or writes a word to the register at offset address. qu Resets the target board and leaves it waiting for autobaud from a host or terminal. rb Resets the target board and leaves it waiting for autobaud from a host or terminal. re[gisters] Displays the contents of all registers. rs Resets the target board. st[ep] [address] Single-steps one instruction starting at the current IP or specified address. tr[ace] [option [on|off]] Turns a trace option on or off. ve[rsion] Displays the MON960 MON960 version number. Tables 4-1 through 4-4 group the MON960 MON960 commands according to function and give a brief description of each command. Table 4-1 Execution and Break Commands Entry Description bdata Sets a data breakpoint. break Sets an instruction breakpoint. delete Deletes a breakpoint. go Single steps one instruction or procedure. step Single steps one instruction. trace 4-4 Starts program execution. pstep Sets trace options. 4 Monitor Commands Table 4-2 Memory Access Commands Entry Description cflash Checks flash memory. dasm Displays memory as assembler instructions. dbyte Displays memory in bytes. dchar Displays memory as ASCII characters. ddouble Displays memory in double words. display Displays memory or registers. download Downloads a program. dquad Displays memory in quad words. dshort Displays memory in short words. dtriple Displays memory in triple words. eflash Erases flash memory. fill Fills memory. flong Displays long real floating point numbers. freal Displays real floating point numbers. fxreal Displays extended real floating point numbers. la Sets a logical memory address register. lm Sets a logical memory mask register. mbyte Modifies one byte of memory. mc Sets a memory configuration register. md Modify register or one word of memory. modify Modifies memory or registers. posttest Runs the target post test. registers Displays registers. 4-5 4 MON960 MON960 Debug Monitor User's Guide Table 4-3 Monitor Environment Commands Entry Description help or ? Displays help on monitor commands. rb Resets the target board. version Displays the monitor version. . Table 4-4 Reboots the target board and communications link. rs Repeats the previous command. PCI Commands Entry Description cs Configures the secondary PCI bus. pm Displays the PCI shared memory space at offset address or writes a word at offset address. pp Displays the PCI config space for the PCI device specified by the bus, device, and function members. pt Displays the PCI register space at offset address or writes a word to the register at offset address. Alphabetical Command Reference The MON960 MON960 commands are listed in alphabetical order. The entries include the command syntax and examples of using the commands. The examples include output from the monitor. 4-6 Monitor Commands 4 . . The . period command repeats the last entered command. Example =>bd 801c000 =>. bdata bd[ata] [address] The bd command sets a data breakpoint at the specified address. The monitor stops execution when the specified address is either read from or written to. This command applies only to the i960 Jx/Cx/Rx processors, which have two hardware data breakpoints. The i960 Hx processor supports six breakpoints. If you omit an address, the monitor displays the current data breakpoints. To delete a data breakpoint, use the delete command. Example =>bd 801c000 4-7 4 MON960 MON960 Debug Monitor User's Guide break br[eak] [address] The br command sets an instruction breakpoint. The address must be on an instruction boundary. You can set up to two instruction breakpoints on the i960 Kx, Sx, Cx, Hx, and Jx processors. Enter br with no address to display all current breakpoints. To delete a breakpoint, use the delete command. Example =>br 8008000 cflash cf[lash] The cf command checks to see if the flash memory is blank. When it is not blank, the monitor displays the first and last addresses of programmed memory and the total size of the flash memory. Example =>cf Flash is programmed between 0x10000000 and 0x10005820 EEPROM size is 0x20000 cs cs The cs command configures the secondary PCI bus. This must done prior to testing private PCI devices on the Rx secondary bus. 4-8 4 Monitor Commands dasm da[sm] [address] #instructions The dasm command disassembles instructions beginning at the specified address. The default address is the current instruction pointer. The address must be on a word boundary. Example =>da 8008000 2 08008000 : 5c601e01 08008004 : 6563028c mov 1, r12 modpc r12, r12, r12 dbyte db[yte] address [#bytes] The db command displays memory in bytes beginning at the specified address. The display includes ASCII characters, if printable. Example =>db 8008006 2 08008006 : 63 08008007 : 65 c e 4-9 4 MON960 MON960 Debug Monitor User's Guide dchar dc[har] address [#characters] The dc command displays memory as ASCII characters. Example =>dc A000C000 A000C000 10 A000C000 A000C000 : .FC.-x. ddouble dd[ouble] address [#doublewords] The dd command displays memory in double words at the specified address. The address must be aligned on a two-word boundary. Example =>dd 8008000 2 08008000 : 5c601e01 6563028c 08008008 : 5ca81615 8c083000 4-10 Monitor Commands 4 delete de[lete] address The de command deletes an instruction breakpoint (for the Jx/Cx/Hx processor, a data breakpoint) at the specified address. Example =>de 8008000 display di[splay] address [#words] di[splay] register The di command displays memory in words beginning at the specified address or displays the content of the specified register. When displaying addresses the address must be aligned on a word boundary. Example =>di 8008000 2 08008000 : 5c601e01 08008004 : 6563028c The di command displays the contents of the specified register. The registers command displays the valid register names. Example =>di pfp pfp : 0801c500 4-11 4 MON960 MON960 Debug Monitor User's Guide download do[wnload] [offset] When using the UI interface with a terminal the do command downloads only COFF OMF files using the Xmodem protocol. When using mondb the do command can download ELF/DWARF2, COFF, and b.out OMF file formats. The offset is added to each word in the file to form the actual load address. This feature enables you to download position-independent code, or download code to flash that can be jumpered for different addresses. When the monitor downloads a file, it automatically sets the IP to the start address given in the file. Example =>do Downloading (Invoke local download here. Bring the host side into the foreground running Xmodem and download the file.) - Download complete -Start address is : 8008000 Downloading Flash Memory The monitor supports programming flash memory when it is available on the target board. Any memory-write command or download command programs the flash memory when the address falls within the memory space of the flash. The monitor checks to see that the flash memory is erased before attempting to program it. If the flash is not erased, the write fails. 4-12 Monitor Commands 4 dp dp Displays the current PRCB address. dquad dq[uad] address [#quadwords] The dq command displays memory in quad words beginning at the specified address. The address must be aligned on a four-word boundary. Example =>dq 80008000 08008000 : 5c601e01 6563028c 5ca81615 8c083000 08008010 : 080064e8 8c603000 00001000 5908408c dshort ds[hort] address [#shortwords] The ds command displays memory in short words beginning at the specified address. The address must be aligned on a two-byte boundary. Example =>ds 8008000 2 08008000 : 1e01 08008002 : 5c60 4-13 4 MON960 MON960 Debug Monitor User's Guide dtriple dt[riple] address The dt command displays memory in triple words beginning at the specified address. The address must be aligned on a four-word boundary. This alignment indicates that you can display only one triple word at a time. Example =>dt 8008000 08008000 : 5c601e01 6563028c 5ca81615 eflash ef[lash] The ef command erases flash memory. The monitor prints an error message if the board does not support flash memory or the flash memory cannot be erased. 4-14 Monitor Commands 4 fill fi[ll] address1 address2 worddata The fi command fills memory from address1 to address2 with the word value of worddata. If address1 = address2 then the monitor fills one word at address1. The address1 must be aligned on a word boundary. Example =>fi 8008000 800800c a5a5a5a5 flong fl[ong] address [#longreals] The fl command displays long real (64-bit) floating-point numbers beginning at the specified address. The address must be aligned on a two-word boundary. Example =>fl 8008000 2 08008000 : 2.46506565e180 08008008 : -0.10557101e-249 4-15 4 MON960 MON960 Debug Monitor User's Guide freal fr[eal] address [#reals] The fr command displays real (32-bit) floating-point numbers beginning at the specified address. The address must be aligned on a word boundary. Example =>fr 8008000 08008000 : 6.02300001e23 fxreal fx[real] address [#extendedreals] The fx command displays extended real (80-bit) floating-point numbers beginning at the specified address. Although extended real numbers are 10 bytes, they must be aligned on quad word boundaries. Example =>fx 8008000 2 08008000 : 5.03696464e 19 08008010 : 6.40306565e 84 4-16 Monitor Commands 4 go go [address] The go command begins execution at the specified address. Enter go with no address to begin execution at the current IP. When the monitor downloads a COFF file, it automatically sets the IP to the start address given in the file. See Chapter 7 for more information on program execution. Example =>go 10008000 help or ? he[lp] [command] The he command displays help for a specified command. If you omit a command, the monitor displays a summary of all commands. Example =>he rs rs Resets the board. 4-17 4 MON960 MON960 Debug Monitor User's Guide la la regno value The la command sets the contents of the specified logical memory address register to the designated value. The valid range of regno is 0-1. This command is valid for Jx/Hx processors only. Both command arguments are assumed to be hex constants. NOTE. It is important for consistent monitor operation that you use this command correctly. Example =>la 0 a0000002 lm lm regno value The lm command sets the contents of the specified logical memory mask register to the designated value. The valid range of regno is 0-1. This command is valid for Jx/Hx processors only. Both command arguments are assumed to be hex constants. NOTE. It is important for consistent monitor operation that you use this command correctly. Example =>lm 0 f0000001 4-18 Monitor Commands 4 mbyte mb[yte] address The mb command modifies one byte of memory. The memory address is designated in hexadecimal. When the monitor displays the specified address, you can enter a value in hexadecimal (34 in the example). Example =>mb 2800800c 2800800c : 34 mcon mc[on] region value The mc command sets the memory configuration register for the specified region to the specified value. The valid range of region is 0 to 0xf. This command is valid for the Cx/Hx/Jx processors only. When used for the Jx processor, the region is automatically divided by two to map to the supported range of that processor. Both command arguments are assumed to be hex constants. NOTE. It is important for consistent monitor operation that you use this command correctly. Example =>mc a 800000 4-19 4 MON960 MON960 Debug Monitor User's Guide modify data md[dify] address | register hex-value The md command modifies one word in memory. When the monitor displays the current value of the specified address, you can enter a new value. Press Enter to leave the location unchanged. Example =>md 801c000 15 0801c000 : 00000002 : 5 0801c004 : 00000100 : This example changes the contents of 0801c000 to 5 and leaves the contents of 0801c004 unchanged. Programming Flash Memory. The monitor supports programming flash memory if it is available on the target board. Any memory-write command or download command programs the flash memory when the address falls within the memory space of the flash and not part of MON960 MON960. The monitor checks to see that the flash memory is erased before attempting to program it. If the flash is not erased, the write fails. md register hex-value Modifies the specified register. When the monitor displays the current value of the register, you can enter a new value. Press Enter to leave the register unchanged. The monitor cannot modify floating-point registers from the user interface. The registers command displays the valid register names. The register value is not changed until the application program resumes execution. 4-20 Monitor Commands 4 NOTE. The mb and mo commands are not allowed in mondb using the -d option. Use the md command instead. Example =>md g0 12ffff78 modify mo[dify] address [#words] mo[dify] register The mo command modifies one or more words in memory. When the monitor displays the current value of the specified address, you can enter a new value. Press Enter to leave the location unchanged. Example =>mo 801c000 2 0801c000 : 00000002 : 5 0801c004 : 00000100 : This example changes the contents of 0801c000 to 5 and leaves the contents of 0801c004 unchanged. Programming Flash Memory. The monitor supports programming flash memory if it is available on the target board. Any memory-write command or download command programs the flash memory when the address falls within the memory space of the flash. The monitor checks to see that the flash memory is erased before attempting to program it. If the flash is not erased, the write fails. mo register 4-21 4 MON960 MON960 Debug Monitor User's Guide Modifies the specified register. When the monitor displays the current value of the register, you can enter a new value. Press Enter to leave the register unchanged. The monitor cannot modify floating-point registers from the user interface. The registers command displays the valid register names. The register value is not changed until the application program resumes execution. Example =>mo r10 r10 : 00008000 : 1 po po [follow menu steps if applicable] The po command runs the target's power-on self test. The menus step you through tests for each hardware component of the board. For a better understanding of the monitor operation, see Chapter 5. The test menu is processor dependent. Below is a representation of support test menus for different processors. To select a test, enter the test number, for example, for Memory Tests, enter 1. For 80960RP/RD 80960RP/RD Processors 1. 2. 3. 4. 5. 6. 7. 8. 4-22 Memory Tests Repeating Memory Test 16C550 16C550 UART Serial Port Tests Internal Processor Timer Tests LED Tests Flash Tests Continuous Write Continuous Fill Monitor Commands 4 9. Continuous Read 10. System Call Tests 11. IQ70/73 IQ70/73 82557 PCI Ethernet Tests 12. IQ70/73 IQ70/73 53C875 53C875 PCI SCSI Tests 13. Exit the Test For IQ80960RM/RN IQ80960RM/RN Processors 1. Memory Tests 2. Repeating Memory Test 3. 16C550 16C550 UART Serial Port Tests 4. Internal Processor Timer Tests 5. LED Tests 6. Flash Tests 7. Continuous Write 8. Continuous Fill 9. Continuous Read 10. System Call Tests 11. 82557 PCI Ethernet Tests 12. Secondary PCI Bus Test 13. 53C875 53C875 PCI SCSI Tests 14. Exit the Test For Non 80960Rx Processors 1. Memory Tests 2. Repeating Memory Test 3. 16C550 16C550 UART Serial Port Tests 4. 85C36 85C36 CIO Timer Chip Tests 5. On-board EEPROM Tests 6. Squall EEPROM Tests 7. Squall Ethernet Tests 8. PLX-9060/PLX-9080 PLX-9060/PLX-9080 PCI Chip Tests 9. LED Tests 10. Exit the Test 4-23 4 MON960 MON960 Debug Monitor User's Guide pstep ps[tep] [address] The ps command steps over a procedure. If the instruction is call, callx, calls, bal, or balx, the entire called procedure is executed and execution stops before the next instruction after the procedure. Otherwise, one instruction is executed. When execution stops, the monitor displays the next instruction to be executed. Since this command uses a software breakpoint, which requires updating the instructions, do not use it if the code is in ROM. If you do try to use it in ROM code, the monitor reports a write verification error and does not start execution. Ref: step pm pm [address] [hex value] Displays the PC PCI shared memory space at offset address or writes a word at offset address. Example =>pm 0:1234 4-24 Monitor Commands 4 pp pp bus# device# [function#] Displays the PCI config space for the PCI device specified by the bus, device, and function numbers. This option is for use with an i960 RP processor only. Example =>pp 0 E 0 Ref: cs, pm, pt pt pt [address] [hex value] Displays the PCI register space at offset address or writes a word to the register at offset address. Example =>pt 0:1234 4-25 4 MON960 MON960 Debug Monitor User's Guide qu and rb qu/rb The qu or rb command resets the target board and leaves it waiting for autobaud from a host or terminal. If you want to continue using a terminal, press Enter two or three times to initiate the monitor sign-on. rb is retained for compatibility. See also the rs and rb commands. registers re[gisters] The re command displays the contents of all registers. Example =>re g0 : g4 : g8 : g12: g1 : g5 : g9 : g13: 00000000 00000000 00000000 00000000 g2 : g6 : g10: g14: 00000000 00000000 00000000 00000000 g3 : g7 : g11: fp : 00000000 00000000 00000000 0801c540 pfp: r4 : r8 : r12: pc : 0801c500 00000000 00000000 00000000 001f0003 sp : r5 : r9 : r13: ac : 0801c580 00000000 00000000 00000000 3b001001 rip: r6 : r10: r14: tc : 08000004 00000000 00000000 00000000 00000000 r3 : r7 : r11: r15: 00000000 00000000 00000000 00000000 fp0: fp1: fp2: fp3: 4-26 00000000 00000000 00000000 00000000 0.000000e 0.000000e 0.000000e 0.000000e 0 0 0 0 4 Monitor Commands rs rs The rs command resets the target board. This command retains the current baud rate and prints the monitor sign-on. It does not leave the target waiting for autobaud. See also the rb command. step st[ep] [address] The st command single-steps one instruction starting at the current IP or specified address. When execution stops, the monitor displays the next instruction to be executed. Example =>st 8000000 08000004 : 6563028c Ref: modpc r12, r12, r12 ps 4-27 4 MON960 MON960 Debug Monitor User's Guide trace tr[ace] [option [on|off]] The tr command turns a trace option on or off as follows: branch breaks every time a branch is taken. call breaks after any type of call or branch-and-link instruction. return breaks any time a return instruction is executed. supervisor breaks on supervisor calls from user mode. To display the current value of all trace options, enter trace. Enter trace option without on or off to display the status of the specified option. To start execution with the specified trace options, use the go command. Example =>tr br on branch trace on call trace off return trace off supervisor trace off 4-28 Monitor Commands 4 version ve The ve command displays the MON960 MON960 version number. 4-29 This is a blank page Retargeting the Monitor 5 This chapter explains how to retarget the MON960 MON960 debug monitor to run on a non-Intel board and how to rebuild and program MON960 MON960 onto Intel evaluation boards. Intel supported are listed in Table 5-1. Retargeting the monitor involves the following steps: 1. selecting appreciate low level device files 2. copying the board-specific source files and modifying them to match targets memory configuration 3. editing the makefile to include selected components and build switches 4. modifying the linker-directives file to match targets memory configuration 5. configuring the makefile 6. making the monitor files 7. programming and installing new flash devices containing the monitor program 8. verifying monitor operation Output Files The build process produces two types of output files, a .fls file and a. hex file. For example, in support of the 80960CY 80960CY processor on a Cyclone EP80860BB EP80860BB board, the files cycx.fls and cycx.hex will be generated. The .fls file is used by mondb to reprogram MON960 MON960 on evaluations boards which contain two flash devices such as EP80960BB EP80960BB and the PCI80960DP PCI80960DP but will not work on single IQ80960RM/RN IQ80960RM/RN boards. The .hex file is an Intel® hex file which is supported by most third party PROM / FLASH programmers. Intel® compiled files are found in the MON960 MON960 installation subdirector ROMS. 5-1 5 MON960 MON960 Debug Monitor User's Guide Table 5-1 List of Cyclone Board Names and Abbreviations Processor Board Name Board Abbreviations · CYSX, CYKX, CYCX, CYJX, CYJT, CYHX · EP80960BB EP80960BB, PCI80960DP PCI80960DP (Sx, Kx, Cx, Jx, Hx) IQ80960RP IQ80960RP (RP) · IQ80960RPLV IQ80960RPLV CYRD · IQ80960RD IQ80960RD CYRD · IQ80960RM IQ80960RM CYRN · IQ80960RN IQ80960RN CYRN CYRP Note: This guide refers to the Cyclone and Cyclone PCI boards as the Cyclone boards. Types of Source Files The source code for the monitor is in the mon960/common directory. The monitor contains three classifications of files as follows. · files pertaining to all i960 processor targets (board-independent) · files that depend on the target type (board-specific) · hardware-specific files, such as the 82c54 and 85c36 timers Retargeting involves changing the board-specific files, and selecting appropriate hardware-specific files. In this manual, board is a place holder for the name of your board. The above table lists the supported board names with the abbreviations that can substitute for board. Carefully reading MON960 MON960's makefile can determine exactly which files are used for a specific evaluation board. Code Areas Affected by Retargeting When you retarget the monitor, the following areas of code may require modification: · memory configuration, which includes the following: memory configuration in monboard.ld bus configuration in board.h (except for the Sx/Kx processors) hardware-dependent addresses and constants in board.h 5-2 Retargeting the Monitor · · 5 For more information, refer to the Memory Configuration section later in this chapter. board-specific data in board_hw.c, which includes the following, described in the Board-specific Data section: processor architecture, variable arch architecture name, variable char arch_name[] board name, variable char board_name[] hardware-dependent routines, including, but not limited to: the device-driver routines in 82510.c or 16552.c, described in the Serial Device Driver Routines section the LED routines in leds_sw.c, described in the Routines in leds_sw.c section the routines for using flash memory, described in the Routines in flash.c section the parallel and PCI download routines. The parallel download routines are described in the Routines in paradrvr.c section. For information on the PCI download routines, see the section titled MON960 MON960 Support for PCI Communication in Chapter 6. The following sections discuss the portions of the monitor code that require modification, and suggest modifications to that code. 5-3 5 MON960 MON960 Debug Monitor User's Guide Modifying Board-specific Files To retarget the monitor for your board: 1. Duplicate the board-specific files that best match your hardware, renaming these files to identify your target board. For use in these examples, let's say your target is a Fred board containing an i960 Cx microprocessor. File Name Contents and Example board.h hardware addresses and values Example: copy cycx.h and rename it fred.h board_hw.c board name, architecture name, initialization, reset, and hardware interface routines Example: copy cycx_hw.c and rename it fred_hw.c monboard.ld monitor linker-directives file for the board Example: copy moncycx.ld and change it to monfred.ld. 2. Modify the new board-specific files to support your target. 3. Select or add the hardware-specific files that support your target board's features. Hardware-specific files are in the boardindependent MON960 MON960 source code. 4. Change the makefile to reflect your new board name and the files you selected to support it. Refer to the section later in this chapter titled Creating the ROM Image. 5. Use the make command to build your retargeted MON960 MON960 files. Refer to the section titled Creating the ROM Image later in this chapter. 5-4 Retargeting the Monitor 5 Board-specific Files board.h board.h, the board-specific include file, contains the following information: · constants that specify information about your board's hardware addresses. You must change these constants to describe the target board. · constants you must define in order to use the monitor's flash memory routines. Refer to the section later in this chapter titled Routines in flash.c. · constants that specify some of the fields of the boot control table (except for the Sx/Kx processors.). The boot control table fields specified in board.h determine the board's bus configuration. Refer to the next section, board_hw.c, for more information on those constants. · if your board uses the 82510 UART, definitions of constants that support its use. Refer to the Serial Device Driver Routines section for more information. Note: If your board uses another serial device, you must provide the driver to support it. · if your board uses the 16552 DUART, definitions of constants that support its use. Refer to the Serial Device Driver Routines section for more information. · #define values used by the routines in leds_sw.c. Those routines are used to access and manipulate the LEDs on the board. Refer to the section Routines in leds_sw.c for more information. · if your board supports parallel download, definitions of constants that support its use. Refer to the section in this chapter titled Routines in paradrvr.c for more information. 5-5 5 MON960 MON960 Debug Monitor User's Guide · if you use the timer driver 82c54.c (EPCX) or 85c36.c (CYCX), definitions of the following values that support its use: Value TIMER_BASE CRYSTAL_TIME TIMER_0_VECTOR Setting base address for timer chip timer clock input frequency in MHz interrupt vector set by MON960 MON960, e.g. 0XD2 TIMER_1_VECTOR interrupt vector set by MON960 MON960, e.g. 0XC2 TIMER_0_IRQ TIMER_1_IRQ TIMER_0_OFFSET TIMER_1_OFFSET interrupt pin used by this timer interrupt pin used by this timer register address offset for each timer register address offset for each timer board_hw.c Variables The board_hw.c file contains variables that specify information about your board. You must change the contents of these variables to describe the target board. Variable Description int arch arch specifies the processor architecture. Supported arch values are defined in src/hdil/common/hdi_arch.h Examples of arch are: · ARCH_CA · ARCH_HX · ARCH_JX · ARCH_RP 5-6 5 Retargeting the Monitor The value of arch is used by the monitor and host to determine what registers and other capabilities your board has. If your target has a CA or CF processor, use ARCH_CA. These values are defined in hdi_arch.h in hdil/common. Do not add an architecture type since the host-side debuggers depend on these values. char arch_name[] arch_name contains the name of the processor architecture (Cx, Jx, Hx, or Rx). The name is printed in a banner across the screen when the monitor starts up. char board_name[] board_name contains the name you specified for your board. The name prints in a banner across the screen when the monitor starts up. char target_common_name[] target_common_name is a shortened version of board_name[]. target_common_name is reported to debuggers using the hdi_get_monitor_config() service. ADDR unwritable_addr unwritable_addr is the address of a read-only memory location that does not fault the processor or hang the target hardware when written to. This information is reported to debuggers via the hdi_get_monitor_config() service. Set this variable to -1 if an unwritable address is not available. 5-7 5 MON960 MON960 Debug Monitor User's Guide A date string, located in bld_date.c, prints in the banner when the monitor starts up. You may use this variable to track retargeting code revisions. For the i960 Jx/Cx/Hx/Rx processor, the file board_hw.c also contains the boot control table. This table is declared const because it must be in ROM, where it is read during processor initialization. During Monitor initialization, it is copied to RAM, so the monitor may change fields as required during operation. The fields of the control table that specify the bus configuration are specified using defined constants from board.h. If you need to change the bus configuration, do so in that file. Make any other changes to the control table either in board_hw.c, or at runtime in init_hardware. Routines The board_hw.c file contains the following initialization routines that you might need to change when retargeting the monitor: void init_hardware(void) int get_int_vector(int) void init_imap_reg(PRCB *) void board_reset(void) int clear_break_condition(void) void board_go_user(void) void board_exit_user(void) These routines isolate target-hardware dependencies in the monitor. If necessary, modify these files to conform to the capabilities of your target board. Below is an explanation of each routine in board_hw.c. init_hardware() void init_hardware(void) This routine initializes the target board. The routine writes the processor interrupt control registers with values applicable to the board. It also initializes other board resources. See the programmer's reference manual 5-8 Retargeting the Monitor 5 for your processor for information on programming the interrupt control registers. Before calling the init_hardware() routine, the monitor establishes most of its own default variables. Thus, the values of these default variables can be changed, if necessary, in the init_hardware() routine. The init_hardware() routine must not initialize any hardware devices that are not required for the operation of the monitor. Initializing these other devices should be left to the application that is downloaded to the target board once the monitor is running. get_int_vector() int get_int_vector(int) This routine returns the vector number of the interrupt that is generated when a break is received by the serial port. The argument is not used. When the Host Debugger needs to interrupt the application, it sends a break signal to the target system. You can program a universal asynchronous receiver transmitter (UART) to generate an interrupt when it receives a break. The priority of this interrupt must be as high as possible to ensure that the debugger can interrupt the application and regain control even when the processor is running at high priority