NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
MNCLC430A-X CLC430 CLC430A CLC430AE-QML CLC430AJ-QML CLC430AWG-QML LB1426B - Datasheet Archive
Original Creation Date: 07/30/98 Last Update Date: 07/19/99 Last Major Revision Date: 04/09/99 MNCLC430A-X REV 0B0 GENERAL
MICROCIRCUIT DATA SHEET Original Creation Date: 07/30/98 Last Update Date: 07/19/99 Last Major Revision Date: 04/09/99 MNCLC430A-X MNCLC430A-X REV 0B0 GENERAL PURPOSE 100MHz OP AMP WITH DISABLE General Description The Comlinear CLC430 CLC430 is a low-cost, wideband monolithic amplifier for general purpose applications. The CLC430 CLC430 utilizes Comlinear's patented current feedback circuit topology to provide an op amp with a slew rate of 2000V/uS, 100MHz unity-gain bandwidth and fast output disable function. Like all current feedback op amps, the CLC430 CLC430 allows the frequency response to be optimized (or adjusted) by the selection of the feedback resistor. For demanding video applications, the 0.1dB bandwidth to 20MHz and differential gain/phase of 0.03%/0.05deg makes the CLC430 CLC430 the preferred component for broadcast quality NTSC and PAL video systems. The large voltage swing (28Vpp), continuous output current (85mA) and slew rate (2000V/uS) provide high-fidelity signal conditioning for applications such as CCDs, transmission lines and low impedance circuits. Even driving loads of 100 Ohms, the CLC430 CLC430 provides very low 2nd and 3rd harmonic distortion at 1MHz (-76/-82dBc). Video distortion, multimedia and general purpose applications will benefit from the CLC430 CLC430's wide bandwidth and disable feature. Power is reduced and the output becomes a high impedance when disabled. The wide gain range of the CLC430 CLC430 makes this general purpose op amp an improved solution for circuits such as active filters, differential-to-single-ended drivers, DAC transimpedance amplifiers and MOSFET drivers. Industry Part Number NS Part Numbers CLC430A CLC430A CLC430AE-QML CLC430AE-QML CLC430AJ-QML CLC430AJ-QML CLC430AWG-QML CLC430AWG-QML Prime Die LB1426B LB1426B Controlling Document SEE FEATURES SECTION Processing Subgrp Description 1 2 3 4 5 6 7 8A 8B 9 10 11 MIL-STD-883 MIL-STD-883, Method 5004 Quality Conformance Inspection MIL-STD-883 MIL-STD-883, Method 5005 1 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Features - 0.1dB gain flatness to 20MHz (Av = +2) 100MHz bandwidth (Av = +1) 2000V/uS slew rate 0.03%/0.05deg differential gain/phase +5V, +15V or single supplies 100ns disable to high-impedance output Wide gain range Low cost Controlling Document CLC430AJ-QML CLC430AJ-QML 5962-9203001MPA 5962-9203001MPA CLC430AE-QML CLC430AE-QML 5962-9203001M2A 5962-9203001M2A CLC430AWG-QML CLC430AWG-QML 5962-9203001MXA 5962-9203001MXA Applications - Video distribution CCD clock driver Multimedia systems DAC output buffers Imaging systems 2 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 (Absolute Maximum Ratings) (Note 1) Supply Voltage (Vcc) +18V dc Common Mode Input Voltage (Vcm) +Vcc Differential Input Voltage +15V dc Output Current (Io) +125 mA Power Dissipation (Pd) (Note 2) 1.2W Junction Temperature (Tj) +175 C Storage Temperature Range -65 C to +150 C Lead Temperature (soldering, 10 seconds) +300 C Thermal Resistance ThetaJA (Junction-to-Ambient) Ceramic DIP (Still Air) (500 LFPM) SOIC (Still Air) (500 LFPM) LCC (Still Air) (500 LFPM) ThetaJC (Junction-to-Case) Ceramic DIP SOIC LCC Package Weight (typical) Ceramic DIP SOIC LCC ESD Tolerance (Note 3) ESD Rating Note 1: Note 2: Note 3: TBD TBD 180 C/W 124 C/W TBD TBD TBD 22 C/W TBD TBD TBD TBD 4000V Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Human body model, 100pF discharged through 1.5K Ohms. 3 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Recommended Operating Conditions Supply Voltage (Vcc) +15V dc Gain Range +1 to +10 Ambient Operating Temperature Range (Ta) -55 C to +125 C 4 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Electrical Characteristics DC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rload = 100 Ohms, Vcc = +15V dc, Av = +2, Rf = 750 Ohms, Rg = 750 Ohms. -55 C < Ta < +125 C. SYMBOL Ibn PARAMETER CONDITIONS NOTES MIN MAX UNIT SUBGROUPS +10 uA 2 +22 uA 3 1 -80 +80 nA/C 2 1 -160 +160 nA/C 3 -14 +14 uA 1 -12 +12 uA 2 +18 uA 3 1 -50 +50 nA/C 2 1 -100 +100 nA/C 3 -7.5 +7.5 mV 1 +11 mV 2, 3 -50 +50 uV/C 2, 3 12 mA 1, 2 15 mA 3 1 2.5 mA 1 1 3.0 mA 2, 3 56 dB 1 53 dB 2, 3 1 +60 mA 1, 3 1 Vio 1 -11 DIBI uA -10 Input Bias Current Average Temperature Coefficient Noninverting +14 -18 Ibi -14 -22 DIBN Input Bias Current Noninverting PINNAME (Note 4) +45 mA 2 Input Bias Current, Inverting Input Bias Current Average Temperature Coefficient, Inverting Input Offset Voltage DVIO Input Offset Voltage, Average Temperature Coefficient Icc Supply Current, no load Iccd PSRR +Io -Io 1 Supply Current, disable Power Supply Rejection Ratio -Vcc = -14.5V to -15.0V, +Vcc = +14.5V to +15.0V Output Current Output Current 1 -60 mA 1, 3 1 -45 mA 2 V 1, 2, 3 V 1, 2, 3 +Vo Output Voltage No Load 1 -Vo Output Voltage No Load 1 5 +12 -12 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Electrical Characteristics DC PARAMETERS(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rload = 100 Ohms, Vcc = +15V dc, Av = +2, Rf = 750 Ohms, Rg = 750 Ohms. -55 C < Ta < +125 C. SYMBOL +Vol PARAMETER NOTES MIN MAX UNIT SUBGROUPS 2 Rl = 100 Ohms +6 V 4, 6 +4 V 5 2 Noninverting Input Resistance -6 V 4, 6 2 Rin Output Voltage Range Rl = 100 Ohms PINNAME 2 -Vol Output Voltage Range CONDITIONS (Note 4) -4 V 5 CMRR Common Mode Rejection Ratio KOhms 1 5000 KOhms 2 1 Noninverting input Capacitance 3000 1 Cin 1 1500 KOhms 3 1, 3 pF 4, 5, 6 GFPL 30 MHz 4 25 MHz 5 30 MHz 6 20 MHz 4, 6 16 MHz 5 0.5 dB 6 0.5 dB 4 0.6 dB 5 0.5 dB 6 1.5 dB 4 1.8 dB 5 1.5 dB 6 1 0.1 MHz to 20 MHz 5 2, 3 Linear Phase Deviation dB 2, 3 LPD 0.6 3 0.1 to 20 MHz 4 2, 3 Gain Flatness Rolloff dB 3 0.1 to 100 MHz 0.5 2, 3 GFR 3 2, 3 Gain Flatness Peaking 0.1 to 10 MHz 5, 6 2, 3 GFPH Gain Flatness Peaking dB 1 Vout < 10 Vpp 52 1 Large Signal Bandwidth 4 2, 3 LSBW dB 3 -3 dB bandwidth 54 2, 3 Small Signal Bandwidth 1 1 SSBW Ccm = +2.5V 1.0 1.8 Degre 4, 6 2.3 es Degre 5 1 es 6 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Electrical Characteristics DC PARAMETERS(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rload = 100 Ohms, Vcc = +15V dc, Av = +2, Rf = 750 Ohms, Rg = 750 Ohms. -55 C < Ta < +125 C. SYMBOL DG PARAMETER CONDITIONS NOTES Differential Gain Rl = 150 Ohms, 4.43 MHz positive sync PINNAME MIN MAX (Note 4) UNIT SUBGROUPS SR Overshoot % 5 1 0.20 Deg 4, 6 0.25 Deg 5 1 0.07 Deg 4, 6 0.15 Deg 5 dBc 4 dBc 5, 6 -46 dBc 4 dBc 5 dBc 6 1 14 ns 9 16 ns 10, 11 1 50 ns 9, 11 60 ns 10 1 5 % 9 8 % 10, 11 2 Vpp at 10 MHz 2 Vpp at 10 MHz 10 V step, Cl < 10 pF, measured between 10% and 90% point 2 V step tp 0.05%, Cl < 10 pF 2 V step, 1 ns rise/fall, Cl < 10 pF Vout = +10 V, Cl < 10 pF Turn On Time 1 1500 V/uS 9 1 Ton Slew Rate 0.05 1 OS Setting Time 4, 6 1 Ts Rise and Fall Time % 1 Trl 0.04 -43 3rd Harmonic Distortion 1 -46 HD3 2nd Harmonic Distortion 5 -34 HD2 % -34 Rl = 150 Ohms, 4.43 MHz negative sync 0.10 1 Rl = 150 Ohms, 4.43 MHz positive sync 4, 6 1 Differential Phase % 1 DP1 0.07 1 Rl = 150 Ohms, 4.43 MHz negative sync 1 1400 V/uS 10, 11 1 300 ns 9, 11 1 350 ns 10 1 200 ns 9, 10, 11 dB 9, 10, 11 Toff Turn Off Time ISO Off Isolation 10 MHz 1 VN Equivalent Input Noise, Noninverting Voltage > 1 MHz 1 1 56 3.5 nV/Sq 4, 6 4.0 RtHz nV/Sq 5 RtHz 7 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Electrical Characteristics DC PARAMETERS(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rload = 100 Ohms, Vcc = +15V dc, Av = +2, Rf = 750 Ohms, Rg = 750 Ohms. -55 C < Ta < +125 C. SYMBOL ICI PARAMETER NOTES > 1 MHz 1 PINNAME MIN MAX UNIT SUBGROUPS 18 pA/Sq 4 1 ICN Equivalent Input Noise, Inverting Current CONDITIONS (Note 4) 21 RtHz pA/Sq 5, 6 1 6 RtHz pA/Sq 4 1 7 RtHz pA/Sq 5, 6 Equivalent Input Noise, noninverting Current > 1 MHz SNF Equivalent Input Noise, Total Noise Floor > 1 MHz 1 148 RtHz dBm 4, 5, 6 (1Hz) INV Equivalent Input Noise, Total Integrated Floor 1 MHz to 100 MHz 1 90 uV Note Note Note Note 1: 2: 3: 4: Guaranteed, if not tested. Group A testing only. Parameter is tested with Vout = 0.63 Vpp but is guarnteed for Vout = 4 Vpp. The algebraic convention, whereby the most negative value is a minimum and most positive is a maximum, is used in this table. Negative current shall be defined as convential current flow out of a device terminal. 8 4, 5, 6 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Graphics and Diagrams GRAPHICS# DESCRIPTION 06377HRA2 06377HRA2 (new) 07081HRA4 07081HRA4 CERDIP (J), 8 LEAD (B/I CKT) 07086HRA2 07086HRA2 LCC (E), TYPE C, 20 TERMINAL (B/I CKT) E20ARE E20ARE LCC (E), TYPE C, 20 TERMINAL(P/P DWG) J08ARL J08ARL CERDIP (J), 8 LEAD (P/P DWG) P000401A P000401A CERDIP (J), 8 LEAD (PINOUT) P000454A P000454A (new) P000457A P000457A (new) WG10ARC WG10ARC CERAMIC SOIC (WG), 10 LEAD (P/P DWG) See attached graphics following this page. 9 N/C 1 8 DIS VINV 2 7 +VCC VNON-INV 3 6 VOUT -VCC 4 5 N/C CLC430J CLC430J 8 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000401A P000401A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 Dis 1 10 +VCC INV IN 2 9 N/C Non INV IN 3 8 VOUT N/C 4 7 N/C 5 6 CLC430WG CLC430WG 10 - LEAD CERAMIC SOIC CONNECTION DIAGRAM TOP VIEW P000454A P000454A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N/C -VCC N/C N/C 4 N/C 3 N/C N/C DIS N/C 2 1 20 19 18 N/C 5 17 N/C INV 6 16 +VCC N/C 7 15 N/C NON INV 8 14 OUT 9 10 11 12 13 -VCC N/C N/C N/C N/C CLC430E CLC430E 20 - LEAD LCC CONNECTION DIAGRAM TOP VIEW P000457A P000457A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 MICROCIRCUIT DATA SHEET MNCLC430A-X MNCLC430A-X REV 0B0 Revision History Rev ECN # Originator Changes 0A0 M0002975 M0002975 07/19/99 Rel Date Shaw Mead Initial MDS Release 0B0 M0003454 M0003454 07/19/99 Rose Malone Update MDS: MNCLC430A-X MNCLC430A-X, Rev. 0A0 to MNCLC430A-X MNCLC430A-X, Rev. 0B0. Added Thermal Resistance numbers for SOIC package. 10