500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

Top Results

Part Manufacturer Description Datasheet BUY
HM1-65642B/883 Intersil Corporation 8KX8 STANDARD SRAM, 150ns, CDIP28 visit Intersil
24502BVA Intersil Corporation 1KX4 STANDARD SRAM, 120ns, CDIP18 visit Intersil
HM1-65642/883 Intersil Corporation 8KX8 STANDARD SRAM, 150ns, CDIP28, CERAMIC, DIP-28 visit Intersil
ISL6843IU-T Intersil Corporation Improved Industry-Standard Single-Ended PWM Controller; DFN8, MSOP8, SOIC8; Temp Range: See Datasheet visit Intersil Buy
8403606JA Intersil Corporation 2KX8 STANDARD SRAM, 70ns, CDIP24, CERAMIC, DIP-24 visit Intersil
HM1-6551/883 Intersil Corporation 256X4 STANDARD SRAM, 300ns, CDIP22, CERAMIC, DIP-22 visit Intersil

Search Stock

Shift+Click on the column header for multi-column sorting 
Part
Manufacturer
Supplier
Stock
Best Price
Price Each
Ordering
Part : MT5600SMI-LS Supplier : Multi-Tech Systems Manufacturer : Avnet Stock : - Best Price : $0.3012 Price Each : $0.3290
Part : MT5634SMI-LS Supplier : Multi-Tech Systems Manufacturer : Avnet Stock : - Best Price : $0.3012 Price Each : $0.3290
Part : MT5692SMI-LS Supplier : Multi-Tech Systems Manufacturer : Avnet Stock : - Best Price : $0.3012 Price Each : $0.3290
Part : MT9234SMI-LS Supplier : Multi-Tech Systems Manufacturer : Avnet Stock : - Best Price : $0.3012 Price Each : $0.3290
Part : DIL16W/SOIC16 ZIF 300MIL SFLAS Supplier : Dataman Programmers Manufacturer : Newark element14 Stock : - Best Price : $115.00 Price Each : $115.00
Part : DIL8W/SOIC8 ZIF 150MIL SFLASH- Supplier : Dataman Programmers Manufacturer : Newark element14 Stock : - Best Price : $110.00 Price Each : $110.00
Part : DIL8W/SOIC8 ZIF 200MIL SFLASH- Supplier : Dataman Programmers Manufacturer : Newark element14 Stock : - Best Price : $130.00 Price Each : $130.00
Part : DIL8W/SOIC8-2 ZIF 200MIL SFLAS Supplier : Dataman Programmers Manufacturer : Newark element14 Stock : - Best Price : $130.00 Price Each : $130.00
Part : DIL8W/TSSOP8 ZIF 170MIL SFLASH Supplier : Dataman Programmers Manufacturer : Newark element14 Stock : - Best Price : $130.00 Price Each : $130.00
Part : M23053/5-116-0 MIL SPEC Supplier : TE Connectivity Manufacturer : Newark element14 Stock : - Best Price : $17.28 Price Each : $21.72
Part : MIL-SPEC WIRE Supplier : Carlisle Interconnect Components Manufacturer : Newark element14 Stock : - Best Price : - Price Each : -
Part : MT5600SMI-LS Supplier : Multi-Tech Systems Manufacturer : Future Electronics Stock : - Best Price : $0.3050 Price Each : $0.3050
Part : MT5634SMI-LS Supplier : Multi-Tech Systems Manufacturer : Future Electronics Stock : - Best Price : $0.34 Price Each : $0.34
Part : MT5692SMI-LS Supplier : Multi-Tech Systems Manufacturer : Future Electronics Stock : 500 Best Price : $0.3150 Price Each : $0.3150
Part : MT5692SMI-LS Supplier : Multi-Tech Systems Manufacturer : Future Electronics Stock : 500 Best Price : $0.3150 Price Each : $0.3150
Part : LM7709H-MIL-SPECIAL Supplier : National Semiconductor Manufacturer : Rochester Electronics Stock : 738 Best Price : - Price Each : -
Part : MIL-S-19500/435 Supplier : - Manufacturer : Chip One Exchange Stock : 3 Best Price : - Price Each : -
Part : MT9234SMI-LS Supplier : Multi-Tech Systems Manufacturer : Chip1Stop Stock : 467 Best Price : $0.45 Price Each : $0.45
Shipping cost not included. Currency conversions are estimated. 

MIL-STD-750

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: '¢ 1 Visual Inspection MIL-STD-750 â'" Method 2073 2 Pre-Cap Inspection MIL-STD-750 â'" Method 2070 â'¢ â'¢ 3 High-Temperature Bake MIL-STD-750 â'" Method 1032 t = 340 Hrs. â'¢ â'¢ â'¢ 4 Temperature Cycling MIL-STD-750 â'" Method 1051 20 Cycles. Condition C â'¢ â'¢ â'¢ 5 Thermal Impedance MIL-STD-750 â'" Method 3101 â'¢ â'¢ â'¢ 6 Constant Acceleration MIL-STD-750 â'" Method 2006 20,000Gs Min., Y1 Axis Only â'¢ â Skyworks Solutions
Original
BRO383-11B
Abstract: o f MIL-STD-750 DIE ELEMENT EVALUATION a. b. Wafer Lot Evaluation Testing (WLAT) i.a.w. method 5001 of MIL-STD-750, including SEM Unclamped Inductive Switching (IA i.a.w. method 3470 o f MIL-STD-750 at VGSpeak= 15 V, L= 100|xH, IA 132 A S) S= C. Gate Stress Test for 250 |^s at VGS= 30 Vdc. d. Safe Operating Area i.a.w. method 3474 o f MIL-STD-750 at VDS= 160 V, ID= 2.8 A for 10 ms e. High Temperature Gate Bias i.a.w. method 1042 cond.B o f MIL-STD-750: 48 hrs at T am bient= 150Â -
OCR Scan
MX043J MX043G FSC260R 1042D 1042B

MIL-STD-750

Abstract: MIL-STD-750 2072 = 25°C for BVDSS, VGSlh, IDSS, IGSS, VSD, RDSon 100% Visual Inspection i.a.w. method 2072 of MIL-STD-750 , ) i.a.w. method 5001 of MIL-STD-750, including SEM Unclamped Inductive Switching (IAS) i.a.w. method 3470 of MIL-STD-750 at VGSpcak= 15 V, L= 100|xH, IAS= 132 A Gate Stress Test for 250 |is at VGS= 30 Vdc. Safe Operating Area i.a.w. m ethod 3474 of MIL-STD-750 at VDS= 160 V, ID= 2.8 A for 10 ms High Temperature Gate Bias i.a.w. method 1042 cond.B of MIL-STD-750: 48 hrs at T ambicnt= 150°C, Drain shorted to
-
OCR Scan
MIL-STD-750 2072 1012RAD

MIL-STD-750 2072

Abstract: MIL-STD-750 Inspection i.a.w. method 2072 of MIL-STD-750 a. b. c. d. e. Wafer Lot Evaluation Testing (WLAT) i.a.w. method 5001 of MIL-STD-750, including SEM Unclamped Inductive Switching (IAS) i.a.w. method 3470 of MIL-STD-750 at VGS peak= 15 V, L= 100µH, I AS= 132 A Gate Stress Test for 250 µs at VGS= 30 Vdc. Safe Operating Area i.a.w. method 3474 of MIL-STD-750 at VDS= 160 V, ID= 2.8 A for 10 ms High Temperature Gate Bias i.a.w. method 1042 cond.B of MIL-STD-750: 48 hrs at T ambient= 150° Drain shorted to
Microsemi
Original
ID100 MIL-STD-750 3470

MIL-STD-750

Abstract: MIL-STD-750C WITH COOL 168/1000HRS MIL-STD-750C METHOD 1027.1 MIL-STD-750 METHOD 1038. A I MIL-STD-750 METHOD , -202 METHOD 208 MIL-STD-750 METHOD 2036.3 MIL-STD-750 METHOD 2036.3 1 SOLDERABILITY 230 ± 5 D C 5 , 125 °C FOR BRIDGE -55 °C 1 PULSE MIL-STD-750 METHOD 4066.2 8 HIGH TEMPERATURE STORAGE LIFE LOW TEMPERATURE STORAGE LIFE 168/1000HRS MIL-STD-750 METHOD 1031.4 I EC-68-2-1 TEST A: COLD 9 , /IOOOHRS MIL-STD-750 METHOD 1021.1 M IL- S- 19500 APPENDIX C MIL-STD-750 METHOD 1056.1 MIL-STD-750
-
OCR Scan
MIL-STD-202 90-DEGREE 168/IOOOHRS 16/168HRS

Reliability

Abstract: inspection MIL-STD-750 - Method 2073 X 2 High temperature bake MIL-STD-750 - Method 1032 X 3 Temperature cycling MIL-STD-750 - Method 1051 Condition C X 4 Constant acceleration MIL-STD-750 - Method 2006 20,000G's min., Y1 axis only X 5 Initial electrical test , Interim electricals Read and record X 8 Burn-in Condition B, t = 96 hrs X MIL-STD-750 - Method 1038 MIL-STD-750 - Method 1038 9 Final electrical test Read and record X 10
Skyworks Solutions
Original
Reliability

MIL-STD-750

Abstract: 4011 (non-operating life/ stabilization bake MIL-STD-750) Method 1032 48 hrs @ +175°C 2) Temperature Cycling MIL-STD-750 Method 1051 Condition C 20 Cycles -65°C to +175°C 15 min. extremes No dwell , Leakage Current Method 1038 Condition A MIL-STD-750 5) Final Electrical MIL-STD-750 96 , . 1) High Temperature Life (non-operating life/ stabilization bake MIL-STD-750) Method 1032 , VRWM MIL-STD-750 5) Final Electrical MIL-STD-750 Method 4011 Method 4016 Method 4021
Voltage Multipliers
Original
4011 high temperature reverse bias MIL-PRF-19500

ingot

Abstract: MIL-STD-750 MIL-STD-750) Method 1032 48 hrs @ +175°C 2) Temperature Cycling MIL-STD-750 Method 1051 , Condition A MIL-STD-750 5) Final Electrical MIL-STD-750 96 hrs min. @ TA=150°C and min , Temperature Life (non-operating life/ stabilization bake MIL-STD-750) Method 1032 24 hrs @ 125°C 2 , Leakage Current Method 1038 Condition A 24 hrs @ +125°C at 80% of VRWM MIL-STD-750 5) Final Electrical MIL-STD-750 Method 4011 Method 4016 Method 4021 Forward Voltage Drop Leakage Current
Voltage Multipliers
Original
ingot

MIL-STD-750

Abstract: CK6001 HTRB (Life Test) MIL-STD-750, Method 1038A Ta = 125 deg C VR = 32 Vdc Duration = 1000 Hours , hours 77 Units 0 0% Completed Temperature Cycling MIL-STD-750, Method 1051 Temp , MIL-STD-750, Method 2006 Y1 Direction 15,000 G's Minimum 77 Units 0 0% Completed Variable Frequency Vibration MIL-STD-750, Method 2056 50 G's Minimum 100Hz to 2kHz 77 Units 0 0% Completed Mechanical Shock MIL-STD-750, Method 2016 Non-Operating , 1500 G
Microsemi
Original
CK6001 JESD22-A102-C UPGA301A UPS835LE3 plaskon 1038A UPS1040E3 MSC/PCN-0002 UPS340 UPS835L UPS360
Abstract: . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 * - Test Methods for Semiconductor Devices. (Copies of , with MIL-STD-750, MIL-PRF-19500 and herein. Where a choice of finish is desired, it shall be specified , MIL-STD-750 that were used to qualify the device for inclusion into section 6 of the slash sheet , ) Gate stress test (see 4.3.1) (3) Method 3470 of MIL-STD-750, EAS (see 4.3.2) Method 3470 of MIL-STD-750, EAS (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, thermal impedance, (see 4.3.3 International Rectifier
Original
MIL-PRF-19500/663F MIL-PRF-19500/663E 2N7431 2N7432 2N7433 MIL-STD-750E

2N7464T2

Abstract: Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test , ) herein. 3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750 , test conditions from section 5 of method 1080 of MIL-STD-750 that were used to qualify the device for , level (1) (2) (3) Method 3470 of MIL-STD-750, EAS (see 4.3.1) (3) Gate stress test (see 4.3.3) Gate stress test (see 4.3.3) (3) 3c Method 3161 of MIL-STD-750, thermal impedance (see
International Rectifier
Original
2N7464T2 MIL-PRF-19500/675E MIL-PRF-19500/675D 2N7463T2 2N7463U5 2N7464U5

2N7470

Abstract: JANS 2N7470T1 , General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for , 3.4.1 Lead formation and finish. Lead finish shall be solderable in accordance with MIL-STD-750, MIL-PRF , ) (3) Method 3470 of MIL-STD-750, EAS (see 4.3.2) Method 3470 of MIL-STD-750, EAS (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, thermal impedance, (see 4.3.3) Method 3161 of MIL-STD-750 , applicable 10 Method 1042 of MIL-STD-750, test condition B Method 1042 of MIL-STD-750, test
International Rectifier
Original
2N7470 JANS 2N7470T1 MIL-PRF-19500/698E MIL-PRF-19500/698D 2N7470T1 2N7471T1

2N7509

Abstract: transistor 1020 -19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 , -19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the , ) (3) Method 3470 of MIL-STD-750, (see 4.3.2) Method 3470 of MIL-STD-750, (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, (see 4.3.3) Method 3161 of MIL-STD-750, (see 4.3.3) 7 Optional , of table I herein 10 Method 1042 of MIL-STD-750, test condition B Method 1042 of MIL-STD-750
-
Original
2N7509 2N7510 FSGJ160 FSGJ264 transistor 1020 MIL-PRF-19500/687B MIL-PRF-19500/687A 2N7511

MIL-STD-750

Abstract: 100C 7.2.2 12 METHODS PER MIL-STD-750 UNLESS OTHERWISE SPECIFIED SUMMARY OF TEST RESULTS GROUP B , 12 0 0 12 0 0 METHODS PER MIL-STD-750 UNLESS OTHERWISE SPECIFIED SUMMARY OF , Ton = Toff IF/Io = 2.0 Amps COMMENTS: Upr5ge~2 METHODS PER MIL-STD-750 UNLESS OTHERWISE , COMMENTS: Upr5ge~2 0 METHODS PER MIL-STD-750 UNLESS OTHERWISE SPECIFIED SUMMARY OF TEST RESULTS , Autoclave TA = 121C/15psi t=96 hrs COMMENTS: Upr5ge~2 7.2.8 METHODS PER MIL-STD-750 UNLESS
Microsemi
Original
100C 85C/85 1000G

2N7423

Abstract: 2N7422 . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of , copper tungsten. Lead finish shall be solderable as defined in MIL-PRF-19500, MIL-STD-750, and herein , MIL-STD-750 that were used to qualify the device for inclusion into section 6 of the slash sheet , stress test (see 4.3.1) (3) Method 3470 of MIL-STD-750, EAS test (see 4.3.2) Method 3470 of MIL-STD-750, EAS test (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, thermal impedance (see 4.3.3
International Rectifier
Original
2N7422 2N7423 662F MIL-PRF-19500/662F MIL-PRF-19500/662E 2N7422U 2N7423U
Abstract: . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of , 3.4.1 Lead formation and finish. Lead finish shall be solderable in accordance with MIL-STD-750, MIL-PRF , MIL-STD-750, single pulse avalanche energy test (see 4.3.2) Method 3470 of MIL-STD-750, single pulse avalanche energy test (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, thermal impedance (see 4.3.3) Method 3161 of MIL-STD-750, thermal impedance (see 4.3.3) 9 Subgroup 2 of table I herein IDSS1 International Rectifier
Original
MIL-PRF-19500/697E MIL-PRF-19500/697D 2N7478T1
Abstract: . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of , solderable as defined in MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of terminal finish is , MIL-STD-750 that were used to qualify the device for inclusion into section 6 of the slash sheet , (see 4.3.1) (3) Method 3470 of MIL-STD-750, EAS test (see 4.3.2) Method 3470 of MIL-STD-750, EAS test (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, thermal impedance (see 4.3.3 International Rectifier
Original
MIL-PRF-19500/660D MIL-PRF-19500/660C 2N7424 2N7425 2N7426
Abstract: . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of , . Terminal finish shall be solderable as defined in MIL-PRF-19500, MIL-STD-750, and herein. Where a choice , conditions from section 5 of method 1080 of MIL-STD-750 that were used to qualify the device for inclusion , ) Gate stress test (see 4.3.1) Gate stress test (see 4.3.1) (3) Method 3470 of MIL-STD-750, EAS test (see 4.3.2) Method 3470 of MIL-STD-750, EAS test (see 4.3.2) (3) 3c Method 3161 of International Rectifier
Original
MIL-PRF-19500/664D MIL-PRF-19500/664C 2N7431U 2N7432U 2N7433U

2n7505

Abstract: IRF5Y9540CM Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test , finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of , MIL-STD-750 (see 4.3.2) optional Method 3470 of MIL-STD-750 (see 4.3.2) optional (3) 3c Method 3161 of MIL-STD-750 (see 4.3.3) Method 3161 of MIL-STD-750 (see 4.3.3) 9 IGSSF1, IGSSR1, IDSS1, subgroup 2 of table I herein Not applicable 10 Method 1042 of MIL-STD-750, test condition B
-
Original
IRF5Y9540CM 2n7505 MIL-PRF-19500/748 2N7505T3
Abstract: CECC50000 test flows. Test methods are in accordance with MIL-STD-750, MIL-STD-883, MIL-STD-202, JEDECSTD , Group B : Solderability (MIL-STD-750 Method 2026); Small Lot Sample P lan: 4/0 Resistance to Solvents (MIL-STD-750 Method 1022) Small Lot Sample Plan : 4/0 Temperature Cycle (-65°C to +150°C 10 cycles, 30 , ., 10 s e c ); Small Lot Sample P lan: 6/0 Moisture (MIL-STD-750 Method 1021) + end points ; Small , (MIL-STD-750 Method 2056) + end points ; Small Lot Sample Plan : 6/0 Salt Atmosphere (MIL-STD-750 Method -
OCR Scan
MIL-S-19500 JEDECSTD-22 MIL-STD-705 1500G

MIL-STD-750 METHOD 2026

Abstract: high temperature reverse bias -202 METHOD 208 MIL-STD-750 METHOD 2036.3 MIL-STD-750 METHOD 2036.3 1 SOLDERABILITY 230 ± 5 D C 5 , WITH COOL 168/1000HRS MIL-STD-750C METHOD 1027.1 MIL-STD-750 METHOD 1038. A I MIL-STD-750 METHOD , 125 °C FOR BRIDGE -55 °C 1 PULSE MIL-STD-750 METHOD 4066.2 8 HIGH TEMPERATURE STORAGE LIFE LOW TEMPERATURE STORAGE LIFE 168/1000HRS MIL-STD-750 METHOD 1031.4 I EC-68-2-1 TEST A: COLD 9 , /IOOOHRS MIL-STD-750 METHOD 1021.1 M IL- S- 19500 APPENDIX C MIL-STD-750 METHOD 1056.1 MIL-STD-750
Continental Device India
Original
MIL-STD-750 METHOD 2026 MIL STD 750 15PSIG MIL-800-883 MIL-800-750

2N7292

Abstract: 2N7294 (non-operating life/ stabilization bake MIL-STD-750) Method 1032 48 hrs @ +175°C 2) Temperature Cycling MIL-STD-750 Method 1051 Condition C 20 Cycles -65°C to +175°C 15 min. extremes No dwell , Leakage Current Method 1038 Condition A MIL-STD-750 5) Final Electrical MIL-STD-750 96 , . 1) High Temperature Life (non-operating life/ stabilization bake MIL-STD-750) Method 1032 , VRWM MIL-STD-750 5) Final Electrical MIL-STD-750 Method 4011 Method 4016 Method 4021
-
Original
2N7292 2N7294 2N7298 MIL-PRF-19500/605C MIL-PRF-19500/605B 2N7296
Abstract: , General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for , 3.4.1 Lead formation and finish. Lead finish shall be solderable in accordance with MIL-STD-750, MIL-PRF , ) (3) Method 3470 of MIL-STD-750, EAS (see 4.3.2) Method 3470 of MIL-STD-750, EAS (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, thermal impedance, (see 4.3.3) Method 3161 of MIL-STD-750 , applicable 10 Method 1042 of MIL-STD-750, test condition B Method 1042 of MIL-STD-750, test Skyworks Solutions
Original
BRO400-13B

2N7475

Abstract: -19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 , MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish or formation is desired, it shall , Method 1038 of MIL-STD-750, test condition A; t = 48 hrs: VR = 80 percent of rated VR. Not , , whichever is greater. VF1 and IR1 12 Method 1038 of MIL-STD-750, test condition B; t = 240 hours (see 4.3.3) Method 1038 of MIL-STD-750, test condition A; t = 48 hours, VR = 80 percent of rated VR
International Rectifier
Original
2N7475 MIL-PRF-19500/685F MIL-PRF-19500/685E 2N7475T1 2N7476T1 2N7477T1

MIL-STD-750 METHOD 2036 conditions E

Abstract: 1N6672 . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of , MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead material or finish is desired, it shall be , test conditions from section 5 of method 1080 of MIL-STD-750 that were used to qualify the device for , (3) Gate stress test (see 4.3.1) Gate stress test (see 4.3.1) (3) Method 3470 of MIL-STD-750, (see 4.3.2) Method 3470 of MIL-STD-750, (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, (see
DEPARTMENT OF DEFENSE
Original
1N6672 1N6674 1N6672R 1N6674R 1N6673 1N6673R MIL-STD-750 METHOD 2036 conditions E MIL-PRF-19500/617D MIL-PRF-19500/617C
Abstract: -19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 , -19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the , ) (3) Method 3470 of MIL-STD-750, (see 4.3.2) Method 3470 of MIL-STD-750, (see 4.3.2) (3) 3c Method 3161 of MIL-STD-750, (see 4.3.3) Method 3161 of MIL-STD-750, (see 4.3.3) 7 Optional , of table I herein 10 Method 1042 of MIL-STD-750, test condition B Method 1042 of MIL-STD-750 International Rectifier
Original
MIL-PRF-19500/601K MIL-PRF-19500/601J 2N7261 2N7262 2N7261U 2N7261U5

Q1/HCPL3000/3100/3101

Abstract: . DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. (Copies of , accordance with MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall , ) Gate stress test (see 4.3.1) Gate stress test (see 4.3.1) (3) Method 3470 of MIL-STD-750 (see 4.3.2), optional Method 3470 of MIL-STD-750 (see 4.3.2), optional (3) 3c Method 3161 of MIL-STD-750 (see 4.3.3) Method 3161 of MIL-STD-750 (see 4.3.3) 9 IGSSF1, IGSSR1, IDSS1 Not
International Rectifier
Original
Q1/HCPL3000/3100/3101 MIL-PRF-19500/681C MIL-PRF-19500/681B 1N6843CCU3 1N6843 30CLJQ100 1N6843U3
Showing first 20 results.