NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
MGA-87563 MGA87563 SC-70 1008CS-180 5965-8671E FR-4/G10 - Datasheet Archive
MMIC in Low Noise Amplifier Applications in the 800 Through 2500 MHz Frequency Range Application Note 1116 Introduction This
Using the MGA-87563 MGA-87563 GaAs MMIC in Low Noise Amplifier Applications in the 800 Through 2500 MHz Frequency Range Application Note 1116 Introduction This application note describes the use of the Hewlett-Packard MGA87563 MGA87563 in low noise amplifier (LNA) applications in the 800 through 2500 MHz frequency range. The MGA-87563 MGA-87563 is capable of producing an LNA with a 1.6 dB noise figure and 12 dB of associated gain when biased at 4.5 mA from a 3 volt power supply. This IC is housed in a miniature inexpensive plastic surface mount SOT-363 (SC-70 SC-70) package. sheet. The reference plane for both the S and Noise parameters is shown in Figure 1. The layout for the amplifiers is shown in Figure 2. The layout is intended to be a general prototype board that can be adapted for various frequencies. REFERENCE PLANES LNA Designs Three LNA designs will be presented in this application note. The first design covers the 800 to 950 MHz frequency range, and can be used for cellular, paging, or 902928 MHz ISM applications. The second design covers the commercial GPS frequency at 1575 MHz. The third design covers the 2400 to 2500 MHz frequency range for ISM applications. These designs can easily be scaled to other frequencies using the basic design information presented here. All LNAs described here were designed using HP-EESOF's TouchstoneTM for Windows and the S and Noise parameter data published in the MGA-87563 MGA-87563 data TEST CIRCUIT Figure 1. Reference plane for MGA87563 MGA87563 S and Noise Parameter data. 1.2" 1.3" MGA-87563 MGA-87563 DEMO BOARD Figure 2. MGA-87563 MGA-87563 Demonstration Board. 6-5 900 MHz LNA Design The 900 MHz circuit was designed to achieve optimal noise performance in the 900 to 950 MHz frequency range. The component labels appearing in the following paragraphs refer to the positions indicated in Figure 2. The input match was designed to present opt, as defined by the device noise parameters, to the input of the MGA-87563 MGA-87563. This match consists of a 100 pF blocking capacitor at C1 followed by an 18 nH series lumped inductor (Coilcraft, Cary, Ill. part number 1008CS-180 1008CS-180). Both of the etched inductors L1 and L2 are removed from the board by carefully using a sharp knife to sever the traces from the through transmission lines. The 18 nH inductor bridges the same transmission line segments as did the now removed L2. The output match consists of a series 10 pF capacitor at C2 and a shunt RL network. The inductor of the RL is board etch; the resistor is 10 at R2. A 16 resistor at R1 provides bias decoupling and port termination. The bypass capacitor at C3 should be 100 pF. The bypass capacitor at C4 provides additional decoupling that may be 5965-8671E 5965-8671E Freq. (MHz) Gain (dB) Noise Figure (dB) 400 0.66 6.50 500 4.66 4.62 600 9.56 3.45 700 12.47 2.77 800 14.78 2.35 850 15.20 2.22 900 15.37 950 15.22 2.08 1000 14.87 2.09 1050 14.41 2.13 1100 13.76 2.18 1150 12.90 2.32 1200 12.34 2.50 1300 11.29 2.97 1400 10.98 3.70 Gain and return loss information was also measured using a scalar analyzer. Figure 3 shows the LNA has a nominal 15 dB of gain from 800 to 1000 MHz. Figure 4 shows the output return loss to be 26 dB at 850 MHz and greater than 20 dB from 750 to 900 MHz. Figure 5 shows the input return loss to be 8.5 dB at 850 MHz. Device Output Voltage IP3 GAIN (dB) Figure 3. 900 MHz LNA, associated gain at minimum noise figure with Vd = 3 V 300 500 700 FREQUENCY (MHz) Figure 4. 900 MHz LNA, output return loss with Vd = 3 V 6-6 S22 conjugate match +7 dBm S22 conjugate match 5V 900 +6 dBm 5V -10 -30 100 Conditions 3V mize third order distortion. These measurements indicate that improving the output loadline will add several dB to the linear output power. They also indicate that the resistive output loading at R2 lowers the linear output power significantly. RETURN LOSS (dB) 900 900 Table II . 900 MHz LNA IP3 performance under varying conditions. -20 300 500 700 FREQUENCY (MHz) 300 500 700 FREQUENCY (MHz) Figure 5. 900 MHz LNA, input return loss with Vd = 3 V 10 -20 100 -6 -10 100 0 -10 -4 -8 20 0 -2 2.14 The noise and gain performance of this 900 MHz LNA was measured using a Hewlett-Packard 8970A noise figure meter. The MGA-87563 MGA-87563 was biased at a device voltage of 3 volts, resulting in a device current of 4.5 mA. The resulting performance is shown in Table I. The amplifier output third order intercept point (IP3) was then measured. The results are summarized in Table II. The first two measurements were taken by varying the supply voltage to the circuit just described. Raising the supply voltage has only a minor effect on IP3. For the last two measurements, a double-stub tuner was attached to the output port of the circuit and adjusted to mini- 0 Table I - 900 MHz LNA, Gain and Noise Figure performance with Vd = 3 V RETURN LOSS (dB) required when cascading several active gain stages; a high value (1000 pF or greater) should be used. +9 dBm W/ output double stub tuner and R2 = 10 5V +12 dBm W/ output tuner and R2 = 0 GPS LNA Design The GPS LNA circuit was designed to achieve optimal noise performance at 1575 MHz. The component labels appearing in the following paragraphs refer to the positions indicated in Figure 2. The input match was designed to present opt at 1575 MHz, as defined by the device noise parameters, to the input of the MGA87563 MGA87563. The match consists of a series inductor, implemented using the entire etched trace on the circuit board at L2. This is accomplished by cutting out the small horizontal piece of transmission line at L2 and then jumpering in the longer "trombone section". The combined total length of the "trombone section" at L2 will be approximately 0.8". The shunt inductor at L1 is removed for operation at frequencies below 2 GHz. The output match of the MGA87563 MGA87563 is sufficiently good at 1575 MHz that no additional output matching was needed. A value of 100 pF was used for both the input (C1) and output (C2) blocking capacitors. A 25 resistor at R1 provides bias decoupling and port termination. The bypass capacitor at C3 should be 100 pF. The bypass capacitor at C4 provides additional decoupling that may be required when cascading several active gain stages; a high value (1000 pF or greater) should be used. If desired, a 50 resistor placed at R2 will provide low frequency loading of the device. This termination reduces low frequency gain and enhances low frequency stability. The performance of the LNA at a device voltage of 5 volts is shown in Table III. 2400 MHz LNA Design The 2400 MHz LNA was designed to provide an optimum noise match from 2400 through 2500 MHz, making it useful for applications that operate in the 2400 to 2483 MHz ISM band. The component labels appearing in the following paragraphs refer to positions shown in Figure 6. The input match consists of a shunt inductor at L1 and a series inductor at L2. Both of these inductors use the traces as originally etched on the circuit board shown in Figure 2 without modification. The output is conjugately matched with a simple shunt open circuited stub (S1) on the output 50 microstripline. The open circuited stub (S1) will have to be jumpered into the circuit with a piece of foil. 22 pF capacitors were used for both the input (C1) and output (C2) blocking capacitors. A 16 chip resistor placed at R1 and decoupled by a 100 pF capacitor at C3 provides a proper termination for the device power terminal. An additional bypass capacitor (100 to 1000 pF) placed further down the power supply line at location C4 may be required to further decouple the supply terminal especially if this stage is to be cascaded with an additional stage. Proper decoupling of device VCC terminals of cascaded amplifier stages is required if stable operation is to be obtained. If desired, a 50 resistor placed at R2 will provide low frequency loading of the device. This termination reduces low frequency gain and enhances low frequency stability. The MGA-87563 MGA-87563 has 3 ground leads, all of which need to be well grounded for proper RF performance. This can be especially critical at 2.4 GHz where common lead inductance can significantly decrease gain. The performance of the GPS LNA as measured on the HP 8970 Noise Figure Meter is shown in Table IV. At 2.4 GHz, the loss of the FR-4/G10 FR-4/G10 epoxy glass material can add several tenths of a dB to noise figure and lower gain by double the amount. Taking this into account, Table III - GPS LNA, Gain and Noise Figure performance with Vd = 5 V. Freq. (MHz) Gain (dB) Noise Figure (dB) 1000 11.88 2.97 1100 12.16 2.60 1200 11.80 2.45 1300 12.59 2.20 1400 14.16 2.18 1500 14.38 2.02 1600 14.97 2.02 MGA-87563 MGA-87563 DEMO BOARD Figure 6. LNA showing component placement for 2.4 GHz. 6-7 20.0 Table IV . 2400 MHz LNA NF and Ga with Vd = 3. Gain (dB) Noise Figure (dB) 1700 10.4 2.60 1800 13.8 2.57 1900 11.3 2.45 2000 11.9 2.38 2100 13.3 2.06 2200 12.8 2.02 2300 12.9 2.12 2400 11.5 2.05 2500 11.5 2.14 15.0 GAIN (dB) Freq. (MHz) 0.026 17.5 12.5 10.0 0.075 7.5 5.0 0.035 2.5 0 1000 1500 2000 2500 FREQUENCY (MHz) 3000 0.016 Figure 7. 2400 MHz LNA associated gain at minimum noise figure with Vd = 5 V (DIMENSIONS IN INCHES) Figure 10. PCB Pad Layout. 0 2.25 2700 10.9 2.29 2800 10.3 2.33 2900 9.8 2.35 3000 9.6 3.42 the performance of the LNA shown in Table IV, which includes board losses, agrees very well with data sheet performance. The following swept plots were taken on a scalar analyzer. Figure 7 shows 12 dB gain from 2400 to 2500 MHz. Figure 8 shows the output return loss to be between 20 and 21 dB from 2400 to 2500 MHz. Figure 9 shows the input return loss to be 8 dB from 2400 to 2500 MHz. RETURN LOSS (dB) 10.5 PCB pad layout for the miniature SOT-363 (SC-70 SC-70) package is shown in Figure 10. Dimensions are in inches. The layout is shown with a nominal SOT-363 package footprint superimposed on the PCB pads. -10 -15 -20 Conclusion -25 1000 1500 2000 2500 FREQUENCY (MHz) 3000 Figure 8. 2400 MHz LNA output return loss with Vd = 5 V 0 -4 RETURN LOSS (dB) 2600 SOT-363 PCB Layout -5 -8 -12 -16 The 2.4 GHz amplifier was tested for third order intermodulation distortion (IP3) performance. Two signals were injected into the amplifier at an individual power level of approximately -26.3 dBm. At the output of the amplifier, the desired signals were at a power level of -14.8 dBm and the undesired third order signals were averaged at -53.5 dBc. This results in a IP3 of +12 dBm referenced to -20 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 Figure 9. 2400 MHz LNA input return loss with Vd = 5 V the output port. The bias point for these measurements was 5.6 mA at a device voltage of 3 volts. The P1dB was also measured and found to be at -2 dBm referenced to the output. 6-8 The MGA-87563 MGA-87563 can provide low noise amplification with minimal current draw for a wide variety of battery-powered applications. Circuits for 900 MHz, 1575 MHz, and 2400 MHz have been demonstrated.