MCR12DSM MCR12DSN MCR12DSM/D MCR12DSMT4G MCR12DSN-001 MCR12DSMT4 MCR12DSNT4

Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost,

MCR12DSM MCR12DSM, MCR12DSN MCR12DSN Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control. http://onsemi.com SCRs 12 AMPERES RMS 600 - 800 VOLTS Features · · · · · · Pb-Free Package is Available Small Size Passivated Die for Reliability and Uniformity Low Level Triggering and Holding Characteristics Epoxy Meets UL 94, V-0 @ 0.125 in ESD Ratings: Human Body Model, 3B u 8000 V Machine Model, C u 400 V G A K MARKING DIAGRAMS MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off-State Voltage (Note 1) (TJ = -40 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open) MCR12DSM MCR12DSM MCR12DSN MCR12DSN VDRM, VRRM On-State RMS Current (180° Conduction Angles; TC = 75°C) IT(RMS) 12 A Average On-State Current (180° Conduction Angles; TC = 75°C) IT(AV) 7.6 A Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave 60 Hz, TJ = 110°C) ITSM 100 A I2t 41 A2sec PGM 5.0 W PG(AV) 0.5 W Forward Peak Gate Current (Pulse Width 1.0 msec, TC = 75°C) IGM 2.0 A Operating Junction Temperature Range TJ -40 to 110 °C Storage Temperature Range Tstg -40 to 150 °C 4 Circuit Fusing Consideration (t = 8.3 msec) Forward Peak Gate Power (Pulse Width 1.0 msec, TC = 75°C) Forward Average Gate Power (t = 8.3 msec, TC = 75°C) 3 August, 2004 - Rev. 3 YWW R1 2DSx DPAK-3 CASE 369D STYLE 4 1 2 600 800 YWW R1 2DSx 4 1 2 3 Y WW x = Year = Work Week = M or N PIN ASSIGNMENT 1 Cathode 2 Anode 3 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded. © Semiconductor Components Industries, LLC, 2004 DPAK CASE 369C STYLE 4 V 1 Gate 4 Anode ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Preferred devices are recommended choices for future use and best overall value. Publication Order Number: MCR12DSM/D MCR12DSM/D MCR12DSM MCR12DSM, MCR12DSN MCR12DSN THERMAL CHARACTERISTICS Characteristic Symbol Max Unit RqJC RqJA RqJA 2.2 88 80 °C/W TL 260 °C Unit Thermal Resistance - Junction-to-Case Thermal Resistance - Junction-to-Ambient Thermal Resistance - Junction-to-Ambient (Note 2) Maximum Lead Temperature for Soldering Purposes (Note 3) ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristics Min Typ Max - - - - 10 500 12.5 18 V OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (Note 4) (VAK = Rated VDRM or VRRM; RGK = 1.0 KW) TJ = 25°C TJ = 110°C IDRM, IRRM mA ON CHARACTERISTICS Peak Reverse Gate Blocking Voltage, (IGR = 10 mA) VGRM 10 Peak Reverse Gate Blocking Current, (VGR = 10 V) IGRM - - 1.2 mA Peak Forward On-State Voltage (Note 5), (ITM = 20 A) VTM - 1.3 1.9 V 5.0 - 12 - 200 300 0.45 - 0.2 0.65 - - 1.0 1.5 - 0.5 - 1.0 - 6.0 10 0.5 - 1.0 - 6.0 10 - 2.0 5.0 Min Typ Max 2.0 10 - Gate Trigger Current (Continuous dc) (Note 6) (VD = 12 V, RL = 100 W) Gate Trigger Voltage (Continuous dc) (Note 6) (VD = 12 V, RL = 100 W) Holding Current (VD = 12 V, Initiating Current = 200 mA, Gate Open) Latching Current (VD = 12 V, IG = 2.0 mA) mA IGT TJ = 25°C TJ = -40°C VGT TJ = 25°C TJ = -40°C TJ = 110°C V IH TJ = 25°C TJ = -40°C mA IL TJ = 25°C TJ = -40°C Turn-On Time (Source Voltage = 12 V, RS = 6.0 KW, IT = 16 A(pk), RGK = 1.0 KW) (VD = Rated VDRM, Rise Time = 20 ns, Pulse Width = 10 ms) mA ms tgt DYNAMIC CHARACTERISTICS Symbol Characteristics Critical Rate of Rise of Off-State Voltage (VD = 0.67 X Rated VDRM, Exponential Waveform, RGK = 1.0 KW, TJ = 110°C) dv/dt Unit V/ms 2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 3. 1/8 from case for 10 seconds. 4. Ratings apply for negative gate voltage or RGK = 1.0 kW. Devices shall not have a positive gate voltage concurrently with a negative voltage on the anode. Devices should not be tested with a constant current source for forward and reverse blocking capability such that the voltage applied exceeds the rated blocking voltage. 5. Pulse Test: Pulse Width 2.0 msec, Duty Cycle 2%. 6. RGK current not included in measurement. ORDERING INFORMATION Package Type Package Shipping DPAK 369C 16 mm Tape & Reel (2.5 k / Reel) MCR12DSMT4G MCR12DSMT4G DPAK (Pb-Free) 369C 16 mm Tape & Reel (2.5 k / Reel) MCR12DSN-001 MCR12DSN-001 DPAK-3 369D 75 Units / Rail DPAK 369C 16 mm Tape & Reel (2.5 k / Reel) Device MCR12DSMT4 MCR12DSMT4 MCR12DSNT4 MCR12DSNT4 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D BRD8011/D. http://onsemi.com 2 MCR12DSM MCR12DSM, MCR12DSN MCR12DSN Voltage Current Characteristic of SCR + Current Symbol Parameter VDRM Peak Repetitive Off State Forward Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Off State Reverse Voltage IRRM Peak Reverse Blocking Current VTM Peak On State Voltage IH Holding Current Anode + VTM on state IH IRRM at VRRM Reverse Blocking Region (off state) Reverse Avalanche Region + Voltage IDRM at VDRM Forward Blocking Region (off state) 110 P(AV) , AVERAGE POWER DISSIPATION (WATTS) TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( °C) Anode - 105 100 95 90 dc 85 a 80 180° a = Conduction Angle 75 70 0 1.0 2.0 a = 30° 3.0 4.0 60° 5.0 90° 120° 6.0 7.0 8.0 16 180° 120° 14 90° a 12 60° dc a = Conduction Angle 10 8.0 a = 30° 6.0 4.0 2.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 IT(AV), AVERAGE ON-STATE CURRENT (AMPS) IT(AV), AVERAGE ON-STATE CURRENT (AMPS) Figure 1. Average Current Derating Figure 2. On-State Power Dissipation http://onsemi.com 3 8.0 100 1.0 TYPICAL @ TJ = 25°C r(t) , TRANSIENT THERMAL RESISTANCE (NORMALIZED) I T, INSTANTANEOUS ON-STATE CURRENT (AMPS) MCR12DSM MCR12DSM, MCR12DSN MCR12DSN MAXIMUM @ TJ = 110°C 10 MAXIMUM @ TJ = 25°C 1.0 0.1 0.1 ZqJC(t) = RqJC(t)Sr(t) 0.01 0 2.0 1.0 3.0 5.0 4.0 0.1 10 1.0 100 1000 10 K VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) t, TIME (ms) Figure 3. On-State Characteristics Figure 4. Transient Thermal Response 1.0 VGT, GATE TRIGGER VOLTAGE (VOLTS) I GT, GATE TRIGGER CURRENT (m A) 1000 RGK = 1.0 KW 100 GATE OPEN 10 1.0 -40 -25 0.1 -10 5.0 20 35 50 65 80 95 -40 -25 110 -10 5.0 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. Typical Gate Trigger Current versus Junction Temperature Figure 6. Typical Gate Trigger Voltage versus Junction Temperature 10 10 RGK = 1.0 KW RGK = 1.0 KW IL, LATCHING CURRENT (mA) IH , HOLDING CURRENT (mA) 110 1.0 0.1 -40 -25 -10 5.0 20 35 50 65 80 95 1.0 0.1 -40 -25 110 -10 5.0 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. Typical Holding Current versus Junction Temperature Figure 8. Typical Latching Current versus Junction Temperature http://onsemi.com 4 110 MCR12DSM MCR12DSM, MCR12DSN MCR12DSN 10 1000 8.0 STATIC dv/dt (V/m s) IH, HOLDING CURRENT (mA) TJ = 25°C 6.0 IGT = 25 mA 4.0 70°C 100 90°C TJ = 110°C 10 IGT = 10 mA 2.0 0 1.0 100 1000 10 K 100 1000 RGK, GATE-CATHODE RESISTANCE (OHMS) RGK, GATE-CATHODE RESISTANCE (OHMS) Figure 9. Holding Current versus Gate-Cathode Resistance Figure 10. Exponential Static dv/dt versus Gate-Cathode Resistance and Junction Temperature 1000 1000 TJ = 110°C VD = 800 V TJ = 110°C 100 STATIC dv/dt (V/ m s) STATIC dv/dt (V/ m s) 400 V 600 V VPK = 800 V 10 1.0 100 IGT = 25 mA IGT = 10 mA 10 1.0 1000 100 100 1000 RGK, GATE-CATHODE RESISTANCE (OHMS) RGK, GATE-CATHODE RESISTANCE (OHMS) Figure 11. Exponential Static dv/dt versus Gate-Cathode Resistance and Peak Voltage Figure 12. Exponential Static dv/dt versus Gate-Cathode Resistance and Gate Trigger Current Sensitivity http://onsemi.com 5 MCR12DSM MCR12DSM, MCR12DSN MCR12DSN PACKAGE DIMENSIONS DPAK CASE 369C ISSUE O -T- C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE E R 4 Z A S 1 2 DIM A B C D E F G H J K L R S U V Z 3 U K F J L H D G 2 PL 0.13 (0.005) M INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 - 0.035 0.050 0.155 - T STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 - 0.89 1.27 3.93 - MCR12DSM MCR12DSM, MCR12DSN MCR12DSN PACKAGE DIMENSIONS DPAK-3 CASE 369D-01 369D-01 ISSUE B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. C B E R 4 Z A S 1 2 3 -T- SEATING PLANE K J F H D G DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 - 3 PL 0.13 (0.005) M STYLE 4: PIN 1. 2. 3. 4. T http://onsemi.com 7 CATHODE ANODE GATE ANODE MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 - MCR12DSM MCR12DSM, MCR12DSN MCR12DSN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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