MCPG004A S-CPGA-P12 MIL-STD-1835 CMGA16-PN MO-067AD MO-066AD

MCPG004A JANUARY 1997 GA-GB (S-CPGA-P12 X 12) CERAMIC PIN GRID ARRAY PACKAGE A or A1 SQ 1.100 (27,94) TYP M L K J H G F E D

MECHANICAL DATA MCPG004A MCPG004A JANUARY 1997 GA-GB (S-CPGA-P12 S-CPGA-P12 X 12) CERAMIC PIN GRID ARRAY PACKAGE A or A1 SQ 1.100 (27,94) TYP M L K J H G F E D C B A 1 2 3 DIM 4 5 6 7 8 9 10 11 12 MAX Notes A 1.240 (31,50) 1.280 (32,51) Large Outline A1 1.180 (29,97) 1.235 (31,37) Small Outline B 0.110 (2,79) 0.205 (5,21) Cavity Up B1 0.095 (2,41) 0.205 (5,21) Cavity Down C 0.040 (1,02) 0.060 (1,52) Cavity Up C1 B or B1 MIN 0.025 (0,63) 0.060 (1,52) Cavity Down C or C1 0.050 (1,27) DIA 4 Places 0.022 (0,55) 0.016 (0,41) 0.140 (3,56) 0.120 (3,05) 0.100 (2,54) DIA TYP MAXIMUM PINS WITHIN MATRIX 144 4040114-5 / C 04/96 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Index mark may appear on top or bottom depending on package vendor. Pins are located within 0.010 (0,25) diameter of true position relative to each other at maximum material condition and within 0.030 (0,76) diameter relative to the edge of the ceramic. E. This package can be hermetically sealed with metal lids or with ceramic lids using glass frit. F. The pins can be gold plated or solder dipped. G. Falls within MIL-STD-1835 MIL-STD-1835 CMGA4-PN and CMGA16-PN CMGA16-PN and JEDEC MO-067AD MO-067AD and MO-066AD MO-066AD, respectively POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright © 1996, Texas Instruments Incorporated