MC33922/D 29-TERMINAL PC33922PNB/R2 PC34922PNB/R2 MC33922 MC34922 - Datasheet Archive

 

MOTOROLA Document order number: MC33922/D Rev 3.0, 12/2003 SEMICONDUCTOR TECHNICAL DATA Product Preview 33922 34922 Freescale

 

Freescale Semiconductor, Inc. MOTOROLA Document order number: MC33922/D MC33922/D Rev 3.0, 12/2003 SEMICONDUCTOR TECHNICAL DATA Product Preview 33922 34922 Freescale Semiconductor, Inc. Dual 4.0 A Power H-Bridge The 33922/34922 is a dual H-Bridge Power IC with a load current feedback feature making it ideal for closed-loop DC motor control and bipolar stepper motor control. The IC incorporates internal input control logic, charge pumps, gate drivers, and low RDS(ON) output MOSFETs. The 33922/34922 is able to control two inductive loads with continuous DC load currents up to 4.0 A. Output loads can be efficiently pulse width modulated (PWM-ed) at frequencies up to 20 kHz. The load current feedback feature provides a proportional (1/375th of the load current) constant-current source output suitable for monitoring by a microcontroller's A/D input. This feedback feature facilitates the design of closed-loop torque/speed control. DUAL 4.0 A POWER H-BRIDGE Two fault status terminals (SFA, SFB) report undervoltage, short circuit, and overtemperature conditions separately for each H-Bridge. Each H-Bridge has two independent inputs providing polarity control of the outputs. Two disable inputs on each H-Bridge provide a choice of high=true or low=true shutdown of the H-Bridge outputs. PNB SUFFIX 29-TERMINAL 29-TERMINAL PQFN CASE 1469-02 Normal operating voltage covers the range of 5.0 V V+ 36 V. The IC can also be operated up to 40 V with derating of the specifications. Features · 5.0 V to 40 V Continuous Operation · 120 m RDS(ON) H-Bridge MOSFETs ORDERING INFORMATION Device Temperature Range (TA) Package PC33922PNB/R2 PC33922PNB/R2 -40°C to 125°C 29 PQFN PC34922PNB/R2 PC34922PNB/R2 · TTL/CMOS Compatible Inputs (5.0 V Logic Levels) · PWM Frequencies up to 20 kHz · Active Current Limiting via Internal Constant OFF-Time PWM (with Temperature-Dependent Threshold Reduction) · Output Short Circuit Protection with Shutdown 0°C to 85°C 29 PQFN Simplified Application Diagram 33922/34922 Simplified Appliction Diagram V+B V+A 33922 34922 V+A MCU V+B IN1 IN2 IN3 IN4 M1 M2 M4 N M3 A/D FBA S Bipolar Bipolar Step Stepper Motor Motor CA CB A/D FBB PGND AGND This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Motorola, Inc. 2003 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Ccp CA Charge Pump EA M1 OUT1 IN1 IN2 Gate Drive M2 OUT2 D1 Freescale Semiconductor, Inc. 25 uA µA Control Logic Ccp AGND 25 µA VPWR PGND H-Bridge A H-Bridge B V+B Charge Pump EB Current Current Limit, Overcurrent Short Circuit Sense, & Detection,and Feedback Circuit 5.0 V Regulator 80 µA uA (each) (each) IN1 IN3 IN2 IN4 D1 D3 D4 D2 OverOver Temperature temperature Undervoltage FS SFA FBA FB AGND CB Current Limit, Overcurrent Short Circuit Sense, & Detection,and Feedback Circuit 5.0 V Regulator 80 µA 80 uA (each) (each) D2 VV+A PWR OUT1 M3 Gate Drive OUT2 M4 25 µA 25 uA Control Logic Over OverTemperature temperature Undervoltage SFB FS FBB FB AGND AGND PGND Figure 1. 33922/34922 Simplified Internal Block Diagram 33922/34922 2 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com IN1 PGND EA D1 27 29 26 25 Transparent Top View of Dual H-Bridge Package AGND 28 Freescale Semiconductor, Inc. 24 CA 23 IN2 22 V+A 21 M2 5 20 D2 D4 6 19 FBB 18 M3 17 V+B NC 1 SFA 2 V+A 3 M1 4 FBA H-Bridge A 7 8 IN4 9 16 SFB CB 10 15 NC 11 12 29 13 14 EB PGND AGND IN3 H-Bridge B D3 Freescale Semiconductor, Inc. M4 V+B TERMINAL FUNCTION DESCRIPTION Terminal Terminal Name Formal Name 1, 15 NC No Connect 2 16 SFA SFB Fault Status for H-Bridge A and H-Bridge B 3, 22 8, 17 V+A V+B Positive Power Supply 4 21 M1 M2 H-Bridge A Output 5 19 FBA FBB Feedback for H-Bridge A and H-Bridge B 6 20 D4 D2 Disable 7 18 M4 M3 H-Bridge B Output Output of H-Bridge B. 9 14 23 28 IN4 IN3 IN2 IN1 Logic Input Control Logic input control of their respective M4 through M1 terminals; e.g., IN1 logic HIGH = M1 HIGH. 10 24 CB CA Charge Pump B and Charge Pump A External reservoir capacitor connection for internal charge pump capacitor for H-Bridge B and H-Bridge A, respectively. 11 25 D3 D1 Disable Active HIGH inputs used to tri-state H-Bridge outputs for H-Bridge B and H-Bridge A, respectively. When terminals are logic HIGH, outputs are tri-stated. 12 26 EB EA Enable Enable controls for H-Bridge B and H-Bridge A, respectively; e.g., EB logic HIGH = Half-Bridge B Operational, EB logic LOW = Half-Bridge B asleep. 13, 27 AGND Analog Ground Low-current analog signal ground. 29 PGND Power Ground High-current power ground. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA Definition These terminals have no internal connections. Open drain active LOW fault status output requiring a pull-up resistor to 5.0 V. One required for each H-Bridge. Positive supply connections of H-Bridge A and H-Bridge B, respectively. Output of H-Bridge A. Load current feedback outputs providing constant 1/375th of H-Bridge A or B high-side current. Active LOW inputs used to tri-state for H-Bridge B and H-Bridge A outputs, respectively. When terminals are logic LOW, outputs are tri-stated. For More Information On This Product, Go to: www.freescale.com 33922/34922 3 Freescale Semiconductor, Inc. MAXIMUM RATINGS All voltages are with respect to ground unless otherwise noted. Rating Symbol Value Unit Supply Voltage V+ 40 V Input Voltage (Note 1) VIN -0.1 to 7.0 V SFA, SFB Status Output (Note 2) V SF 7.0 V Continuous Current, Each H-Bridge (Note 3) IOUT 4.0 A V Freescale Semiconductor, Inc. ESD Voltage Human Body Model (Note 4) Each Terminal to AGND Each Terminal to PGND Each Terminal to V+ Each I/O to All Other I/Os Machine Model (Note 5) VESD1 ±1500 VESD1 ±2000 VESD1 ±2000 VESD2 ±200 TSTG Storage Temperature ±1000 VESD1 -65 to 150 °C TA Ambient Operating Temperature (Note 6) °C MC33922 MC33922 -40 to 125 MC34922 MC34922 0 to 85 °C TJ Junction Operating Temperature MC33922 MC33922 -40 to 150 MC34922 MC34922 0 to 110 Terminal Soldering Temperature (Note 7) TSOLDER Approximate Junction-to-Board Thermal Resistance (and Package Dissipation) (Note 6), (Note 8) °C °C/W RJB ~6.0 PQFN (4.0 W) Notes 1. 2. 3. 4. 220 Exceeding the input voltage on IN1, IN2, IN3, IN4, EA, EB, D1, D2, D3, or D4 may cause a malfunction or permanent damage to the device. Exceeding the pull-up resistor voltage on the open drain SFA and SFB terminals may cause permanent damage to the device. Continuous current capability so long as junction temperature is 150°C. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ). 5. ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 ). 6. 7. The limiting factor is junction temperature, taking into account the power dissipation, thermal resistance, and heat sinking. Terminal soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Exposed heatsink pad plus the power and ground terminals comprise the main heat conduction paths. The actual RJB (junction-to-PC board) values will vary depending on solder thickness and composition and copper trace thickness. 8. 33922/34922 4 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 5.0 V V+ 36 V and -40°C TA 125°C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit V+ 5.0 ­ 40 V ­ 25 50 POWER SUPPLY Operating Voltage Range (Note 9) Sleep State Supply Current, Each H-Bridge (Note 10) µA IQ(sleep) VEN = 0 V, IOUT = 0 A mA IQ(standby) Standby Supply Current, Each H-Bridge ­ Freescale Semiconductor, Inc. VEN = 5.0 V, IOUT = 0 A ­ 20 Threshold Supply Voltage V+ (thres-OFF) 4.15 4.4 4.65 V+ (thres-ON) 4.5 4.75 5.0 V V+ (hys) 150 ­ ­ mV 3.35 ­ ­ ­ Switch-OFF Switch-ON Hysteresis ­ 20 3.5 ­ ­ V CHARGE PUMP VCP - V+ Charge Pump Voltage V+ = 5.0 V 8.0 V V+ 40 V V CONTROL INPUTS V Input Voltage (IN1, IN2, IN3, IN4, D1, D2, D3, D4) VIH Threshold HIGH Threshold LOW Hysteresis VIL ­ 1.4 0.7 1.0 ­ -200 -80 ­ ­ Input Current (IN1, IN2, IN3, IN4, D1, D3) ­ VHYS 25 100 µA IINP VIN - 0.0 V µA IINP Input Current (D2, D4, EA, EB) V = 5.0 V Notes 9. Specifications are characterized over the range of 5.0 V V+ 36 V. Operation >36 V will cause some parameters to exceed listed min/max values. Refer to typical operating curves to extrapolate values for operation > 36 V but 40 V. 10. IQ(sleep) is with sleep mode function enabled. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33922/34922 5 Freescale Semiconductor, Inc. STATIC ELECTRICAL CHARACTERISTICS (continued) Characteristics noted under conditions 5.0 V V+ 36 V and -40°C TA 125°C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max 5.0 V V+ 36 V, TJ = 25°C ­ 120 ­ 8.0 V V+ 36 V, TJ = 150°C ­ ­ 225 5.0 V V+ 8.0 V, TJ = 150°C ­ ­ Unit 300 POWER OUTPUTS (M1, M2, M3, M4) m RDS(ON) Output-ON Resistance (Note 11) ILIM 5.2 6.5 7.8 A High-Side Short Circuit Detection Threshold Freescale Semiconductor, Inc. Active Current Limiting Threshold (via Internal Constant OFF-Time PWM) ISCH 11 ­ ­ A Low-Side Short Circuit Detection Threshold ISCL 8.0 ­ ­ A VOUT = V+ ­ 100 200 VOUT = GND ­ 30 60 ­ ­ 2.0 TLIM 175 ­ ­ THYS 10 ­ 30 Leakage Current (Note 12) µA IOUT(leak) Output FET Body Diode Forward Voltage Drop V VF IOUT = 3.0 A Overtemperature Shutdown °C Thermal Limit Hysteresis HIGH-SIDE CURRENT SENSE FEEDBACK Feedback Current I FB ­ ­ 600 µA I OUT = 500 mA 1.07 1.33 1.60 mA I OUT = 1.5 A 3.6 4.0 4.4 mA I OUT = 0 mA 7.2 8.8 mA 16 17.6 mA ­ ­ 10 ­ I OUT = 6.0 A 8.0 14.4 I OUT = 3.0 A ­ 1.0 FAULT STATUS (Note 13) Fault Status Leakage Current (Note 14) Fault Status Set Voltage (Note 15) V V SF (LOW) I SF = 300 µA Notes 11. 12. 13. 14. 15. µA I SF (leak) V SF = 5.0 V Output-ON resistance as measured from output to V+ and ground. Outputs switched OFF with D1, D2, D3, or D4. Fault Status output is an open drain output requiring a pull-up resistor to 5.0 V. Fault Status Leakage Current is measured with Fault Status HIGH and not set. Fault Status Set Voltage is measured with Fault Status LOW and set with I SF = 300 µA. 33922/34922 6 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 5.0 V V+ 36 V and -40°C TA 125°C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit PWM Frequency (Note 16) f PWM ­ 10 ­ kHz Maximum Switching Frequency During Active Current Limiting (Note 17) f MAX ­ ­ 20 kHz Output ON Delay (Note 18) t d (ON) ­ ­ 18 ­ ­ 18 TIMING CHARACTERISTICS V+ = 14 V Output OFF Delay (Note 18) µs t d (OFF) V+ = 14 V Freescale Semiconductor, Inc. µs Output Latch-OFF Time ta 15 20.5 26 µs Output Blanking Time tb 12 16.5 21 µs 2.0 5.0 8.0 t FAULT ­ 4.0 ­ µs t d(disable) ­ ­ 8.0 µs Power-ON Delay Time (Note 22) t pod ­ 1.0 5.0 ms Wake-Up Delay Time (Note 22) t wud ­ 1.0 5.0 ms t rr 100 ­ ­ ns µs t f, t r Output Rise and Fall Time (Note 19) V+ = 14 V, IOUT = 3.0 A Short Circuit/Overtemperature Turn-OFF Time (Note 20) Disable Delay Time (Note 21) Output FET Body Diode Reverse Recovery Time (Note 23) Notes 16. The outputs can be PWM controlled from an external source. This is typically done by holding one input high while applying a PWM pulse train to the other input. The maximum PWM frequency obtainable is a compromise between switching losses and switching frequency. See Typical Switching Waveforms, Figures 11 through 18, pp. 12­13. 17. The Maximum Switching Frequency during active current limiting is internally implemented. The internal control produces a constant OFFtime PWM of the output. The output load characteristics affect the switching frequency. 18. Output Delay is the time duration from the midpoint of the IN1 or IN2 input signal to the 10% or 90% point (dependent on the transition direction) of the M1 or M2 signal, respectively, and of the IN3 or IN4 input signal to the 10% or 90% point (dependent on the transition direction) of the M3 or M4 signal, respectively. If the output is transitioning HIGH-to-LOW, the delay is from the midpoint of the input signal to the 90% point of the output response signal. If the output is transitioning LOW-to-HIGH, the delay is from the midpoint of the input signal to the 10% point of the output response signal. See Figure 2, page 8. 19. Rise Time is from the 10% to the 90% level and Fall Time is from the 90% to the 10% level of the output signal. See Figure 4, page 8. 20. Increasing currents will become limited at ILIM. Hard shorts will breach the ISCH or ISCL limit, forcing the output into an immediate tri-state 21. 22. 23. latch-OFF. See Figures 6 and 7, page 9. Output current limiting will cause junction temperatures to rise. A junction temperature above 160°C will cause the active current limiting to progressively "fold-back", or decrease, to 2.5 A typical at 175°C where thermal latch-OFF will occur. See Figure 5, page 8. Disable Delay Time is the time duration from the midpoint of the D (disable) input signal to 10% of the output tri-state response. See Figure 3, page 8. Parameter has been characterized but not production tested. Parameter is guaranteed by design but not production tested. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33922/34922 7 Freescale Semiconductor, Inc. Timing Diagrams VIN1, IN2 (V) 5.0 50% VOUT1, 2 (V) 0 50% td(OFF) td(ON) VPWR V+ 90% 10% 0 TIME Freescale Semiconductor, Inc. Figure 2. Output Delay Time 5.0 V 0V 0 VOUT1, 2 (V) Figure 3. Disable Delay Time V PWR V+ tf tr 90% 90% 10% 10% 0 IILIM, OUTPUT CURRENT (A) MAX ILIM, CURRENT (A) Figure 4. Output Switching Time 6.5 6.6 2.5 Thermal Shutdown 160 175 T J, JUNCTION TEMPERATURE (o C) Figure 5. Active Current Limiting Versus Temperature (Typical) 33922/34922 8 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Diode Reverse INn, LOGIC IN D1, LOGIC IN D2, LOGIC IN FS, LOGIC OUT SF 8.0 ISCL Short Circuit Detect Threshold Typ. Short Ckt. Detect Threshold 6.5 Typical Current Threshold Typ. Current Limit Limiting for Low-Side FETs Threshold PWM Active Current Current Limiting Limiting (See Figure 7) (See (See Figure6) 7) Hard Short Detect and Latch-OFF Hard Short Detect and Latch-Off 0 or IN2 IN1 OR IN2 [1] [0] IN1 IN2 IN1 IN2 IN2 or IN1 IN1 OR IN2 IN2 or IN1 IN2 OR IN1 or IN2 IN2 OR IN1 [1] [0] [1] [0] [1] Outputs Outputs Tristated Tri-stated Outputs Operational Outputs Operational (per Input Control Condition) (per Input Control Condition) Outputs Tristated Tri-stated [0] TIME Figure 6. Active Current Limiting Versus Time ILOADOUT, CURRENT (A) (A) I , OUTPUT CURRENT Freescale Semiconductor, Inc. IOUT, CURRENT (A) IILOAD, OUTPUT CURRENT (A) OUT Recovery Spikes Load Capacitance and/or Diode Reverse Recovery Spikes IShort Circuit Detect Threshold Overcurrent Minimum Threshold SCL Short Circuit Detect Threshold 8.0 ta tb 6.5 ta = Tristate Latch-OFF Time a = Output Output OFF Time ttb = Current Blanking Time b = Output Limit Blank Time Typical Current Typical Waveform LimitingPWM Load Current Limiting Waveform Hard Output Hard Short Detect Short Latch-OFF Latch-Off Prevented During tb TIME Figure 7. Active Current Limiting Detail MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33922/34922 9 Freescale Semiconductor, Inc. Electrical Performance Curves 0.40 0.35 0.30 Ohms 0.20 0.15 0.10 0.05 0.0 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 33 35 37 39 41 Volts Figure 8. Typical High-Side RDS(ON) Versus V+ 0.13 0.128 Ohms OHMS Freescale Semiconductor, Inc. 0.25 0.126 0.124 0.122 0.12 5 7 9 11 13 15 17 19 21 23 25 27 29 31 Volts VPWR Figure 9. Typical Low-Side RDS(ON) Versus V+ 33922/34922 10 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. 9.0 8.0 7.0 OHMS Milliamperes Freescale Semiconductor, Inc. 6.0 5.0 4.0 3.0 2.0 1.0 0.0 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Volts VPWR Figure 10. Typical Quiescent Supply Current Versus V+ MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33922/34922 11 Freescale Semiconductor, Inc. Typical Switching Waveforms Important For all plots, the following applies: · Ch2=2.0 A per division · LLOAD =533 µH @ 1.0 kHz · LLOAD =530 µH @ 10.0 kHz · RLOAD =4.0 Output Voltage (M1) Freescale Semiconductor, Inc. Output Voltage (M1) IOUT IOUT Input Voltage (IN1) Input Voltage (IN1) V+ = 24 V fPWM = 1.0 kHz Duty Cycle = 10% Figure 11. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 10% V+ = 34 V fPWM = 1.0 kHz Duty Cycle = 90% Figure 13. Output Voltage and Current vs. Input Voltage at V+ = 34 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 90%, Showing Device in Current Limiting Mode Output Voltage (M1) Output Voltage (M1) IOUT IOUT Input Voltage (IN1) Input Voltage (IN1) V+ = 24 V fPWM = 1.0 kHz Duty Cycle = 50% Figure 12. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 50% 33922/34922 12 V+ = 22 V fPWM = 1.0 kHz Duty Cycle = 90% Figure 14. Output Voltage and Current vs. Input Voltage at V+ = 22 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 90% MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Output Voltage (M1) Output Voltage (M1) IOUT Freescale Semiconductor, Inc. IOUT Input Voltage (IN1) Input Voltage (IN1) V+ = 24 V fPWM = 10 kHz V+ = 12 V Duty Cycle = 50% Figure 15. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 10 kHz, and Duty Cycle of 50% Output Voltage (M1) fPWM = 20 kHz Duty Cycle = 50% Figure 17. Output Voltage and Current vs. Input Voltage at V+ = 12 V, PMW Frequency of 20 kHz, and Duty Cycle of 50% for a Purely Resistive Load Output Voltage (M1) IOUT IOUT Input Voltage (IN1) Input Voltage (IN1) V+ = 24 V fPWM = 10 kHz Duty Cycle = 90% Figure 16. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 10 kHz, and Duty Cycle of 90% MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA V+ = 12 V fPWM = 20 kHz Duty Cycle = 90% Figure 18. Output Voltage and Current vs. Input Voltage at V+ = 12 V, PMW Frequency of 20 kHz, and Duty Cycle of 90% for a Purely Resistive Load For More Information On This Product, Go to: www.freescale.com 33922/34922 13 Freescale Semiconductor, Inc. Table 1. Truth Table (Each Bridge) The tri-state conditions and the fault status are reset using D1, D2, D3, or D4. The truth table uses the following notations: L = LOW, H = HIGH, X = HIGH or LOW, and Z = High impedance (all output power transistors are switched off). Fault Status Flag Input Conditions Device State Output States D1/D3 D2/D4 IN1/IN3 IN2/IN4 SFA/SFB M1/M3 M2/M4 Forward H L H H L H H L Reverse H L H L H H L H Freewheeling Low H L H L L H L L Freewheeling High Freescale Semiconductor, Inc. EA/EB H L H H H H H H Disable 1/Disable 3 (D1/D3) H H X X X L Z Z Disable 2/Disable 4 (D2/D4) H X L X X L Z Z IN1/IN3 Disconnected H L H Z X H H X IN2/IN4 Disconnected H L H X Z H X H D1/D3 Disconnected H Z X X X L Z Z D2/D4 Disconnected H X Z X X L Z Z Undervoltage (Note 24) H X X X X L Z Z Overtemperature (Note 25) H X X X X L Z Z Short Circuit (Note 25) H X X X X L Z Z Sleep Mode EA/EB L X X X X H Z Z EA/EB Disconnected Z X X X X H Z Z Notes 24. In the case of an undervoltage condition, the outputs tri-state and the fault status is set logic LOW. Upon undervoltage recovery, fault status is reset automatically or automatically cleared and the outputs are restored to their original operating condition. 25. When a short circuit or overtemperature condition is detected, the power outputs are tri-state latched-OFF independent of the input signals and the fault status flag is set logic LOW. 33922/34922 14 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. SYSTEM/APPLICATION INFORMATION INTRODUCTION Freescale Semiconductor, Inc. Numerous protection and operational features (speed, torque, direction, dynamic braking, PWM control, and closedloop control), in addition to the 5.0 A rms current capability, make the 33922/34922 a very attractive, cost-effective solution for controlling a broad range of small DC motors. In addition, the 33922/34922 device can be used to control a bipolar stepper motor. The 33922/34922 can also be used to excite transformer primary windings with a switched square wave to produce secondary winding AC currents. Two independent inputs on each H-Bridge (IN1 and IN2 on H-Bridge A and IN3 and IN4 on H-Bridge B) provide control of the two totem-pole half-bridge outputs. Two pairs of disable inputs (D1 and D2 and D3 and D4 on H-Bridge A and H-Bridge B, respectively) provide the means to force the H-Bridge outputs to a high-impedance state (all H-Bridge switches OFF). Enable terminals EA and EB control enable functions that allow the 33922/34922 to be placed in a powerconserving sleep mode. As shown in Figure 1, Simplified Internal Block Diagram, page 2, the 33922/34922 comprises two fully protected monolithic H-Bridges with Enable, Fault Status reporting, and high-side current sense feedback to accommodate closed-loop control. For a DC motor to run, the input conditions need be as follows: Enable inputs EA and EB logic HIGH, D1 and D3 inputs logic LOW, D2 and D4 inputs logic HIGH, SFA and SFB flags cleared (logic HIGH), one IN logic LOW and the other IN logic HIGH for each H-Bridge (to define output polarity). The 33922/ 34922 can execute dynamic braking by simultaneously turning on either all high-side MOSFETs or all low-side MOSFETs in the output H-Bridges. The 33922/34922 has undervoltage shutdown with automatic recovery, active current limiting, output short circuit latch-OFF, and overtemperature latch-OFF. An undervoltage shutdown, output short-circuit latch-OFF, or overtemperature latch-OFF fault condition will cause the outputs to turn OFF (i.e., become high impedance or tri-stated) and the fault output flag to be set LOW. Either of the Disable inputs or V+ must be "toggled" to clear the fault flag. The 33922/34922 outputs are capable of providing a continuous DC load current of 4.0 A from a 40 V V+ source. Internal charge pumps support PWM frequencies to 20 kHz. External pull-up resistors are required at the SF terminals for fault status reporting. The 33922/34922 has analog feedback (current mirror) output terminals (the FBA and FBB terminals) that provide a constant-current source ratioed to the active high-side MOSFETs. This can be used to provide "real time" monitoring of load current to facilitate closed-loop operation for motor speed/torque control. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA Active current limiting is accomplished by a constant OFFtime PWM method employing active current limiting threshold triggering. The active current limiting scheme is unique in that it incorporates a junction temperature-dependent current-limit threshold. This means the active current limiting threshold is "ramped down" as the junction temperature increases above 160°C, until at 175°C the current will have been decreased to about 2.5 A. Above 175°C, the overtemperature shutdown (latch-OFF) occurs. This combination of features allows the device to remain in operation for a longer period of time with unexpected loads, while still retaining adequate protection for both the device and the load. For More Information On This Product, Go to: www.freescale.com 33922/34922 15 Freescale Semiconductor, Inc. FUNCTIONAL TERMINAL DESCRIPTION PGND and AGND The power and analog ground terminals should be connected together with a very low impedance connection. V+ (V+A and V+B) CA and CB V+ terminals are the power supply inputs to the device. All V+ terminals must be connected together on the printed circuit board with as short as possible traces offering as low impedance as possible between the terminals. Freescale Semiconductor, Inc. A disable timer (time t b) incorporated to detect currents that are higher than current limit is activated at each output transition to facilitate hard short detection (see Figure 7, page 9). V+ terminals have an undervoltage threshold. If the supply voltage drops below a V+ undervoltage threshold, the output power stage switches to a tri-state condition and the fault status flag is set and the Fault Status terminal voltage switched to a logic LOW. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input terminals and the fault status flag is automatically reset logic HIGH. Fault Status (SFA and SFB) These terminals are the device fault status outputs. The outputs are active LOW open drain structures, each requiring a pull-up resistor to 5.0 V. Refer to Table 1, Truth Table (Each Bridge), page 14. CA and CB are charge pump output terminals for H-Bridge A and H-Bridge B, respectively. A filter capacitor (up to 33 nF) can be connected from the charge pump output terminals and the PGND terminals. The device can operate without external capacitors, although the CA and CB capacitors help to reduce noise and allow the device to perform at maximum speed, timing, and PWM frequency. EA and EB The Enable terminals are used to place the device in a sleep mode so as to consume very low currents. When the voltage of the Enable terminals is a logic LOW state, the device is in the sleep mode. The device is enabled and fully operational when the voltage of the Enable terminals is logic HIGH. Internal pulldown resistors maintain the device in sleep mode in the event the Enable terminals are driven through a high impedance I/O or an unpowered microcontroller, or the Enable inputs become disconnected. FBA and FBB IN1, IN2, IN3, IN4, D1, D2, D3, and D4 These terminals are input control terminals used to control the outputs. These terminals are 5.0 V CMOS-compatible inputs with hysteresis. The IN1 and IN2 independently control M1 and M2, respectively, and IN3 and IN4 independently control M3 and M4, respectively. D1 and D2 are complementary inputs used to tri-state disable H-Bridge A outputs, and D3 and D4 are complementary inputs used to tri-state disable H-Bridge B outputs. When either D1 or D2 is SET (D1 = logic HIGH or D2 = logic LOW) in the disable state, outputs M1 and M2 are both tri-state disabled; however, the rest of H-Bridge A circuitry is fully operational and the supply IQ(standby) current is reduced to a few milliamperes. The case is true for D3 or D4 for H-Bridge B as well. Refer to Table 1, Truth Table (Each Bridge), and STATIC ELECTRICAL CHARACTERISTICS table, page 5. M1, M2, M3, and M4 These terminals are the outputs of the H-Bridges with integrated output FET body diodes. H-Bridge A outputs (M1 and M2) are controlled using the IN1, IN2, D1, and D2 inputs and H-Bridge B outputs (M3 and M4) are controlled using the IN3, IN4, D3, and D4 inputs. The outputs have active current limiting above 6.5 A typical. The outputs also have thermal shutdown (tri-state latch-OFF) with hysteresis as well as short circuit latch-OFF protection. 33922/34922 16 The device has dual feedback outputs, one for each H-Bridge, for "real time" monitoring of H-Bridge high-side currents to facilitate closed-loop operation for motor speed and torque control. The Feedback terminals provide current sensing feedback of H-Bridge high-side drivers. When running in the forward or reverse direction, a ground referenced 1/375th (0.00266) of load current is output to each Feedback terminal. Through the use of external resistors to ground, the proportional feedback current can be converted to a proportional voltage equivalent and the controlling microcontroller can "read" the current proportional voltage with its analog-to-digital converter (ADC). This is intended to provide the user with motor current feedback for motor torque control. The accuracy is ±20% at load currents 1.5 A. If PWM-ing is implemented using inputs from the Disable terminals (either D1 or D2 for H-Bridge A and D3 or D4 for H-Bridge B), a small filter capacitor (1.0 µF or less) may be required in parallel for each H-Bridge, with the external resistor to ground for fast spike suppression. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. PERFORMANCE FEATURES Short Circuit Protection Freescale Semiconductor, Inc. If an output short circuit condition is detected, the power outputs tri-state (latch-OFF) independent of the input (IN1 through IN4) states, and the fault status output flags are SET logic LOW. If the D1 and D3 inputs change from logic HIGH to logic LOW, or if the D2 and D4 inputs change from logic LOW to logic HIGH, the output bridges will become operational again and the fault status flags will be reset (cleared) to a logic HIGH state. The output stage will always switch into the mode defined by the input terminals (IN1, IN2, D1, and D2 for H-Bridge A and IN3, IN4, D3, and D4 for H-Bridge B), provided the device junction temperature is within the specified operating temperature range. Active Current Limiting The maximum current flow under normal operating conditions is internally limited to ILIM (5.2 A and 7.8 A). When the maximum current value is reached, the output stages are tristated for a fixed time (t a) of 20 µs typical. Depending on the time constant associated with the load characteristics, the current decreases during the tri-state duration until the next output ON cycle occurs (see Figures 7 and 13, page 9 and page 12, respectively). MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA The current limiting threshold value is dependent upon the device junction temperature. When -40°C TJ 160°C, ILIM is between 5.2 A and 7.8 A. When TJ exceeds 160°C, the ILIM current decreases linearly down to 2.5 A typical at 175°C. Above 175°C the device overtemperature circuit detects TLIM and overtemperature shutdown occurs (see Figure 5, page 8). This feature allows the device to remain operational for a longer time but at a regressing output performance level at junction temperatures above 160°C. Overtemperature Shutdown and Hysteresis If an overtemperature condition occurs, the power outputs are tri-stated (latched-OFF) and the fault status flags are SET to logic LOW. To reset from this condition, D1 must change from logic HIGH to logic LOW, or D2 must change from logic LOW to logic HIGH for H-Bridge A and D3 must change from logic HIGH to logic LOW, or D4 must change from logic LOW to logic HIGH for H-Bridge B. When reset, the output stage switches ON again, provided that the junction temperature is now below the overtemperature threshold limit minus the hysteresis. Note Resetting from the fault condition will clear the fault status flags. For More Information On This Product, Go to: www.freescale.com 33922/34922 17 Freescale Semiconductor, Inc. APPLICATIONS A typical application schematic is shown in Figure 19. For precision high-current applications in harsh, noisy environments, the V+ by-pass capacitor may need to be substantially larger. DC MOTOR V+A 33922/34922 H-Bridge A Freescale Semiconductor, Inc. AGND M1 1.0 µF 33 nF + 47 µF M2 EA D2 D1 100 EA D2 FBA + V+A CA D1 SFA IN1 + 1.0 µF FBB IN4 SFB 100 IN3 IN4 FBB IN2 IN3 FBA IN1 IN2 PGND SFA SFB D3 D4 EB M4 M3 D3 D4 PGND EB V+B AGND H-Bridge B V+B CB 33 nF + 47 µF DC MOTOR Figure 19. 33922/34922 Typical Application Schematic 33922/34922 18 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. PACKAGE DIMENSIONS PNB SUFFIX 29-TERMINAL 29-TERMINAL PQFN PLASTIC PACKAGE CASE 1469-02 ISSUE A 10 PIN 1 INDEX AREA 28 A 26 27 25 M 2X 0.1 C Freescale Semiconductor, Inc. 17 16 15 11 B G 24 23 22 21 20 19 18 8 9 10 10 1 2 3 4 5 6 7 2X 13 12 NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. THE COMPLETE JEDEC DESIGNATOR FOR THIS PACKAGE IS: HF-PQFP-N. 4. COPLANARITY APPLIES TO LEADS AND CORNER LEADS. 14 PIN NUMBER REFERENCE ONLY 0.1 C M 0.1 C 2.2 2.20 2.0 1.95 0.05 C 7.5 0.05 0.00 6.15 5.85 0.1 A B C PIN NUMBER REFERENCE ONLY 25 26 VIEW A (0.55) (0.8) DETAIL G C SEATING PLANE ROTATED 90° CLOCKWISE 27 28 1 24 9.55 23 9.25 22 0.1 A B C 21 4 2.95 2 3 29 4X 4 7.65 7.35 19 5 18 17 16 22X 0.8 8 9 15 1.13 0.88 7 10 20 6 7.2 8X 0.90 0.65 14 13 0.1 M CA B C 0.65 28X 0.48 12 11 VIEW M-M M 0.05 0.05 C 0.4 16X VIEW A MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 1.65 1.40 33922/34922 19 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. 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All other product or service names are the property of their respective owners. © Motorola, Inc. 2003 HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors For More Information On This Product, Go to: www.freescale.com MC33922/D MC33922/D