MC10E336 MC100E336 MC10E/MC100E336 MC10E336FN MC100E336FN MC10E336FNR2 - Datasheet Archive

 

5VECL 3Bit Registered Bus Transceiver The MC10E/MC100E336 contains three bus transceivers with both transmit and receive

 

MC10E336 MC10E336, MC100E336 MC100E336 5VECL 3Bit Registered Bus Transceiver The MC10E/MC100E336 MC10E/MC100E336 contains three bus transceivers with both transmit and receive registers. The bus outputs (BUS0­BUS2) are specified for driving a 25 bus; the receive outputs (Q0 ­ Q2) are specified for 50 . The bus outputs feature a normal HIGH level (VOH) and a cutoff LOW level - when LOW, the outputs go to ­2.0 V and the output emitter-follower is "off", presenting a high impedance to the bus. The bus outputs also feature edge slow-down capacitors. The Transmit Enable pins (TEN) control whether current data is held in the transmit register, or new data is loaded from the A/B inputs. A LOW on both of the Bus Enable inputs (BUSEN), when clocked through the register, disables the bus outputs to ­2.0 V. The receiver section clocks bus data into the receive registers, after gating with the Receive Enable (RXEN) input. All registers are clocked by a positive transition of CLK1 or CLK2 (or both). Additional leadframe grounding is provided through the Ground pins (GND) which should be connected to 0 V. The GND pins are not electrically connected to the chip. The 100 Series contains temperature compensation. · · · · · · · · · 25 Cutoff Bus Outputs http://onsemi.com MARKING DIAGRAMS MC10E336FN MC10E336FN AWLYYWW PLCC­28 FN SUFFIX CASE 776 A WL YY WW 28 1 = Assembly Location = Wafer Lot = Year = Work Week 50 Receiver Outputs MC100E336FN MC100E336FN AWLYYWW 28 1 Transmit and Receive Registers 1500 ps Max. Clock to Bus ORDERING INFORMATION 1000 ps Max. Clock to Q Bus Outputs Feature Internal Edge Slow-Down Capacitors Device Package Shipping Additional Package Ground Pins MC10E336FN MC10E336FN PLCC­28 37 Units/Rail PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V NECL Mode Operating Range: VCC= 0 V with VEE= ­4.2 V to ­5.7 V Internal Input Pulldown Resistors MC10E336FNR2 MC10E336FNR2 PLCC­28 500 Units/Reel MC100E336FN MC100E336FN PLCC­28 37 Units/Rail MC100E336FNR2 MC100E336FNR2 PLCC­28 500 Units/Reel · · ESD Protection: > 1 KV HBM, > 75 V MM · Meets or Exceeds JEDEC Spec EIA/JESD78 EIA/JESD78 IC Latchup Test · Moisture Sensitivity Level 1 · · For Additional Information, see Application Note AND8003/D AND8003/D Flammability Rating: UL­94 code V­0 @ 1/8", Oxygen Index 28 to 34 Transistor Count = 430 devices © Semiconductor Components Industries, LLC, 2000 October, 2000 ­ Rev. 3 1 Publication Order Number: MC10E336/D MC10E336/D MC10E336 MC10E336, MC100E336 MC100E336 LOGIC DIAGRAM AND PINOUT ASSIGNMENT TEN2 TEN1 B2 A2 NC VCCO Q2 23 22 21 PIN DESCRIPTION BUSEN1 BUSEN2 RXEN 26 25 24 20 19 18 PIN GND FUNCTION TEN1, TEN2 ECL Transit Enable A0­A2 ECL Data Inputs A B0­B2 ECL Data Inputs B Q0­Q1 ECL Output 27 17 BUS2 28 16 VCC 15 Q1 BUSEN1, BUSEN2 ECL Bus Enables 14 VCCO BUS0­BUS2 ECL Bus Outputs RXEN ECL Receive Enable CLK1, CLK2 ECL Clock Input VCC, VCCO Positive Supply VEE Negative Supply GND Ground NC No Connect VEE 1 CLK1 2 CLK2 3 13 BUS1 A0 4 12 GND Pinout: 28-Lead PLCC (Top View) 5 6 7 B0 A1 B1 8 9 10 11 VCCO BUS0 GND Q0 * All VCC and VCCO pins are tied together on the die. Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. LOGIC DIAGRAM A0 B0 0 1 DQ 25 W CUTOFF D Q 0 A1 B1 DQ 25 W CUTOFF 1 D Q 0 A2 B2 DQ 50 W 25 W CUTOFF 1 D Q TEN1 TEN2 RXEN BUSEN1 BUSEN2 50 W DQ CLK1 CLK2 http://onsemi.com 2 50 W BUS0 Q0 BUS1 Q1 BUS2 Q2 MC10E336 MC10E336, MC100E336 MC100E336 MAXIMUM RATINGS (Note 1.) Symbol Parameter Condition 1 Condition 2 Rating Units VCC PECL Mode Power Supply VEE = 0 V 8 V VEE NECL Mode Power Supply VCC = 0 V ­8 V VI PECL Mode Input Voltage C ode u o age NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 ­6 V V Iout Output Current Continuous Surge 50 100 mA mA TA Operating Temperature Range Tstg Storage Temperature Range JA Thermal Resistance (Junction to Ambient) 0 LFPM 500 LFPM 28 PLCC 28 PLCC JC Thermal Resistance (Junction to Case) std bd 28 PLCC VEE PECL Operating Range NECL Operating Range Tsol Wave Solder VI VCC VI VEE 0 to +85 °C ­65 to +150 °C 63.5 43.5 °C/W °C/W 22 to 26 °C/W 4.2 to 5.7 ­5.7 to ­4.2 V V 265 °C