MAX9851/MAX9853 MAX9851/ MAX9853 MAX9851 MAX9851ETM T4877-6 MAX9853ETM - Datasheet Archive

 

Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs The MAX9851/MAX9853 are

 

19-3732; Rev 0; 9/05 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs The MAX9851/MAX9853 MAX9851/MAX9853 are single-chip, stereo audio CODECs designed to provide a complete audio solution for a GSM/GPRS/EDGE cell phone. The MAX9851/ MAX9851/ MAX9853 MAX9853 provide stereo DirectDriveTM headphone amplifiers, a mono receiver speaker amplifier, stereo Class D speaker amplifiers (MAX9851 MAX9851 only), stereo differential line outputs (MAX9853 MAX9853 only), microphone input amplifiers, plus flexible input selection and gain control. Two serial digital audio interfaces are included, one intended to accept voiceband data and the other accepting I2S data. The voiceband interface can be reconfigured as needed to act as a secondary I2S feed input-allowing multiple audio source mixing of ringer tones or other audio at different sample rates. A transducer/vibrator signal can be derived from digital audio. The stereo digital-to-analog converter (DAC) path includes filtering and mixing, programmable-gain amplifiers (PGA), soft muting, and optional voiceband digital filtering. The MAX9851/MAX9853 MAX9851/MAX9853 accept up to two digital audio inputs at different sample rates. All analog inputs have PGAs on the front end, allowing dynamic range optimization with a wide range of input sources. The stereo analog-to-digital converter (ADC) converts audio signals from either internal or external microphones or stereo line inputs. The microphone amplifiers have a programmable gain from 0 to 40dB to handle both amplified microphones and electret modules. In addition to a digital highpass filter to remove DC offset voltages, the ADC also features voiceband digital filtering. The digital audio interfaces support a variety of serial audio formats. The secondary serial audio interface has an independent supply voltage to allow integration into multiple supply systems. Control for volume levels, signal mixing, and operating modes is done through the I2C 2-wire interface. All circuitry is optimized for high PSRR. The MAX9851/ MAX9851/ MAX9853 MAX9853 use a thermally efficient, space-saving 48-pin thin QFN package (7mm x 7mm x 0.8mm) with an exposed pad. Applications GSM/GPRS/EDGE Cell Phones PDAs/SmartPhones Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. Features +1.7V to +3.3V (Digital) and +2.6V to +3.3V (Analog) Operation +2.6V to 5.5V Class D Speaker Amplifier Operation (Direct from Battery) Low 26mW Quiescent Power Consumption (Playback) High 98dB Power-Supply Rejection Ratio 8kHz to 48kHz Sample Rate (Replay and Record) Stereo 18-Bit ADC and DAC Low-Noise Stereo Microphone Inputs and Stereo Line Inputs Dual Source Digital Mixing (DAC) Selectable Voiceband Filter for Recording/Playback Modes Digital Filtering, Soft Mute, and Volume Control Low-Noise, High-PSRR Microphone Bias Generator Stereo DirectDrive Headphone Amplifier (2 x 50mW) Mono DirectDrive Handset Receiver Amplifier (1 x 105mW) Stereo Class D, Ultra-Low-EMI, Filterless Speaker Amplifier with Active Emissions Limiting (2 x 1.25W, 8) (MAX9851 MAX9851) Stereo Differential Line Output Amplifiers (MAX9853 MAX9853) Clickless/Popless Operation Flexible Shutdown Modes for Power Saving Comprehensive Headset Detection Ultra-Low Power Wake-Up on Headset Detection Ordering Information PART PIN-PACKAGE PKG CODE MAX9851ETM MAX9851ETM+* 48 TQFN-EP* (7mm x 7mm x 0.8mm) T4877-6 T4877-6 MAX9853ETM MAX9853ETM+ 48 TQFN-EP* (7mm x 7mm x 0.8mm) T4877-6 T4877-6 Note: All devices specified over the -40°C to +85°C temperature range. +Denotes lead-free package. *Future Product-contact factory for availability. *EP = Exposed pad. Pin Configurations and Selector Guide appear at end of data sheet. _ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX9851/MAX9853 MAX9851/MAX9853 General Description Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs MAX9851/MAX9853 MAX9851/MAX9853 Simplified Block Diagrams DVDD AND DVDDS2 1.7V TO 3.3V AVDD AND CPVDD 2.6V TO 3.3V PVDD 2.6V TO 5.5V MAX9851 MAX9851 SDOUTS1 SDINS1 BCLKS1 LRCLKS1 SDOUTS2 SDINS2 BCLKS2 LRCLKS2 DAC DIGITAL INTERFACE 1 MONO RECEIVER SPEAKER DAC DIGITAL FILTERING AND MIXERS ANALOG MIXERS LEFT SPEAKER ADC DIGITAL INTERFACE 2 RIGHT SPEAKER ADC INTERNAL MICROPHONE SDA I2C LEFT EXT MICROPHONE VIBRATOR CONTROLLER SCL RIGHT EXT MICROPHONE LINEIN LINEIN INTERNAL TRANSDUCER/VIBRATOR DVDD AND DVDDS2 1.7V TO 3.3V AVDD AND CPVDD 2.6V TO 3.3V MAX9853 MAX9853 SDOUTS1 SDINS1 BCLKS1 LRCLKS1 SDOUTS2 SDINS2 BCLKS2 LRCLKS2 DAC DIGITAL INTERFACE 1 MONO RECEIVER SPEAKER DAC DIGITAL FILTERING AND MIXERS ANALOG MIXERS LEFT LINE OUT ADC DIGITAL INTERFACE 2 RIGHT LINE OUT ADC INTERNAL MICROPHONE SDA SCL I2C LEFT EXT MICROPHONE VIBRATOR CONTROLLER RIGHT EXT MICROPHONE LINEIN LINEIN INTERNAL TRANSDUCER/VIBRATOR 2 _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs LRCLKS1, BCLKS1, SDOUTS1, SDINS1.-0.3V to DVDD + 0.3V LRCLKS2, BCLKS2, SDOUTS2, SDINS2 .-0.3V to DVDDS2 + 0.3V Short Circuit to AGND Duration: HPL, HPR, REC .Continuous LSPK+, LSPK-, RSPK+, RSPK- .Subject to Maximum Package Power Dissipation INTMICBIAS, EXTMICBIASL, EXTMICBIASR.Continuous Short Circuit to AVDD Duration EXTMICBIASL, EXTMICBIASR .Continuous Current Into/Out of Any Pin (unless otherwise noted).100mA Continuous Power Dissipation (TA = +70°C) 48-Pin Thin QFN (derate 40mW/°C above +70°C) .3200mW Junction Temperature .+150°C Operating Temperature Range .-40°C to +85°C Storage Temperature Range .-65°C to +150°C Lead Temperature (soldering, 10s) .+300°C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Analog Supply Voltage AVDD, CPVDD AVDD = CPVDD, no load 2.6 3.3 V Digital Supply Voltage DVDD, DVDDS2 No load 1.7 3.3 V PVDD No load 2.6 5.5 V Speaker Supply Voltage Stereo headphone DAC playback mode, no output loads (Note 1) 7.2 Stereo speaker (MAX9851 MAX9851)/line output (MAX9853 MAX9853) 6.5 Mono receiver Analog Supply Current AIDD Line only playback mode, no output loads 6.4 Stereo headphone 5.0 Stereo speaker (MAX9851 MAX9851)/line output (MAX9853 MAX9853) 4.6 Mono receiver 7.2 Stereo speaker (MAX9851 MAX9851)/line output (MAX9853 MAX9853) 6.4 Mono receiver mA 4.4 Stereo headphone DAC plus line input playback mode, no output loads (Note 1) 8.5 6.3 _ 3 MAX9851/MAX9853 MAX9851/MAX9853 ABSOLUTE MAXIMUM RATINGS (Voltages with respect to AGND) AVDD, DVDD, DVDDS2, CPVDD .-0.3V to +4V PVSS, SVSS .-4V to +0.3V PVDD .-0.3V to +6V AGND, DGND, CPGND, PGND.-0.3V to +0.3V HPL, HPR, REC .(SVSS - 0.3V) to (AVDD + 0.3V) LSPK+, LSPK-, RSPK+, RSPK- .-0.3V to (PVDD + 0.3V) LINEIN1, LINEIN2.-2V to +2V EXTMICBIASL, EXTMICBIASR.-0.3V to (AVDD + 0.3V) INTMICP, INTMICN, EXTMICL, EXTMICR .-2V to +2V EXTMICGND.-0.3V to +0.3V C1N.(PVSS - 0.3V) to (CPGND + 0.3V) C1P.(CPGND - 0.3V) to (CPVDD + 0.3V) PREG, REF, MBIAS, INTMICBIAS.-0.3V to (AVDD + 0.3V) NREG .+0.3V to (SVSS - 0.3V) OUTL+, OUTL-, OUTR+, OUTR-, FAULTIN.-0.3V to (AVCC + 0.3V) MCLK, IRQ, VIBE, SCL, SDA.-0.3V to +4V SHDNOUT .-0.3V to +6V MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs ELECTRICAL CHARACTERISTICS (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP Stereo headphone Full-duplex voice mode, no output loads Stereo speaker (MAX9851 MAX9851)/line output (MAX9853 MAX9853) AIDD Full-duplex voice mode plus DAC playback mode, no output loads (Notes 1, 2) 11.1 Stereo headphone 11.9 Stereo speaker (MAX9851 MAX9851)/line output (MAX9853 MAX9853) 11.2 Mono receiver 11.1 14.5 mA ADC record mode (Note 3) 12.2 ADC record mode plus DAC headphone playback mode (Notes 1, 3) 18.2 24.0 Mono Class D speaker mode PIDD 5 Stereo Class D speaker mode 10 14 Sleep mode (MAX9851 MAX9851, MAX9853 MAX9853) Speaker Supply Current (Note 4) 15 2.7 Full duplex voice operation (Note 2), no output loads, TA = +25°C 6.2 7.8 3.9 mA 3.7 Record operation (Notes 1, 3) DIDD 2 Playback operation (Note 1), no output loads Digital Supply Current UNITS 11.2 Mono receiver Analog Supply Current MAX 11.9 µA 5.2 mA Analog Shutdown Current AISHDN IAVDD + ICPVDD, TA = +25°C 1.4 20 µA Digital Shutdown Current DISHDN IDVDD + IDVDDS2 , TA = +25°C 0.5 10 µA PVDD Shutdown Current (Note 4) PISHDN IPVDD, TA = +25°C MAX9851 MAX9851 0.1 10 MAX9853 MAX9853 0.1 5 Shutdown to Full Operation tON ADC and DAC fully operational, master mode 70 µA ms DAC PERFORMANCE (Note 5) (DAC in Master Mode) Gain Error ±1 Channel Gain Matching ±1 fS = 8kHz (voice modes), headphone volume = +5.5dB Dynamic Range (Note 6) % % 75.5 DR dB fS = 8kHz and 48kHz (stereo audio modes), headphone volume = +5.5dB 4 ±7 84 87.5 _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP Signal-to-Noise Ratio (Note 7) fIN = 1kHz, fS = 48kHz, 0dBFS (ADC and headphone output enabled, no load), headphone volume = +2.5dB THD+N MAX -84.5 75.5 dB SNR dB fIN = 1kHz, fS = 8kHz to 48kHz (stereo audio modes), headphone volume = +2.5dB Crosstalk XTALK Power-Supply Rejection Ratio PSRR UNITS -71.5 fIN = 1kHz, fS = 8kHz and 16kHz (voice modes), headphone volume = +2.5dB Total Harmonic Distortion Plus Noise fIN = 1kHz, fS = 8kHz, 0dBFS (voice mode master mode, ADC and headphone output enabled, no load), headphone volume = +2.5dB 88 Driven channel at -1dBFS, fIN = 1kHz, fS = 8kHz, headphone output (no load) -95 f = 217Hz, VRIPPLE = 100mVP-P 95 f = 10kHz, VRIPPLE = 100mVP-P 68 dB dB DAC DIGITAL FILTERS Passband Cutoff fPD Passband Ripple 0.44 fS f < fPD Stopband Cutoff ±0.2 0.58 fSD Stopband Attenuation f > fSD dB fS 60 Attenuation at fS / 2 dB -6.02 dB DAC VOICEBAND HIGHPASS FILTER (S1 Mono Voice Input Path, fS = 8kHz, Register 0x07 bit 4 = 1) Passband Cutoff fPH Passband -3dB Cutoff 175 fP3_H 130 Hz ±0.2 dB Passband Ripple f > fPH Stopband Cutoff fSH Stopband Attenuation Hz 77 f < fSH Hz 28 dB DAC VOICEBAND HIGHPASS FILTER (S1 Mono Voice Input Path, fS = 16kHz, Register 0x07, bit 4 = 1) Passband Cutoff fPH Passband -3dB Cutoff 350 fP3_H 260 Hz ±0.2 dB Passband Ripple f > fPH Stopband Cutoff fSH Stopband Attenuation Hz 154 f < fSH Hz 28 dB DAC VOICEBAND LOWPASS FILTER (S1 Mono Voice Input Path, fS = 8kHz) Passband Cutoff fPL Passband Ripple 3500 f < fPL Stopband Cutoff f > fSL 75 dB 3900 fSL Stopband Attenuation Hz ±0.05 Hz dB _ 5 MAX9851/MAX9853 MAX9851/MAX9853 ELECTRICAL CHARACTERISTICS (continued) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs ELECTRICAL CHARACTERISTICS (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ±0.05 dB DAC VOICEBAND LOWPASS FILTER (S1 Mono Voice Audio Input Path, fS = 16kHz) Stopband Cutoff fPL Passband Ripple Stopband Cutoff 7000 Hz f < fPL fSL Stopband Attenuation 7800 f > fSL 75 Hz dB DAC ADJUSTABLE HIGHPASS FILTER DC Attenuation DCATT Register 0x07 bits [3:0] = 0x5, 0xA, or 0xF 90 dB Register 0x07 [3:0] = 0x5 fP 91 Register 0x07 [3:0] = 0xA 171 279 Register 0x07 [3:0] = 0xF Highpass Cutoff (-3dB) 55 327 533 -96 0 Hz DAC INPUT GAIN CONTROL (Register 0x0C and 0x0D) Gain Control Range For both input data interfaces dB ADC DC ACCURACY Gain Error Full-Scale Conversion ±1 0dBFS fIN = 1kHz, line input, PGA = 0dB ±7 % 2.05 ±1 Channel Gain Matching VP-P % ADC DYNAMIC SPECIFICATIONS (Note 8) BW = 22Hz to fS / 2 (8kHz voice modes) Dynamic Range (Note 6) DR BW = 22Hz to 20kHz (48kHz stereo audio modes, A-weighted) 73 75 TA = +25°C 77 82 TA = TMIN to TMAX 71 BW = 22Hz to fS / 2 (8kHz audio mode) Channel Crosstalk Power-Supply Rejection Ratio (Note 9) -85.5 75 1kHz, 0dBFS, fS = 48kHz (stereo audio mode, A-weighted) 81.5 87.5 Driven channel at -1dBFS, fIN = 1kHz, fS = 48kHz (from MICL to ADCR or MICR to ADCL) SNR 1kHz, 0dBFS, fS = 48kHz (stereo audio mode) 1kHz, 0dBFS, fS = 8kHz (stereo audio mode, A-weighted) Signal-to-Noise Ratio THD -85.5 1kHz, 0dBFS, fS = 8kHz (voice mode) Total Harmonic Distortion -85.5 1kHz, 0dBFS, fS = 8kHz (voice mode) -75 AVDD = 2.6V to 3.3V PSRR 48 dB dB dB 63 f = 217Hz, VRIPPLE = 100mVP-P 63 f = 10kHz, VRIPPLE = 100mVP-P 6 dB 50 _ dB Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ±0.5 dB 0.58 fS ADC DIGITAL FILTER PATH (Stereo Audio Modes) Passband Cutoff fPBL Passband Ripple 0.44 fS f < fPBL Stopband Cutoff fSBL Stopband Attenuation f > fSBL 53 Attenuation at fS/2 dB -6.02 dB ADC VOICEBAND HIGHPASS FILTER (S1 Mono Voice Input Path, fS = 8kHz) Passband Cutoff fPH Passband -3dB Cutoff 175 fP3_H 130 Hz ±0.2 dB Passband Ripple f > fPH Stopband Cutoff fSH Stopband Attenuation Hz 77 f < fSH Hz 28 dB ADC VOICEBAND HIGHPASS FILTER (S1 Mono Voice Input Path, fS = 16kHz) Passband Cutoff fPH Passband -3dB Cutoff 350 fP3_H 260 Hz ±0.2 dB Passband Ripple f > fPH Stopband Cutoff fSH Stopband Attenuation Hz 154 f < fSH Hz 28 dB ADC VOICEBAND LOWPASS FILTER (S1 Mono Voice Input Path, fS = 8kHz) Passband Cutoff fPL Passband Ripple 3500 Hz f < fPL Stopband Cutoff ±0.05 3900 fSL Stopband Attenuation f > fSL dB Hz 75 dB 7000 Hz ADC VOICEBAND LOWPASS FILTER (S1 Mono Voice Input Path, fS = 16kHz) Passband Cutoff fPL Passband Ripple f < fPL Stopband Cutoff ±0.05 Stopband Attenuation f > fSL dB 7800 fSL Hz 75 dB ADC DC-BLOCKING FILTER As a fraction of output sample rate DC Attenuation Maximum DC Input Hz 120 fC fS / 1608 dB 0.125 DC-Blocking Filter -3dB Corner V DAC/ADC DATA RATE ACCURACY LRCLK Output Sample Rate Deviation From Ideal (Note 10) fS = 8kHz to 48kHz (master mode with DAC only enabled) (See Table 1 for details) -0.025 +0.025 % _ 7 MAX9851/MAX9853 MAX9851/MAX9853 ELECTRICAL CHARACTERISTICS (continued) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs ELECTRICAL CHARACTERISTICS (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DAC/ADC DATA RATE ACCURACY fS = 8kHz (voice mode) 0 fS = 16kHz (voice mode) 0 fS = 8kHz Master mode with ADC SDOUT enabled; audio mode, unless otherwise noted LRCLK Output Sample Rate Deviation From Ideal (Note 10) 0.31 fS = 11.025kHz 0.27 fS = 12kHz 0.31 fS = 16kHz -0.43 fS = 22.05kHz -0.41 fS = 24kHz 0.31 fS = 32kHz -0.43 fS = 44.1kHz -1.74 fS = 48kHz % -0.43 Synchronous or asynchronous input (slave mode with only DAC enabled) LRCLK Input Sample Rate Range 7.8 50 kHz 11 steps in 6dB increments -30 +30 dB DAC TRANSDUCER/VIBE OUTPUT Vibe PGA Range TGAIN 0dBFS Output Voltage 1-bit DAC output externally filtered pullup resistor to DVDD (TGAIN = 0dB) DVDD / 2 VP-P Output Offset Voltage 1-bit DAC output externally filtered, no signal, pullup resistor to DVDD DVDD / 2 V 10 bits Vibe PGA Output Resolution PGAR fS = 8kHz, 16kHz, or 32kHz fPBL fS = 11.025kHz, 22.05kHz, or 44.1kHz 665 fS = 12kHz, 24kHz, or 48kHz LPF Passband -3dB Cutoff 483 724 LPF Stopband Attenuation fSBL f > 3.5xfPBL 1-Bit DAC Digital Dynamic Range DRV Ideal dynamic range (0 to 8kHz or 0 to fS / 2 for fS < 16kHz) 1-Bit DAC Operating Frequency Hz 27 dB dB 650 fV 48 kHz OPEN-DRAIN DIGITAL OUTPUT (VIBE) Output High Current IOH VOUT = DVDD Output Low Voltage VOL IOL = 3mA 8 _ 3 µA 0.4 V Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS HEADPHONE AMPLIFIERS Output Power POUT f = 1kHz, THD < 1%, volume +5.5dB RL = 16 80 RL = 32 55 3.14 3.38 3.62 Stereo/mono 1.54 1.66 1.78 Balanced mono 3.1 3.35 3.6 10 40 0dBFS Output Voltage +4.5dB volume setting, input is full-scale signal from the audio DAC Line In to HP Out Voltage Gain +4.5dB volume setting Output Offset Voltage Total Harmonic Distortion Plus Noise Dynamic Range VOS RL = 32, POUT = 50mW, f = 1kHz, BW = 22Hz to 20kHz RL = 16, POUT = 60mW, f = 1kHz, BW = 22Hz to 20kHz VP-P V/V mV 0.03 0.03 THD+N % +5.5dB volume setting (DAC input to HP output), A-weighted 70 AVCC = 2.6V to 3.6V DR Power-Supply Rejection Ratio (DAC Input to HP Out) mW 30 60 87.5 dB 95 dB Maximum Capacitive Load Channel Gain Matching Click-and-Pop Level AVMATCH KCP 95 68 No sustained oscillations 150 pF RL = 32, POUT = 1.6mW, f = 1kHz CL Crosstalk (Line Input to Headphone Output) VRIPPLE = 100mVP-P, f = 217Hz VRIPPLE = 100mVP-P, f = 10kHz PSRR -85 dB Line input to headphone output ±1 % Peak voltage, 32samples per second, A-weighted, RL = 32 (Note 11) Into shutdown, HP disabled -53 Out of shutdown, HP enabled -48 dBV SPEAKER AMPLIFIERS (MAX9851 MAX9851) (Note 12) PVDD = 3.3V, THD+N < 1% POUT 0dBFS Output Voltage PVDD = 5V, THD+N < 1% RL = 4 1750 RL = 8 1150 PVDD = 3.3V, THD+N < 10% RL = 4 1000 RL = 8 600 PVDD = 5V, THD+N < 10% Output Power f = 1kHz, 2VP-P line input, +13.1dB speaker amp volume setting RL = 4 RL = 4 2100 RL = 8 +2.1dB volume setting RL = 8 750 300 500 mW 1250 8.0 8.4 8.8 VP-P _ 9 MAX9851/MAX9853 MAX9851/MAX9853 ELECTRICAL CHARACTERISTICS (continued) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs ELECTRICAL CHARACTERISTICS (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL Line In to Speaker Out Voltage Gain Output Offset Voltage Total Harmonic Distortion Plus Noise Dynamic Range CONDITIONS MAX UNITS 4.0 4.2 4.4 V/V 100 mV VOS RL = 8, POUT = 125mW, f = 1kHz, BW = 22Hz to 20kHz, +10.1dB volume setting 0.03 RL = 4, POUT = 125mW, f = 1kHz, BW = 22Hz to 20kHz, +10.1dB volume setting 0.06 THD+N DR % +12.1dB volume setting, A-weighted PVDD = 2.6V to 5.5V Power-Supply Rejection Ratio TYP 10 +12.1dB volume setting MIN PSRR 90 50 Channel Gain Matching VRIPPLE = 100mVP-P, f = 217Hz 55 RL = 8, POUT = 100mW, f = 1kHz 60 AVMATCH dB ±4 % 1100 Class D Switching Frequency Click-and-Pop Level dB 70 VRIPPLE = 100mVP-P, f = 10kHz Crosstalk dB 70 kHz Efficiency -35 POUT = 1W per channel, RL = 4 KCP Peak voltage, 32Into shutdown samples per second, A-weighted Out of shutdown RL = 8 (Note 11) POUT = 1W per channel, RL = 8 70 -35 dBV 75 % LINE OUTPUT AMPLIFIERS (MAX9853 MAX9853) (Note 12) Line Output Common-Mode Voltage 1.13 Line Output Differential Offset Voltage -90 Maximum Differential Output Voltage 3.16 Dynamic Range DR Total Harmonic Distortion Plus Noise THD+N Power-Supply Rejection Ratio PSRR 1.4mVRMS (-60dB) output voltage, A-weighted 10 mV 4.74 VP-P 0.004 57 dB % 100 VRIPPLE = 100mVP-P, f = 217Hz dB 95 VRIPPLE = 100mVP-P, f = 20kHz Line Input to Line Output Gain Accuracy V +90 4.16 1.33 88 fIN = 1kHz, VOUT = 2VP-P, BW = 22Hz to 20kHz AVDD = 2.6V to 3.6V 1.23 55 -0.4 _ +0.6 dB Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RECEIVER AMPLIFIER (Note 12) RL = 16, input signal from LINEIN1 Output Power POUT f = 1kHz, THD < 1%, +5.5dB volume setting 80 RL = 16, input signal is the sum of LINEIN1+LINEIN2 105 RL = 32, input signal from LINEIN1 35 mW 55 Maximum Output Voltage +4.5dB volume setting, 0dB PGA setting, input signal 0dBFS from DAC output, only 1 input selected 3.09 3.35 3.64 VP-P Line In to REC Out Voltage Gain +4.5dB volume setting, 0dB PGA setting, only 1 input selected 1.54 1.68 1.82 V/V 10 60 mV Output Offset Voltage Total Harmonic Distortion Plus Noise Dynamic Range VOS RL = 32, POUT = 40mW, f = 1kHz, BW = 22Hz to 20kHz, +3dB volume setting % RL = 16, POUT = 40mW, f = 1kHz, BW = 22Hz to 20kHz, +3dB volume setting DR PSRR 0.04 +6dB volume setting, A-weighted AVDD = 2.6V to 3.3V Power-Supply Rejection Ratio 0.03 THD+N 92 60 VRIPPLE = 100mVP-P, f = 217Hz dB 100 98 dB VRIPPLE = 100mVP-P, f = 20kHz Maximum Capacitive Load Click-and-Pop Level CL KCP 65 No sustained oscillations 150 pF Peak voltage, 32 samples per second, A-weighted, RL = 16 (Note 11) 44.6 dBV VOLUME CONTROL/PGAs Headphone/Receiver Volume Control Range Headphone/Receiver Mute Attenuation -65.9 +13.6 -78.4 f = 1kHz dB dB +7.9 100 dB dB 100 f = 1kHz Differential Line Output Gain Control Range (MAX9853 MAX9853) Differential Line Output Mute Attenuation (MAX9853 MAX9853) 100 f = 1kHz Speaker Volume Control Range (MAX9851 MAX9851) Speaker Mute Attenuation (MAX9851 MAX9851) +6.1 -80 dB dB _ 11 MAX9851/MAX9853 MAX9851/MAX9853 ELECTRICAL CHARACTERISTICS (continued) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs ELECTRICAL CHARACTERISTICS (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS Sidetone Volume Control Range MIN TYP Sidetone Mute Attenuation UNITS +30.5 -34.0 f = 1kHz, sidetone deselected from input mixer MAX dB 80 dB CHARGE PUMP Charge-Pump Oscillator Frequency 295 fOSC 650 1200 kHz MICROPHONE AMPLIFIERS Preamplifier Gain MIC PGA Gain AVPRE AVMICPGA MIC Mute Attenuation Common-Mode Rejection Ratio EXTMIC_ AVPRE = +20dB +18.5 +20.5 AVPRE = +20dB -0.9 +0.4 PGA gain = 0dB PGA gain = +20dB -0.9 +0.4 +18.5 +20.5 dB dB f = 1kHz CMRR 105 dB EXTMIC_, VIN = 100mVP-P at 217Hz, AVPRE = +20dB 80 dB INTMIC_, EXTMIC_ MIC Input Voltage Range EXTMICGND -1 +1 -0.1 +0.1 V MIC Input Resistance RIN_MIC INTMIC_, EXTMIC_ 30 50 70 k MIC GND Sense Input Resistance RIN_MICS EXTMICGND 15 25 36 k MIC Input Resistance Matching RMATCH INTMICP to INTMICN or EXTMICL to EXTMICR VCML Measured at INTMIC_, EXTMIC_, and EXTMICGND MIC Input Bias Voltage Input Voltage Noise EIN_MIC 0.3 -0.1 f = 1kHz, AVPRE = +20dB, RSOURCE = 0 0 25 AVPRE = 0dB, AVMICPGA = 0dB, VIN = 2VP-P, f = 1kHz, BW = 22Hz to 20kHz THD+N AVPRE = +20dB, AVMICPGA = 0dB, VIN = 200mVP-P, f = 1kHz, BW = 22Hz to 20kHz 0.035 +0.1 V nV/Hz 0.035 AVPRE = +20dB, AVMICPGA = +20dB, VIN = 20mVP-P, f = 1kHz, BW = 22Hz to 20kHz Total Harmonic Distortion Plus Noise % 0.06 AVDD = 2.6V to 3.3V, TA = +25°C 12 PSRR 65 dB VRIPPLE = 100mVP-P at 217Hz, output referred 65 dB VRIPPLE = 100mVP-P at 10kHz, output referred MIC Power-Supply Rejection Ratio 48 % 65 dB _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2.3 2.4 2.5 V 0.7 10 MICROPHONE BIAS INTMICBIAS Output Voltage VMICBIAS INTMICBIAS Load Regulation IMICBIAS = 0 to 2mA INTMICBIAS Minimum Capacitive Load 1 To AGND INTMICBIAS Power-Supply Rejection Ratio PSRR 15 mA AVDD = 2.6V to 3.3V, TA = +25°C INTMICBIAS Short-Circuit Current µF 72 dB EXTMICBIAS_ Output Impedance VNOISE REXTMIC EXTMICBIAS_ Off-Impedance 85 dB VRIPPLE = 100mV at 10kHz INTMICBIAS Noise Voltage VRIPPLE = 100mV at 217Hz 70 dB f = 22Hz to 20kHz 2.8 µVRMS f = 1kHz 20 nV/Hz 2.2k setting 2.00 2.42 k 470 setting 425 515 VEXTMICBIAS_ = 0 to 3.0V 1 2 M 2 VP-P 20 k ±1 % LINE INPUT (Note 13) Line Input Maximum Input Voltage Line Input Resistance Line Channel-to-Channel Gain Matching RIN 10 AVMATCH PGA Gain Range -34.0 +30.5 dB HEADSET AUTO-DETECT (Normal Operation) MIC Sense High Threshold VTH1 MIC bias and bias resistor enabled 0.92 x 0.95 x 0.98 x VMICBIAS VMICBIAS VMICBIAS V MIC Sense Low Threshold VTH2 MIC bias and bias resistor enabled 0.06 x 0.1 x 0.17x VMICBIAS VMICBIAS VMICBIAS V MIC Sense Deglitch Period tGLITCH Pulses shorter than tGLITCH1 are eliminated 20 ms Headphone Sense Current ISENSE VHPL / VHPR = AGND (headphones disabled) 3.4 HPR/HPL (headphone amplifiers disabled) AVDD Headphone Sense Voltage Headphone Sense Threshold VSENSE Test 2 (HPTEST = 1) - HPR only µA V 0 0.74 x AVDD VTH3 5 0.73 x AVDD 0.82 x AVDD V 3 10 µA SLEEP MODE (AVCC = 0V or 3V) MIC Sense Current IMIC MIC Sense Voltage VMIC MIC Sense Sleep Threshold VTH4 EXTMICBIASL = AGND PVDD Voltage at EXTMICBIASL 0.9 2 V 2.7 V _ 13 MAX9851/MAX9853 MAX9851/MAX9853 ELECTRICAL CHARACTERISTICS (continued) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs TIMING CHARACTERISTICS (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INPUT CLOCK CHARACTERISTICS MCLK Input Frequency fMCLK 13 / 26 MCLK Duty Cycle 45 Maximum allowable RMS for performance limits Maximum MCLK Jitter 50 MHz 55 100 % psRMS DIGITAL INPUTS (BCLKS_, LRCLKS_, SDINS_, MCLK, SDA, SCL, FAULTIN) Input-Voltage High Input-Voltage Low 0.7 x DVDD VIH VIL 0.3 x DVDD Input Hysteresis Input Leakage Current V 200 IIH, IIL FAULTIN Input Low Leakage Current (MAX9853 MAX9853) IIL FAULTIN Input High Leakage Current (MAX9853 MAX9853) -3 V mV +3 30 Input Capacitance µA 3 IIH FAULTIN has internal pullup resistor µA µA 10 pF CMOS DIGITAL OUTPUTS (BCLKS_, LRCLKS_, SDOUTS_) Output Low Voltage VOL IOL = 3mA Output High Voltage VOH 0.4 IOH = 3mA DVDD 0.4 V V DIGITAL AUDIO INTERFACE TIMING CHARACTERISTICS (Digital Audio Interface S1 and S2) BCLK Cycle Time tBCLKS Slave operation 75 ns tBCLKM Master operation BCLK High Time tBCLKH Slave operation 30 ns BCLK Low Time tBCLKL Slave operation 30 ns BCLK_ or LRCLK_ Rise and Fall Time tr, tf Master operation, CL = 15pF SDIN_ or LRCLK_ to BCLK_ Rising Set-Up Time tSU BCI = 0 (see I C register definition) SDIN_ or LRCLK_ to BCLK_ Rising Hold Time tHD BCI = 0 (see I C register definition) SDOUTS1 Delay Time tDLY BCI = 0 (see I C register definition), CL = 30pF SDOUTS2 Delay Time tDLY 308 BCI = 0 (see I C register definition), CL = 30pF ns 7 ns 2 30 ns 2 5 ns 2 35 ns 50 ns 2 14 _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VOICE MODE TIMING CHARACTERISTICS (Digital Audio Interface S1 and S2) BCLK_ Cycle Time tBC 75 ns BCLK_ High Time tBH 30 ns BCLK_ Low Time tBL 30 ns BCLK_ or LRCLK_ Rise and Fall Time tr, tf Master mode, CLOAD = 15pF SDIN_ or LRCLK_ to BCLK_ Rising Edge Setup Time tSU BCI = 0 (see I2C register definition) 30 ns SDIN_ or LRCLK_ to BCLK_ Rising Edge Hold Time tHD BCI = 0 (see I2C register definition) 5 ns SDOUTS1 Delay Time tDLY BCI = 0 (see I2C register definition), from BCLK rising edge 35 ns SDOUTS2 Delay Time tDLY BCI = 0 (see I2C register definition), from BCLK rising edge 50 ns 3 µA 7 ns OPEN-DRAIN DIGITAL OUTPUTS (SDA, IRQ) Output High Current IOH VOUT = DVDD IOL = 3mA for DVDD > 2V Output Low Voltage VOL 0.4 IOL = 3mA for DVDD < 2V 0.2 x DVDD V OPEN-DRAIN DIGITAL OUTPUT (SHDNOUT) (MAX9853 MAX9853 Only) Output High Current IOH VOUT = DVDD Output Low Voltage VOL IOL = 100µA 3 µA 0.4 V 400 kHz I2C TIMING CHARACTERISTICS Serial Clock Frequency fSCL 0 Bus Free Time Between STOP and START Conditions tBUF 1.3 µs Hold Time (Repeated) START Condition tHD,STA 0.6 µs SCL Pulse Width Low tLOW 1.3 µs SCL Pulse Width High tHIGH 0.6 µs tSU,STA 0.6 µs Setup Time for a Repeated START Condition _ 15 MAX9851/MAX9853 MAX9851/MAX9853 TIMING CHARACTERISTICS (continued) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs TIMING CHARACTERISTICS (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = 10k, ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CNREG = CPREG = CINTMICBIAS, CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.1dB, line output gain = -0.4dB, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (See Functional Diagrams/Typical Operating Circuits). PARAMETER SYMBOL CONDITIONS MIN tHD,DAT Data Setup Time tSU,DAT TYP 0 MAX UNITS 900 Data Hold Time ns 100 ns SDA and SCL Receiving Rise Time tr (Note 14) 20+0.1Cb 300 ns SDA and SCL Receiving Fall Time tf (Note 14) 20+0.1Cb 300 ns DVDD = 1.8V (Note 14) 20+0.1Cb 250 SDA Transmitting Fall Time tf ns DVDD = 3.3V (Note 14) Setup Time for STOP Condition tSU,STO Bus Capacitance tSP Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: Note 13: Note 14: 16 250 0.6 Cb Pulse Width of Suppressed Spike 20+0.05Cb µs 400 0 pF 50 ns DAC playback mode is defined as clocking all zeros into the DAC which operates in stereo audio mode at the 48kHz sample rate in master mode. Full-duplex voice mode is defined as operating the DAC and ADC in mono 8kHz voice mode with line inputs, microphone inputs, and an analog output enabled. Record operation is defined as operating the stereo ADC with the stereo external microphone inputs enabled at the 48kHz sample rate in master mode. Speaker output available only on the MAX9851 MAX9851. PVDD powers only the headset autodetect circuitry when in sleep mode on the MAX9853 MAX9853. DAC performance measured at headphone outputs. Dynamic range measured using the EIAJ method. The input is applied at -60dBFS, fIN = 1kHz. The THD+N referred to 0dBFS A-weighted. The SNR is referred to 0dBFS A-weighted. ADC performance measured from line inputs (unless otherwise noted). Microphone amplifiers connected to ADC, mic inputs AC-grounded. In master-mode operation, sample clock rate is proportional to MCLK input. Speaker amplifier testing performed with 8 resistive load in series with a 68µH inductive load connected across BTL outputs. Headphone and receiver amplifier testing performed with 32 resistive load connected to GND. Mode transitions are controlled by toggling the amplifier on and off using the corresponding enable bit. Units expressed in dBV. Input signal for speaker, line output, and receiver output performance measured using line inputs. Line input specifications measured from line inputs to line outputs. CB is in pF. _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs MAX9851/MAX9853 MAX9851/MAX9853 TYPICAL POWER DISSIPATION (No Output Load) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +2.7V.) MODE OUTPUT AMPLIFIER TOTAL POWER (mW) Stereo headphone 27 Stereo speaker 55 Mono receiver DAC playback mode operating at 48kHz sampling rate 24 Stereo headphone 16 Stereo speaker 44 Mono receiver Line-only playback mode 14 Stereo headphone 27 Stereo speaker 55 Mono receiver DAC and line input playback mode operating at 48kHz sampling rate 25 Stereo headphone 48 Stereo speaker 76 Mono receiver 8kHz voice mode with mono DAC, mono ADC, line inputs and a mono microphone enabled 46 Stereo headphone 53 Stereo speaker 81 Mono receiver 51 ADC record mode with stereo microphone and line inputs enabled - 46 ADC record and stereo playback with stereo microphone and stereo headphones - 57 8kHz voice mode and 48kHz stereo audio mode with stereo DAC, mono ADC, line inputs and a mono microphone enabled Typical Operating Characteristics (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) 10kHz 0.1 0.01 1kHz 1 10kHz 0.1 0.01 0.001 10 20 30 40 10 10kHz 1 1kHz 0.1 20Hz 20Hz 0.001 0 RECEIVER GAIN = +5.5dB RL = 32 AVDD = 3.0V 0.01 1kHz 20Hz 100 THD+N (%) THD+N (%) THD+N (%) 1 HP GAIN = +5.5dB RL = 16 AVDD = 3.0V 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO RECEIVER) MAX9851/53 MAX9851/53 toc02 HP GAIN = +5.5dB RL = 32 AVDD = 3.0V 10 100 MAX9851/53 MAX9851/53 toc01 100 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HP) MAX9851/53 MAX9851/53 toc03 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HP) 50 OUTPUT POWER (mW) 60 70 0.001 0 20 40 60 80 OUTPUT POWER (mW) 100 120 0 20 40 60 80 100 120 OUTPUT POWER (mW) _ 17 Typical Operating Characteristics (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER AMP) 10 THD+N (%) THD+N (%) 1 0.1 1kHz 1 10kHz 20Hz 0.1 20Hz 0 20 40 60 80 0.1 1kHz 0.001 0 100 120 140 160 20Hz 10kHz 0.01 0.001 0.001 1 1kHz 0.01 0.01 SPEAKER AMP GAIN = +13.1dB RL = 4 + 33µH PVDD = 3.3V MAX9851 MAX9851 10 THD+N (%) SPEAKER AMP GAIN = +13.1dB RL = 8 + 68µH PVDD = 3.3V MAX9851 MAX9851 10kHz 100 MAX9851/53 MAX9851/53 toc05 RECEIVER GAIN = +5.5dB RL = 16 AVDD = 3.0V 10 100 MAX9851/53 MAX9851/53 toc04 100 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER AMP) MAX9851/53 MAX9851/53 toc06 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO RECEIVER) 200 400 800 600 0 250 500 750 1000 1250 OUTPUT POWER (mW) OUTPUT POWER (mW) OUTPUT POWER (mW) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER AMP) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER AMP) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HP) MAX9851/53 MAX9851/53 toc09 SPEAKER AMP GAIN = +13.1dB RL = 4 + 33µH PVDD = 5.0V MAX9851 MAX9851 10 10 MAX9851/53 MAX9851/53 toc08 SPEAKER AMP GAIN = +13.1dB RL = 8 + 68µH PVDD = 5.0V MAX9851 MAX9851 10 100 MAX9851/53 MAX9851/53 toc07 100 HP GAIN = +5.5dB RL = 16 AVDD = 3.0V 20Hz 10kHz 0.1 20Hz 1 72mW THD+N (%) THD+N (%) THD+N (%) 1 1 10kHz 0.1 20mW 0.1 1kHz 0.01 1kHz 0.01 60mW 0.01 0.001 0.001 0 500 1000 0 1500 500 1000 1500 2000 2500 10 3000 100 1k 10k 100k OUTPUT POWER (mW) OUTPUT POWER (mW) FREQUENCY (Hz) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HP) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO RECEIVER) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO RECEIVER) RECEIVER GAIN = +5.5dB RL = 16 AVDD = 3.0V RECEIVER GAIN = +5.5dB RL = 32 AVDD = 3.0V 1 THD+N (%) THD+N (%) 1 0.1 20mW 32mW 0.1 0.1 0.01 MAX9851/53 MAX9851/53 toc12 10 MAX9851/53 MAX9851/53 toc11 HP GAIN = +5.5dB RL = 32 AVDD = 3.0V 1 10 MAX9851/53 MAX9851/53 toc10 10 THD+N (%) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs 20mW 52mW 40mW 60mW 0.001 10 100 1k FREQUENCY (Hz) 18 0.01 0.01 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) _ 10k 100k Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs SPEAKER AMP GAIN = +13.1dB PVDD = 3.3V MAX9851 MAX9851 1 10 VOUT = 2VP-P RL = 10k fS = 48kHz MAX9853 MAX9853 4 700mW 4 200mW 0.1 THD+N (%) 4, 1.6W 1 THD+N (%) THD+N (%) 1 4, 0.5W 0.1 0.1 0.01 8 200mW 0.01 10 100 1k 10k 100k RIGHT LEFT 8 430mW 8, 0.2W 8, 1W MAX9851/53 MAX9851/53 toc15 SPEAKER AMP GAIN = +13.1dB PVDD = 5.0V MAX9851 MAX9851 MAX9851/53 MAX9851/53 toc14 10 MAX9851/53 MAX9851/53 toc13 10 0.01 10 100 1k 10k 100k 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE IN TO ADC) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (INTERNAL MIC TO ADC) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (INTERNAL MIC TO ADC) 1 MIC GAIN = 0dB 8kHz VOICE MODE MIC GAIN = 40dB 0.1 ADC INPUT VOLTAGE = 2VP-P (0dBFS) 48kHz NONVOICE MODE 1 THD+N (%) 0.1 10 MAX9851/53 MAX9851/53 toc18 ADC INPUT VOLTAGE = 2VP-P (0dBFS) 8kHz VOICE MODE THD+N (%) THD+N (%) 1 10 MAX9851/53 MAX9851/53 toc17 ADC INPUT VOLTAGE = 2VP-P (0dBFS) MAX9851/53 MAX9851/53 toc16 10 MIC GAIN = 40dB 0.1 MIC GAIN = 20dB MIC GAIN = 20dB 0.01 MIC GAIN = 0dB 0.01 0.01 48kHz MASTER MODE DC-BLOCKING FILTER OFF 0.001 0.001 10 100 1k 10k 100k 100 10 FREQUENCY (Hz) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE IN TO LINE OUT) SPEAKER AMP EFFICIENCY vs. OUTPUT POWER 70 0.1 LEFT 0.01 RL = 4 + 33µH 60 50 40 30 20 0.001 10 100 1k FREQUENCY (Hz) 100k RL = 8 68µH 80 70 RL = 4 + 33µH 60 50 40 30 PVDD = 3.3V fIN = 1kHz 10 0 10k 100k 20 PVDD = 5V fIN = 1kHz 10 RIGHT 10k 90 EFFICIENCY (%) EFFICIENCY (%) 1 RL = 8 68µH 80 1k SPEAKER AMP EFFICIENCY vs. OUTPUT POWER MAX9851/53 MAX9851/53 toc20 NO LOAD MAX9853 MAX9853 100 FREQUENCY (Hz) 90 MAX9851/53 MAX9851/53 toc19 10 THD+N (%) 10 10k 1k FREQUENCY (Hz) MAX9851/53 MAX9851/53 toc21 0.001 0 0 1 2 OUTPUT POWER (W) 3 4 0 0.4 0.8 1.2 1.6 2.0 OUTPUT POWER (W) _ 19 MAX9851/MAX9853 MAX9851/MAX9853 Typical Operating Characteristics (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO SPEAKER AMP) vs. FREQUENCY (DAC TO LINE OUT) vs. FREQUENCY (DAC TO SPEAKER AMP) Typical Operating Characteristics (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) SPEAKER AMP OUTPUT POWER SPEAKER AMP OUTPUT POWER SPEAKER AMP OUTPUT POWER vs. LOAD RESISTANCE vs. SUPPLY VOLTAGE (PVDD) vs. SUPPLY VOLTAGE (PVDD) 2.5 5.0V 2.0 1.5 1.2 1.0 THD+N = 10% 0.8 0.6 THD+N = 1% 2.0 0.4 0.5 1 10 THD+N = 10% THD+N = 1% 1.0 0.5 fIN = 1kHz RL = 4 + 33µH 0 0 1000 100 1.5 fIN = 1kHz RL = 8 + 68µH 0.2 0 MAX9851/53 MAX9851/53 toc24 1.4 3.3V 1.0 2.5 OUTPUT POWER (W) 3.0 1.6 OUTPUT POWER (W) OUTPUT POWER (W) 3.5 1.8 MAX9851/53 MAX9851/53 toc23 fIN = 1kHz 33µH IN SERIES WITH RLOAD THD+N = 1% MAX9851/53 MAX9851/53 toc22 4.0 2.5 LOAD RESISTANCE () SUPPLY VOLTAGE (V) 3.5 4.5 4.0 SUPPLY VOLTAGE (V) HEADPHONE AMP OUTPUT POWER vs. SUPPLY VOLTAGE (AVDD) HEADPHONE AMP OUTPUT POWER vs. SUPPLY VOLTAGE (AVDD) THD+N = 1% 50 40 30 20 fIN = 1kHz RL = 32 HP GAIN = 95.5dB 10 100 THD+N = 10% THD+N = 1% 40 fIN = 1kHz RL = 16 HP GAIN = 95.5dB 20 0 2.8 3.0 3.2 3.6 3.4 2.6 2.8 3.0 3.2 3.4 MAX9851/53 MAX9851/53 toc27 -50 -60 -70 -80 -90 -100 -110 0 2.6 VRIPPLE = 100mVP-P AC SIGNAL APPLIED TO AVDD AND CPVDD -40 80 60 5.0 0 -10 -20 -30 PSRR (dB) 60 120 OUTPUT POWER (mW) OUTPUT POWER (mW) 70 5.5 4.5 MAX9851/53 MAX9851/53 toc26 THD+N = 10% 3.5 140 MAX9851/53 MAX9851/53 toc25 80 2.5 3.0 5.5 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO HP) 90 -120 3.6 10 1k 100 10k 100k SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) FREQUENCY (Hz) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO RECEIVER) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO LINE OUT) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO SPEAKER) PSRR (dB) PSRR (dB) -50 -60 -70 -80 -90 -100 -110 10 100 1k FREQUENCY (Hz) 10k 100k -50 -60 -70 -80 -90 -100 -110 -120 -120 VRIPPLE = 100mVP-P AC SIGNAL APPLIED TO PVDD ONLY MAX9851 MAX9851 -10 -20 -30 -40 -40 -50 -60 -70 MAX9851/53 MAX9851/53 toc30 VRIPPLE = 100mVP-P AC SIGNAL APPLIED TO AVDD AND CPVDD MAX9853 MAX9853 -10 -20 -30 0 MAX9851/53 MAX9851/53 toc29 VRIPPLE = 100mVP-P AC SIGNAL APPLIED TO AVDD AND CPVDD -80 -90 -100 -110 20 0 MAX9851/53 MAX9851/53 toc28 0 -10 -20 -30 -40 PSRR (dB) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs -120 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) _ 10k 100k Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs FFT, DAC TO LINE OUT 8kHz MASTER VOICE MODE, 0dBFS MAX9853 MAX9853 0 -40 -60 -80 MAX9853 MAX9853 0 -20 AMPLITUDE (dBFS) -20 AMPLITUDE (dBFS) -20 20 MAX9851/53 MAX9851/53 toc32 MAX9853 MAX9853 0 -40 -60 -80 -40 -60 -80 -100 -100 -100 -120 -120 -120 -140 -140 0 1 2 3 4 -140 0 1 2 3 4 0 1 2 3 FREQUENCY (kHz) FREQUENCY (kHz) FFT, DAC TO LINE OUT 48kHz SLAVE MODE, 0dBFS FFT, DAC TO LINE OUT 48kHz SLAVE MODE, -60dBFS FFT, DAC TO LINE OUT 48kHz MASTER MODE, 0dBFS 0 -20 AMPLITUDE (dBFS) AMPLITUDE (dBFS) -20 MAX9853 MAX9853 -40 -60 -80 20 MAX9853 MAX9853 0 -20 AMPLITUDE (dBFS) 0 20 MAX9851/53 MAX9851/53 toc35 MAX9853 MAX9853 MAX9851/53 MAX9851/53 toc34 20 -40 -60 -80 -40 -60 -80 -100 -100 -100 -120 -120 -120 -140 -140 -140 0 5 10 15 20 0 5 10 15 0 20 5 10 15 FREQUENCY (kHz) FREQUENCY (kHz) FFT, LINE IN TO ADC 48kHz MASTER MODE, -60dBFS 20 FREQUENCY (kHz) FFT, LINE IN TO ADC 48kHz MASTER MODE, 0dBFS FFT, LINE IN TO ADC 8kHz MASTER VOICE MODE, 0dBFS -40 -60 -80 -40 -60 -80 MAX9851/53 MAX9851/53 toc39 -20 AMPLITUDE (dBFS) -20 0 0 -20 AMPLITUDE (dBFS) 0 20 MAX9851/53 MAX9851/53 toc38 20 MAX9851/53 MAX9851/53 toc37 20 AMPLITUDE (dBFS) 4 FREQUENCY (kHz) MAX9851/53 MAX9851/53 toc36 AMPLITUDE (dBFS) 20 MAX9851/53 MAX9851/53 toc31 20 FFT, DAC TO LINE OUT 8kHz MASTER VOICE MODE, -60dBFS MAX9851/53 MAX9851/53 toc33 FFT, DAC TO LINE OUT 8kHz SLAVE VOICE MODE, 0dBFS -40 -60 -80 -100 -100 -100 -120 -120 -120 -140 -140 0 5 10 FREQUENCY (kHz) 15 20 -140 0 5 10 FREQUENCY (kHz) 15 20 0 1 2 3 4 FREQUENCY (kHz) _ 21 MAX9851/MAX9853 MAX9851/MAX9853 Typical Operating Characteristics (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) Typical Operating Characteristics (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) WIDEBAND FFT FFT, LINE IN TO ADC FFT, LINE IN TO ADC (DAC TO HP AMP) 8kHz MASTER VOICE MODE, -60dBFS 8kHz SLAVE VOICE MODE, -60dBFS -40 -60 -80 -40 -60 -80 -100 -120 -120 -140 2 3 4 -40 -60 -80 -100 -120 -140 -140 1 0 DAC INPUT = 0dBFS HP AMP GAIN = 0dB -20 -100 MAX9851/53 MAX9851/53 toc42 -20 0 VOUT AMPLITUDE (dBFS) 0 AMPLITUDE (dBFS) -20 MAX9851/53 MAX9851/53 toc41 0 AMPLITUDE (dBFS) 20 MAX9851/53 MAX9851/53 toc40 20 0 1 2 100 10 4 3 1k 10k 100k FREQUENCY (kHz) DVDD AND DVDDS2 SUPPLY CURRENT vs. SUPPLY VOLTAGE DVDD AND DVDDS2 SUPPLY CURRENT vs. SUPPLY VOLTAGE -40 -60 -80 -100 15 10 20 5 MAX9851/53 MAX9851/53 toc45 fS = 48kHz STEREO DAC PLAYBACK ONLY CLOCKING ZEROS INTO THE DAC SUPPLY CURRENT (mA) 20 MAX9851/53 MAX9851/53 toc44 DAC INPUT = -60dBFS HP AMP GAIN = 0dB SUPPLY CURRENT (mA) VOUT AMPLITUDE (dBFS) -20 FREQUENCY (Hz) MAX9851/53 MAX9851/53 toc43 0 FREQUENCY (kHz) WIDEBAND FFT (DAC TO HP AMP) fS = 48kHz VOICE MODE MONO MIC MONO ADC MONO DAC CLOCKING ZEROS INTO DAC 15 10 5 -120 -140 0 10 100 1k 10k 100k 0 1.8 2.1 2.4 2.7 3.0 3.3 3.6 1.8 2.1 2.4 2.7 3.0 3.3 3.6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) DVDD AND DVDDS2 SUPPLY CURRENT vs. SUPPLY VOLTAGE DVDD AND DVDDS2 SUPPLY CURRENT vs. SUPPLY VOLTAGE AVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (STEREO PLAYBACK) fS = 8kHz VOICE + 48kHz BOTH INTERFACES ON FULL DUPLEX MONO VOICE WITH STEREO AUDIO PLAYBACK CLOCKING ZEROS INTO DACS fS = 48kHz STEREO RECORD ONLY STEREO MIC STEREO ADC MIC INPUTS AC-GROUNDED 15 10 5 2.4 2.7 3.0 SUPPLY VOLTAGE (V) 3.3 16 14 12 SPEAKER AMP ENABLED 10 8 HP AMP ENABLED 6 RECEIVER ENABLED 4 0 0 2.1 DACS ENABLED ADCS DISABLED MIC AMPS DISABLED CLOCKING ZEROS INTO DAC 48kHz MASTER MODE AMPS ENABLED ONE AT A TIME 18 2 0 1.8 20 SUPPLY CURRENT (mA) 10 MAX9851/53 MAX9851/53 toc47 SUPPLY CURRENT (mA) 15 5 22 20 MAX9851/53 MAX9851/53 toc46 20 MAX9851/53 MAX9851/53 toc48 FREQUENCY (Hz) SUPPLY CURRENT (mA) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs 3.6 1.8 2.1 2.4 2.7 3.0 SUPPLY VOLTAGE (V) 3.3 3.6 2.6 2.8 3.0 3.2 SUPPLY VOLTAGE (V) _ 3.4 3.6 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs AVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (VOICE RECORD AND PLAYBACK) 10 SPEAKER AMP ENABLED 8 SPEAKER AMP ENABLED 15 RECEIVER ENABLED RECEIVER ENABLED 2 5 0 2.6 2.8 3.0 3.2 3.4 2.8 BOTH DACS DISABLED BOTH ADCS ENABLED (48kHz) BOTH MIC AMPS ENABLED MIC INPUTS GROUNDED 20 15 40 3.2 3.4 30 3.6 25 20 HP AMP ENABLED 15 10 MAX9851/53 MAX9851/53 toc51 RECEIVER ENABLED 2.6 2.8 3.0 3.2 3.4 3.6 SUPPLY VOLTAGE (V) BOTH DACS ENABLED (48kHz) BOTH ADCS ENABLED (48kHz) CLOCKING ZEROS INTO DACS BOTH MIC AMPS ENABLED MIC INPUTS GROUNDED AMPS ENABLED ONE AT A TIME 35 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 3.0 AVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (STEREO RECORD AND PLAYBACK) MAX9851/53 MAX9851/53 toc52 AVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (STEREO RECORD) 25 HP AMP ENABLED SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 30 SPEAKER AMP ENABLED 15 5 2.6 3.6 20 10 HP AMP ENABLED 10 4 25 PVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (DAC TO SPEAKER AMP) 20 SPEAKER AMP ENABLED RECEIVER BOTH DACS ENABLED (48kHz) BOTH ADCS DISABLED CLOCKING ZEROS INTO DACS MIC AMPS DISABLED 18 16 SUPPLY CURRENT (mA) 6 HP AMP ENABLED 20 S1 ENABLED (8kHz VOICE MODE) STEREO DAC ENABLED (48kHz) ONE ADC ENABLED CLOCKING ZEROS INTO DAC LEFT MIC AMP ENABLED, INPUTS GROUNDED MIC AND LINE CONNECTED TO ADC AMPS ENABLED ONE AT A TIME MAX9851/53 MAX9851/53 toc54 12 25 30 SUPPLY CURRENT (mA) 14 ONE DAC ENABLED ONE ADC ENABLED DIGITAL LOOPTHOUGH LEFT MIC AMP ENABLED, INPUTS GROUNDED MIC AND LINE CONNECTED TO ADC 8kHz VOICE MODE AMPS ENABLED ONE AT A TIME MAX9851/53 MAX9851/53 toc53 SUPPLY CURRENT (mA) 16 30 AVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (DUAL DIGITAL PATH) MAX9851/53 MAX9851/53 toc50 DACS DISABLED ADCS DISABLED MIC AMPS DISABLED LINE IN TO AMPS AMPS ENABLED ONE AT A TIME 18 SUPPLY CURRENT (mA) 20 MAX9851/53 MAX9851/53 toc49 AVDD SUPPLY CURRENT vs. SUPPLY VOLTAGE (ANALOG PATH) 14 12 10 8 6 4 2 5 10 2.6 2.8 3.0 3.2 SUPPLY VOLTAGE (V) 3.4 3.6 0 2.6 2.8 3.0 3.2 SUPPLY VOLTAGE (V) 3.4 3.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) _ 23 MAX9851/MAX9853 MAX9851/MAX9853 Typical Operating Characteristics (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) Typical Operating Characteristics (continued) (AVDD = CPVDD = +3V, DVDD = DVDDS2 = +1.8V, PVDD = +3.3V, RHP = 32, ZSPK = 8 + 68µH, RREC = 32, ROUTL+ to ROUTL- = ROUTR+ to ROUTR- = 10k, C1 = 0.22µF, C2 = CVMREG = CVPREG = CMBIAS = CREF = 1µF, MCLK = 13MHz, all PGAs = 0dB, HP/REC volume = -20.0dB, SPK volume = -20.6dB, line output gain = -0.4dB, fS = 48kHz for nonvoice mode, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) DAC FREQUENCY RESPONSE 48kHz, 44.1kHz, AND 22.05kHz ADC FREQUENCY RESPONSE 48kHz, 44.1kHz, AND 22.05kHz -20 22.05kHz 48kHz AND 44.1kHz -40 -60 MAX9851/53 MAX9851/53 toc56 0 AMPLITUDE (dB) 0 AMPLITUDE (dB) 20 MAX9851/53 MAX9851/53 toc55 20 -80 -20 -40 -60 -80 -100 -100 10 100 1k 10k 100k 10 100 1k 10k DAC FREQUENCY RESPONSE 8kHz VOICE MODE 0 ADC FREQUENCY RESPONSE 8kHz VOICE MODE DBPE (REGISTER 0x07, B4) DBPE = 0 -40 DBPE = 1 -80 -20 -40 -60 ABPE = 1 -80 -100 -100 10 100 1k FREQUENCY (Hz) 24 ABPE (REGISTER 0x07, B5) ABPE = 0 0 AMPLITUDE (dB) -20 -60 20 MAX9851/53 MAX9851/53 toc57 20 100k FREQUENCY (Hz) MAX9851/53 MAX9851/53 toc58 FREQUENCY (Hz) AMPLITUDE (dB) MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs 10k 10 100 1k 10k FREQUENCY (Hz) _ 100k Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs PIN NAME FUNCTION MAX9851 MAX9851 MAX9853 MAX9853 1 1 EXTMICBIASL 2 2 PREG Internal Positive Regulator Output. Bypass to AGND with a 1µF capacitor. 3 - PVDD Left Speaker Positive Power-Supply Input. Bypass to PGND with a 0.1µF capacitor. 4 - LSPK+ Positive Left-Channel Class D Speaker Output 5 - LSPK- Negative Left-Channel Class D Speaker Output 6 - PGND Class D Speaker Amplifier Ground 7 - RSPK- Negative Right-Channel Class D Speaker Output 8 - RSPK+ 9 - PVDD - 3 OUTL+ Noninverted Differential Left-Channel Line-Level Output. OUTL+ is biased at 1.23V. - 4 OUTL- Inverted Differential Left-Channel Line-Level Output. OUTL- is biased at 1.23V. - 5 SHDNOUT - 6 FAULTIN - 7 PVDD - 8 OUTR- 9 OUTR+ 10 10 NREG 11 11 REF 12 12 MBIAS 13 13 LINEIN1 Line Input 1. AC-couple analog audio signal to LINEIN1. 14 14 LINEIN2 Line Input 2. AC-couple analog audio signal to LINEIN2. 15 15 AVDD Left External Microphone Bias. Provides a 2.4V microphone bias for the external microphone's left channel through selectable 2.2k or 470 output impedance resistor. Positive Right-Channel Class D Speaker Output Right Speaker Positive Power-Supply Input. Bypass to PGND with a 0.1µF capacitor. Shutdown Output. Open-drain shutdown output used to control an external amplifier shutdown input through the MAX9851/MAX9853 MAX9851/MAX9853 I2C interface. Connect a 10k pullup resistor to DVDD for full output swing. Fault Input. Logic input with internal 300k pullup resistor. The state of FAULTIN is reported in status register 0x00 and can be used to trigger a hardware interrupt. Headset Autodetect Positive Power-Supply Input. Connect to PVDD battery voltage for proper headset detect operation during sleep mode (see the Headset Detect section). Connect to AVDD if not used. Bypass to AGND with a 0.1µF capacitor. Inverted Differential Right-Channel Line-Level Output. OUTR- is biased at 1.23V. Noninverted Differential Right-Channel Line-Level Output. OUTR+ is biased at 1.23V. Internal Negative Regulator Output. Bypass to AGND with a 1µF capacitor. Reference Output. Bypass to AGND with a 1µF ceramic capacitor. Internal Microphone Bias Regulator Output. Bypass to AGND with a 1µF capacitor. Audio Power-Supply Input. Bypass to AGND with 0.1µF and 10µF capacitors. 16 16 HPL Left-Channel Headphone Output (Stereo Mode)/Noninverting Headphone Output (Balanced Mono Mode). HPL is a DirectDrive output biased at AGND. 17 17 HPR Right-Channel Headphone Output (Stereo Mode)/Noninverting Headphone Output (Balanced Mono Mode). HPR is a DirectDrive output biased at AGND. 18 18 SVSS Headphone and Receiver Amplifier Negative Supply Input. Connect to PVSS. 19 19 REC Handset Receiver Output. REC is a DirectDrive output biased at AGND. PVSS Inverting Charge-Pump Output. Bypass to CPGND with a 1µF ceramic capacitor and connect to SVSS to provide the headphone and receiver amplifiers with a negative supply. 20 20 _ 25 MAX9851/MAX9853 MAX9851/MAX9853 Pin Description MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs Pin Description (continued) PIN NAME FUNCTION MAX9851 MAX9851 MAX9853 MAX9853 21 21 C1N 22 22 CPGND 23 23 C1P 24 24 CPVDD 25 25 SCL I2C-Compatible Serial Clock Input. Connect a 10k pullup resistor to DVDD for full output swing. 26 26 SDA I2C-Compatible Serial Data Input/Output. Connect a 10k pullup resistor to DVDD for full output swing. 27 27 SDINS1 28 28 SDOUTS1 29 29 BCLKS1 Primary Interface Digital Audio Bit Clock Input/Output. BCLKS1 is an input when the MAX9851/MAX9853 MAX9851/MAX9853 is in slave mode and an output when in master mode. Primary Interface Digital Audio Left-Right Clock Input/Output. LRCLKS1 is the audio sample rate clock and determines whether the audio data on SDINS1 is routed to the left or right channel. LRCLKS1 is an input when the MAX9851/MAX9853 MAX9851/MAX9853 is in slave mode and an output when in master mode. Charge-Pump Flying Capacitor Negative Terminal. Connect a 0.22µF ceramic capacitor between C1N and C1P. Charge-Pump Ground Charge-Pump Flying Capacitor Positive Terminal. Connect a 0.22µF ceramic capacitor between C1N and C1P. Charge-Pump Positive Power-Supply Input. Bypass to CPGND with a 1µF capacitor. Primary Interface Digital Audio Serial Data DAC Input. Voiceband filtering available on this input. Primary Interface Digital Audio Serial Data ADC Output. Voiceband filtering available on this output. 30 30 LRCLKS1 31 31 DGND Digital Ground 32 32 DVDD Digital Power-Supply Input. DVDD provides power to the digital core, the I2C interface and the primary digital audio interface. Bypass to DGND with a 1µF capacitor. 33 LRCLKS2 34 34 BCLKS2 Secondary Interface Digital Audio Bit Clock Input/Output. BCLKS2 is an input when the MAX9851/MAX9853 MAX9851/MAX9853 is in slave mode and an output when in master mode. 35 35 SDOUTS2 36 26 33 Secondary Interface Digital Audio Left-Right Clock Input/Output. LRCLKS2 is the audio sample rate clock and determines whether the audio data on SDINS2 is routed to the left or right channel. LRCLKS2 is an input when the MAX9851/MAX9853 MAX9851/MAX9853 is in slave mode and an output when in master mode. 36 SDINS2 Secondary Interface Digital Audio Serial Data ADC Output Secondary Interface Digital Audio Serial Data DAC Input _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs PIN NAME FUNCTION MAX9851 MAX9851 MAX9853 MAX9853 37 37 DVDDS2 38 38 MCLK 13MHz/26MHz Master Clock Input VIBE Transducer/Vibrator Output. Open-drain output programmable to control a vibrator motor or a transducer. Connect a 1k pullup resistor to DVDD for full output swing. 39 39 Secondary Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1µF capacitor. 40 40 IRQ Hardware Interrupt Output. IRQ can be programmed to pull low when bits in the status register 0x00 change state. Read status register 0x00 to clear IRQ once set. Repeat faults will have no effect on IRQ until it is cleared by reading the I2C status register 0x00. Connect a 10k pullup resistor to DVDD for full output swing. 41 41 EXTMICR External Microphone Right-Channel Single-Ended Input. Connect a compatible highimpedance or low-impedance (with built-in pre-amplifiers) microphone between EXTMICR and EXTMICGND. AC-couple a microphone to EXTMICR with a series 1µF capacitor. 42 42 EXTMICL External Microphone Left-Channel Single-Ended Input. Connect a compatible highimpedance or low-impedance (with built-in pre-amplifiers) microphone between EXTMICL and EXTMICGND. AC-couple a microphone to EXTMICL with a series 1µF capacitor. 43 43 AGND 44 44 EXTMICGND External Microphone Ground Sense Return. AC-couple EXTMICGND to the external jack ground with a series 1µF capacitor to reduce noise. 45 45 INTMICP Internal Positive Differential Microphone Input. AC-couple a microphone to INTMICP with a series 1µF capacitor. 46 46 INTMICN Internal Negative Differential Microphone Input. AC-couple a microphone to INTMICN with a series 1µF capacitor. 47 47 INTMICBIAS 48 48 EXTMICBIASR - - EP Analog Ground Internal Microphone Bias. Bypass INTMICBIAS to AGND with a 1µF capacitor. Provides 2.4V microphone bias for the internal differential microphone through an external 2.2k resistor. Right External Microphone Bias. Provides a 2.4V microphone bias for a right-channel external microphone through an internal selectable 2.2k or 470 output resistor. Exposed Thermal Pad. Connect to AGND. _ 27 MAX9851/MAX9853 MAX9851/MAX9853 Pin Description (continued) 28 µC DVDD 40 IRQ 38 MCLK 28 SDOUTS1 27 SDINS1 29 BCLKS1 30 LRCLKS1 35 SDOUTS2 36 SDINS2 34 BCLKS2 33 LRCLKS2 14 LINEIN2 13 LINEIN1 26 SDA 25 SCL 10k 1µF DVDD 10k 10k 13MHz/ 26MHz GSM BASEBAND PROCESSOR (VOICE DATA) SECONDARY DIGITAL AUDIO SOURCE ANALOG AUDIO SOURCE 1µF I2C SERIAL PORT TIMING AND CONTROL LOGIC DIGITAL AUDIO INTERFACE S1 43 AGND DGND 31 GAIN CONTROL PGADS2 GAIN CONTROL PGADS2 LINEIN2 -32dB TO +30dB LINEIN1 -32dB TO +30dB DIGITAL AUDIO INTERFACE S2 PGAL2 PGAL1 15 CPGND 22 VOICEBAND FILTER VOICEBAND FILTER CPVDD PGND 6 RIGHT ADC LEFT ADC DAC INPUT MIXER AND FILTER 2 32 1µF PREG 10 1µF NREG 11 1µF REF 12 LINEIN2 LINEIN1 LINEIN2 LINEIN1 SIDETONE -74dB TO +5.5dB SPVOLR 1µF C1 0.22µF C1N C1P 23 21 PAREN 20 C2 1µF PVSS CHARGE PUMP 0dB OR +20dB PGAMR PALEN 18 SVSS -66.4dB TO +13.4dB SPVOLL -66.4dB TO +13.4dB HRVOLR PGAML 0dB TO +20dB MBIAS PGAS -74dB TO +5.5dB HRVOLL 0.1µF 0dB TO +20dB 0dB OR +20dB RIGHT AUDIO OUTPUT MIXER 9 PVDD 0.1µF LEFT AUDIO OUTPUT MIXER -34dB TO +30.5dB LINEIN2 LINEIN1 LINEIN2 LINEIN1 3 2.6V TO 5.5V PVDD 1µF INTERNAL REGULATORS RIGHT ADC INPUT MIXER LEFT ADC INPUT MIXER RIGHT DAC LEFT DAC 37 DVDDS2 1µF 1.7V TO 3.3V DVDD 0.1µF MAX9851 MAX9851 AVDD 24 1µF 2.6V TO 3.3V MBIAS MONO MIXER VIBE CONTROL CIRCUITRY RSPK- 7 RSPK+ 8 LSPK- 5 LSPK+ 4 REC 19 HPR 17 HPL 16 VIBE 39 EXTMICR 41 EXTMICBIASR 48 EXTMICL 42 EXTMICGND 44 EXTMICBIASL 1 INTMICP 45 INTMICN 46 INTMICBIAS 47 PVSS AVDD PVSS AVDD PVSS AVDD 1µF 1µF 1µF 1µF 2.2k 1k DVDD 1µF 1µF 2.2k TRANSDUCER/ VIBRATOR RIGHT EXTERNAL MICROPHONE LEFT EXTERNAL MICROPHONE INTERNAL MICROPHONE RIGHT SPEAKER LEFT SPEAKER RECEIVER SPEAKER SINGLE-ENDED OR BALANCED MONO OR SINGLE-ENDED MONO EXTERNAL HEADPHONE MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs MAX9851 MAX9851 Functional Diagram/Typical Operating Circuit _ µC TO SHUTDOWN CONTROL 10k DVDD DVDD 40 IRQ 38 MCLK 28 SDOUTS1 27 SDINS1 29 BCLKS1 30 LRCLKS1 35 SDOUTS2 36 SDINS2 34 BCLKS2 33 LRCLKS2 14 LINEIN2 13 LINEIN1 5 LINEIN1 DIGITAL AUDIO INTERFACE S1 6 FAULTIN I2C SERIAL PORT AGND 43 GAIN CONTROL PGADS2 GAIN CONTROL PGADS2 LINEIN2 -32dB TO +30dB DIGITAL AUDIO INTERFACE S2 PGAL2 PGAL1 TIMING AND CONTROL LOGIC SHDNOUT 26 SDA 25 SCL 10k 1µF DVDD 10k 10k 13MHz/ 26MHz GSM BASEBAND PROCESSOR (VOICE DATA) SECONDARY DIGITAL AUDIO SOURCE ANALOG AUDIO SOURCE 1µF -32dB TO +30dB 15 DGND 31 VOICEBAND FILTER VOICEBAND FILTER CPGND 22 RIGHT ADC LEFT ADC DAC INPUT MIXER 2 32 37 1µF PREG 10 1µF NREG 11 1µF REF 12 -73.5dB TO +6dB LOPGAR LOPGAL 1µF C1 0.22µF C1N C1P 23 21 PAREN 20 C2 1µF PVSS CHARGE PUMP 0dB TO +20dB PGAMR PALEN 18 SVSS -71.9dB TO +7.6dB -71.9dB TO +7.6dB HRVOLR PGAML 0dB TO +20dB MBIAS LINEIN2 LINEIN1 INTERNAL REGULATORS RIGHT ADC INPUT MIXER LINEIN2 LINEIN1 -73.5dB TO +6dB HRVOLL 0dB TO +20dB 0dB TO +20dB RIGHT AUDIO OUTPUT MIXER PGAS SIDETONE 0.1µF LEFT AUDIO OUTPUT MIXER -32dB TO +30dB LINEIN2 LINEIN1 LINEIN2 7 PVDD 1µF 2.6V TO 5.5V LINEIN1 DVDDS2 1µF LEFT ADC INPUT MIXER RIGHT DAC LEFT DAC DVDD 0.1µF MAX9853 MAX9853 AVDD CPVDD 1µF 24 1.7V TO 3.3V MBIAS MONO MIXER VIBE CONTROL CIRCTUITRY OUTR- 8 OUTR+ 9 OUTL- 4 OUTL+ 3 REC 19 HPR 17 HPL 16 VIBE 39 EXTMICR 41 EXTMICBIASR 48 EXTMICL 42 EXTMICGND 44 EXTMICBIASL 1 INTMICP 45 INTMICN 46 INTMICBIAS 47 PVSS AVDD PVSS AVDD PVSS AVDD 1µF 1µF 1µF 1µF 2.2k 1k DVDD 1µF 1µF 2.2k RIGHT OUTPUT LEFT OUTPUT TRANSDUCER/ VIBRATOR RIGHT EXTERNAL MICROPHONE LEFT EXTERNAL MICROPHONE INTERNAL MICROPHONE EXTERNAL STEREO AMPLIFIER RECEIVER SPEAKER SINGLE-ENDED OR BALANCED MONO OR SINGLE-ENDED MONO EXTERNAL HEADPHONE MAX9853 MAX9853 Functional Diagram/Typical Operating Circuit _ 29 MAX9851/MAX9853 MAX9851/MAX9853 2.6V TO 3.3V Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs Detailed Description The MAX9851 MAX9851 CODEC, with a stereo DirectDrive headphone amplifier and a stereo Class D speaker amplifier, is a complete digital audio solution for GSM/ GPRS/EDGE cell phones and PDA phones. The MAX9853 MAX9853 audio CODEC shares all the functionality of the MAX9851 MAX9851 without the Class D speaker amplifier, substituting it with stereo differential line outputs to facilitate external amplifiers and other analog audio devices. The MAX9851/MAX9853 MAX9851/MAX9853 additionally feature stereo and mono microphone inputs, and a mono DirectDrive handset receiver amplifier combined with sigma-delta stereo DACs and stereo ADCs. The sigma-delta DAC has 88dB of dynamic range and accepts stereo audio data from two independent digital audio interfaces at sampling frequencies ranging from 8kHz to 48kHz. The interfaces can accept I2S-compatible data in addition to voiceband data and allows the mixing of multiple audio sources at different unrelated sample rates. The primary digital audio input integrates bandpass filtering that can be used when operating in voice mode. Digital audio from the ADC can output on both interfaces allowing maximum flexibility. Analog and digital volume levels, muting, and device configuration are programmed through the I2C-compatible interface. Audio data is sent to and from the MAX9851/MAX9853 MAX9851/MAX9853 through either of two 4-wire digital audio data buses that support numerous formats. LRCLK and BCLK signals are generated by the MAX9851/MAX9853 MAX9851/MAX9853 when configured in master mode. The MAX9851/MAX9853 MAX9851/MAX9853 can also be configured as a slave DAC stereo audio playback device or a full duplex slave voice CODEC, accepting LRCLK and BCLK signals from an external digital audio master. Maxim's patented DirectDrive architecture employs an internal charge pump to create a negative voltage supply powering the headphone and receiver amplifier outputs. The internal negative supply allows the analog output signals to be biased at ground, eliminating the need for an output-coupling capacitor, reducing system cost and size. The MAX9851/MAX9853 MAX9851/MAX9853's stereo line inputs allow mixing of analog audio with digital audio. Numerous signal routing options and programmable gain allow any combination of analog and digital input signals at varying signal levels to be routed to any output. Sophisticated headset sensing circuitry allows 30 the MAX9851/MAX9853 MAX9851/MAX9853 to detect a wide variety of headset configurations and trigger a hardware interrupt on jack insertion (even when powered down). The external stereo microphone inputs provide configurable internal bias resistors and a gain range of 40dB to accommodate a wide variety of microphones. The internal mono microphone input provides a differential input and a gain range of 40dB. The VIBE digital output can be used to control a vibrator, transducer, or can be used as a general-purpose digital output. Serial Digital Audio Interface The MAX9851/MAX9853 MAX9851/MAX9853 have two independent digital audio interfaces, S1 and S2, each capable of operating independently in the full-duplex master and slave timing modes shown in Figures 1 and 2. The second digital audio interface operates from a secondary supply voltage (DVDDS2) to allow simple integration into multiple supply systems. Set S1SDO or S2SDO to 1 (register 0x03 or 0x05, bit B7) to enable the output of ADC data to the corresponding SDOUT pin. Enabling both SDOUTS1 and SDOUTS2 will output the same digital audio signal on both interfaces and the primary S1 interface will specify the sample rate of the ADC. Set S1SDI or S2SDI to 1 (register 0x03 or 0x05, bit B6) to enable DAC input and begin an internal soft-start sequence for the corresponding SDIN pin. Clearing a particular SDI bit begins an internal soft-stop sequence prior to disabling the input. The SLD slew detect status bit (register 0x00, bit B6) indicates when a softstart/stop sequence has completed. This allows interface mode changes without interrupting the other interface's signal flow. Clear both S1SDI and S2SDI before enabling the left and right DAC with DACLEN and DACREN (register 0x1B, bits B7 and B6). To achieve the most exact sample clocks, operate the MAX9851/MAX9853 MAX9851/MAX9853 in slave mode with the exact LRCLK provided externally (in DAC-only mode) or in master mode with the ADCs disabled. The ADC requires an exact integer LRCLK frequency resulting in less accurate sample clocks than when only operating the DAC. Slave mode is only available for the DACs when the ADCs are inactive, or for fully synchronous 8kHz and 16kHz voice modes. Table 1 lists the MAX9851/MAX9853 MAX9851/MAX9853 available interface modes for each sampling frequency. _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs MAX9851/MAX9853 MAX9851/MAX9853 Table 1. Digital Audio Interface Modes fS (ADC ON) (kHz) fS (ADC OFF) (kHz) 48 Master (stereo audio mode) MODE 47.794 48.0011 44.1 Master (stereo audio mode) 43.333 44.0989 32 Master (stereo audio mode) 31.863 31.9986 24 Master (stereo audio mode) 24.074 23.9990 22.05 Master (stereo audio mode) 21.959 22.0494 16 Master (stereo audio mode) 15.931 15.9993 12 Master (stereo audio mode) 12.037 12.0010 11.025 Master (stereo audio mode) 11.054 11.0247 8 Master (stereo audio mode) 8.025 7.9997 8 Master (voice mode) 8.000 8.000 16 Master (voice mode) 16.000* 16.000* 8 to 48 Slave (stereo audio mode) - 8 to 48 16 Slave (voice mode) 16.000* 16.000* 8 Slave (voice mode) 8.000 8.000 *26MHz clock required for synchronous 16kHz sample rate. Stereo Audio Modes Set S1MAS or S2MAS to 1 (register 0x04 or 0x06, bit B7) to operate the respective interface in master mode. The MAX9851/MAX9853 MAX9851/MAX9853 generate the LRCLK and BCLK signals, which can be used to send and receive digital audio samples. In stereo audio mode, the BCLK signal is a pulse with a period of 30ms. BCLK is inactive when there are no bits transmitted on SDIN or SDOUT. The number of clock cycles per frame is equal to the configured bit depth. Set S1MAS or S2MAS to 0 to operate the respective interface in slave mode, and disable the ADC in stereo audio modes (slave mode not available). The interface accepts slave mode noninteger sample clocks ranging from 8kHz to 48kHz and the appropriate bit clocks in these DAC-only stereo audio modes. See Figure 4 for the digital audio interface timing diagrams. Voice Modes In master voice mode, the S1 digital audio interface operates as shown in Figure 3. The BCLK signal is a continuous 13MHz clock. The LRCLK consists of a single-pulse frame sync signal rather than the left-/ right-frame sync clock method used in I2S. Although the 8kHz voice mode can be run from either the 13MHz or 26MHz MCLK frequency, 16kHz voice mode requires a 26MHz MCLK. Although both S1 and S2 interfaces are capable of operating in voice mode, only the primary S1 interface can be configured with a bandpass voice filter. In slave voice mode, an external device must provide at least 16 BCLK cycles following an LRCLK pulse, which will allow operation using any BCLK rate or operation with BCLK shut off between word transfers. In voice mode, the first 16 bits of each sample treated as left-channel audio data. The MAX9851/ MAX9851/ MAX9853 MAX9853 are capable of receiving up to 16 additional bits per sample word, treated as right-channel data. These additional bits are routed to the Vibe circuitry when operating in voice mode on the S1 interface. When operating on the S2 interface, these additional bits are interpreted as right-channel data, optionally routed to the right DAC and the Vibe circuitry. Additional Features Included in each digital audio interface is a timing control module allowing the MAX9851/MAX9853 MAX9851/MAX9853 to generate the clock signals for master mode. The two digital audio interfaces include full functionality for I2S modes of operation, including true I2S data, leftjustified data, and either inverted LRCLK or inverted BCLK. Set S1MODE or S2MODE to 0xA or 0xB (register 0x03 or 0x05, bits B3­B0) to configure the interface for 8kHz or 16kHz voice mode, respectively. Set S1MNO or S2MNO to 1 (register 0x03 or 0x05, bit B5) to mix the right- and left-channel input data to create a mono serial data signal from the left and right input data. The result is then input to the left digital filter path, leaving the right path unused. The output of the left filter path can still be sent to either or both the left _ 31 MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs and right DACs (see the Signal Routing section). The right- and left-channel input data is summed without attenuation and may overdrive the input filter, causing distortion, when the input signals are large. The sum of the stereo input signal should not exceed the dynamic range of the filter, typically 0dBFS digital full scale. When operating in a voice mode with the primary S1 interface, the digital signal data is input to the left chan- nel without summing since the incoming data is assumed to be mono. Adjust PGADS1 and PGADS2 (register 0x0C and 0x0D) to program the gain for the primary and secondary digital audio interfaces. Independent gain adjustment for each interface allows level-matching of different digital signal sources or fade adjustment between two signal sources. MASTER MODE: S_WCI = 0, S_BCI = 0, S_DLY = 0, S_WS = 0 LRCLK (OUT) SDIN RIGHT LEFT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 15 14 13 12 11 10 9 0 8 7 6 5 4 3 2 1 0 RIGHT DATA SAMPLE LEFT DATA SAMPLE BCLK (OUT) SDOUT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 15 0 RIGHT DATA SAMPLE LEFT DATA SAMPLE MASTER MODE: S_WCI = 0, S_BCI = 0, S_DLY = 0, S_WS = 0 LRCLK (OUT) LEFT SDIN 0 15 14 13 12 11 10 9 RIGHT 8 7 5 6 4 3 2 1 0 15 14 13 12 11 10 9 LEFT DATA SAMPLE 8 7 5 6 4 3 2 1 RIGHT DATA SAMPLE BCLK (OUT) SDOUT 0 15 14 13 12 11 10 9 8 7 5 6 4 3 2 0 15 14 13 12 11 10 9 1 LEFT DATA SAMPLE 8 7 5 6 4 3 2 1 0 RIGHT DATA SAMPLE MASTER MODE: S_WCI = 0, S_BCI = 0, S_DLY = 0, S_WS = 1 LRCLK (OUT) SDIN LEFT RIGHT 17 16 15 14 13 12 11 10 9 8 6 7 5 4 3 2 1 0 LEFT DATA SAMPLE 17 16 15 14 13 12 11 10 9 8 6 7 5 4 3 2 1 0 RIGHT DATA SAMPLE BCLK (OUT) SDOUT 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 LEFT DATA SAMPLE 2 1 0 17 16 15 14 13 12 11 10 9 8 7 6 5 4 RIGHT DATA SAMPLE Figure 1. Digital Audio Interface Timing-I2S Master Modes 32 _ 3 2 1 0 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs MAX9851/MAX9853 MAX9851/MAX9853 SLAVE MODE: S_WCI = 1, S_BCI = 0, S_DLY = 0, S_WS = 0 LEFT LRCLK (IN) 15 14 13 12 11 10 SDIN 9 RIGHT 8 7 5 6 4 3 2 1 0 15 14 13 12 11 10 LEFT DATA SAMPLE 9 8 7 5 6 4 3 2 1 0 RIGHT DATA SAMPLE BCLK (IN) 15 14 13 12 11 10 SDOUT 9 8 7 6 4 5 3 2 1 15 14 13 12 11 10 0 LEFT DATA SAMPLE 9 8 7 6 4 5 3 2 1 0 RIGHT DATA SAMPLE SLAVE MODE: S_WCI = 0, S_BCI = 1, S_DLY = 1, S_WS = 0 LEFT LRCLK (IN) SDIN 15 14 13 12 11 10 RIGHT 9 8 7 5 6 4 3 2 1 0 15 14 13 12 11 10 9 8 7 5 6 4 3 2 1 0 RIGHT DATA SAMPLE LEFT DATA SAMPLE BCLK (IN) SDOUT 15 14 13 12 11 10 9 8 7 6 4 5 3 2 1 0 15 14 13 12 11 10 LEFT DATA SAMPLE 9 8 7 6 5 4 3 2 2 1 1 0 0 RIGHT DATA SAMPLE Figure 2. Digital Audio Interface Timing-I2S Slave Modes LRCLK SDIN RIGHT (OPTIONAL DATA FOR VIBE) LEFT MONO SIGNAL (8kHz OR 16kHz Fs) 15 14 13 12 11 10 9 8 7 5 6 4 3 0 1 2 15 14 13 12 11 10 9 8 7 6 5 4 3 BCLK SDOUT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 *MASTER OPERATION: LRCLK PULSE WIDTH = 1 BCLK CYCLE WIDE BCLK = CONTINUOUS 13MHz OUTPUT *SLAVE OPERATION: BCLK MAY HAVE ANY NUMBER OF CYCLES > 17. MCLK/RCLK RATIO MUST BE EXACTLY 1625x. Figure 3. Digital Audio Interface Timing-Voice Modes with Optional Vibe Data _ 33 MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs I2S STEREO SERIAL-INTERFACE TIMING DIAGRAM (SLAVE MODE) VOICE SERIAL-INTERFACE TIMING DIAGRAM (SLAVE MODE) MSB SDIN (INPUT) SDIN (INPUT) MSB-1 MSB-2 tHD tHD tBCLKS tBC tSU tSU BCLK (BCI = 1, INPUT) BCLK (INPUT) BCLK (BCI = 0, INPUT) tDLY tDLY tBCLKH tHD tSU LRCLK (INPUT) I2S STEREO SERIAL-INTERFACE TIMING DIAGRAM (MASTER MODE) tR MSB-2 tf VOICE SERIAL-INTERFACE TIMING DIAGRAM (MASTER MODE) MSB SDIN (INPUT) SDIN (INPUT) tBL tHD tSU LRCLK (INPUT) MSB-1 MSB SDOUT (OUTPUT) tf, tr SDOUT (OUTPUT) tBH tBCLKL MSB-1 MSB-2 tHD tHD tSU tBC tSU tBCLKM BCLK (OUTPUT) BCLK (OUTPUT) tDLY tDLY tBCLKH tBH tBL tBCLKL MSB SDOUT (OUTPUT) MSB-1 MSB-2 SDOUT (OUTPUT) LRCLK (OUTPUT) tr tf LRCLK (OUTPUT) NOTE: PIN LOADING OF BCLK MUST NOT EXCEED LRCLK TO INSURE tDLYG IS NOT GREATER THAN 0. Figure 4. Digital Audio Interface Timing Diagrams 34 _ Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs Powering On/Off the MAX9851/MAX9853 MAX9851/MAX9853 The MAX9851/MAX9853 MAX9851/MAX9853 power on in low-power shutdown mode with all signal paths disabled. It is good practice to configure all I2C registers except S1SDI and S2SDI (register 0x03 and 0x05, bit B6) before taking the MAX9851/MAX9853 MAX9851/MAX9853 out of shutdown. This may include setting initial volume levels, DAC and ADC modes of operation, stereo or mono operation, and audio interface settings. The analog section of the MAX9851/MAX9853 MAX9851/MAX9853 must be fully operational before the digital circuitry will function. Enable the charge pump by setting CPEN = 1 (register 0x1A, bit B4). Once the MAX9851/MAX9853 MAX9851/MAX9853 have been properly configured, set the global shutdown bit, SHDN, to 1 (register 0x1A, bit B7). The MAX9851/MAX9853 MAX9851/MAX9853 are fully operational 70ms after SHDN is set. Finally, if the DACs are to be used, program S1SDI and S2SDI as desired to enable DAC soft-start. Disable the audio outputs before powering down the MAX9851/MAX9853 MAX9851/MAX9853 by setting HRMODE and SPMODE (LOMODE) bits (Register 0x18). Ramping the volume to maximum attenuation is recommended before disabling the output amplifiers. Disable the headphone and speaker (or line outputs) once the audio is fully attenuated. The headphone and speaker (or line outputs) can be disabled within 50µs of attenuation without any audible clicks or pops. Place the MAX9851/MAX9853 MAX9851/MAX9853 in shutdown after the outputs are disabled. Sigma-Delta DAC Set DACLEN and DACREN to 1 (register 0x1B, bit B7 and B6) to enable the left and right DACs while the S1SDI and S2SDI bits are cleared and the SLD status bit is low to ensure click/pop suppression, then enable S1SDI and S2SDI as desired. The stereo DACs can mix any combination of the four channels of data from the S1 left/right and S2 left/right signal sources using the MIXDAL/R bits (register 0x08). Digital signals from the two interfaces in the 8kHz to 48kHz sample rate range are combined regardless of S1 and S2 interfaces modes, even if asynchronous with respect to each other or MCLK (in DAC-only mode). When operating in standard stereo audio mode, the input data stream from each interface is passed through separate 8x FIR interpolating filters. When operating in voice mode, the primary interface makes use of an interpolating IIR voiceband filter with an optional highpass component. When operating in mono mode, or when serial input data is disabled for a digital audio interface, the unused digital-signal processing filter paths are disabled to minimize supply-current consumption. The stereo signals at the left and right DAC may be additionally filtered in any mode with a programmable highpass filter to band limit the audio output and block DC. Set DHPL and DHPR (register 0x07, bits B3­B0) to 01, 10, or 11 to select one of the three highpass filter cutoff frequencies as shown in Table 2. Table 2. DAC Highpass Filter Modes DHPL/DHPR BIT SETTINGS FILTER MODE 00 No filtering 01 55Hz to 91Hz cutoff frequency 10 171Hz to 279Hz cutoff frequency 11 327Hz to 533Hz cutoff frequency Sigma-Delta ADC Set ADCLEN and ADCREN to 1 (register 0x1B, bit B5 and B4) to enable the MAX9851/MAX9853 MAX9851/MAX9853's stereo ADCs. The ADCs accept analog signals from the line inputs and the microphone inputs which can be mixed as described in the Signal Routing section prior to conversion. For ADC operation, program the enabled digital audio interface(s) to operate in master mode so that the sampling clock is generated within the MAX9851/MAX9853 MAX9851/MAX9853. The maximum signal that will not clip the ADC input is 2VP-P. If clipping does occur, reduce the microphone or line input gain as appropriate. Clipping in the digital circuitry is indicated by CLD (register 0x00, bit B7). _ 35 MAX9851/MAX9853 MAX9851/MAX9853 Changing Serial Audio Interface Modes Set S1SD0 = S1SDI = 0 (register 0x03 and 0x05, bit B6) before making any mode changes to serial audio interface S1 to ensure proper operation. Similarly, set S2SD0 = S2SDI = 0 before making any mode changes to serial audio interface S2. This will disable the serial interface and ensure that sampling rate and filtering changes are made properly. Once the desired mode has been selected through I2C, the interface can be reenabled. Failure to observe this procedure can result in the MAX9851/MAX9853 MAX9851/MAX9853 being placed in an invalid operational mode, leading to unexpected results. MAX9851/MAX9853 MAX9851/MAX9853 Stereo Audio CODECs with Microphone, DirectDrive Headphones, Speaker Amplifiers, or Line Outputs Internal Timing The MAX9851/MAX9853 MAX9851/MAX9853 operate from either a 13MHz or 26MHz master input clock (MCLK). 16kHz voice mode requires a 26MHz clock. The quality of the clock signal has a direct relationship with the dynamic range performance of the data converters. Clock jitter below 100psRMS is necessary to maintain maximum performance figures. The MAX9851/MAX9853 MAX9851/MAX9853 make extensive use of MCLK for all chip functions. The digital circuitry and Class D amplifiers require a master clock to operate. Once the MAX9851/MAX9853 MAX9851/MAX9853 are initialized, MCLK is not required during modes where the ADC and DAC are disabled (for instance, playing line inputs through the headphone outputs). However, MCLK needs to be applied for a short period of time (> 1ms) after power-on to initialize volume control circuitry-this is only once per power-on. Voiceband Filters The MAX9851/MAX9853 MAX9851/MAX9853 provide mono voiceband filtering for both output and input digital audio signals on the primary interface. Set ABPE to 1 (register 0x07, bit B5) to enable the highpass component of the voiceband filtering on the output of the ADC. Similarly, set DBPE to 1 (register 0x07, bit B4) to enable the highpass component of the voiceband filtering for incoming data on the primary digital audio interface. Voiceband filtering is available on either interface for outgoing digital audio from the ADC, and incoming data only on the primary S1 digital audio interface. The voiceband filters only operate when the MAX9851/MAX9853 MAX9851/MAX9853 are configured in voice mode. The DAC and ADC voiceband filters are identical, with sample-rate-specific corner frequencies. Operating in 8kHz voice mode, the filter passband extends from 130Hz to 3.5kHz. In 16kHz voice mode, the filter passband extends from 260Hz to 7kHz. Stopband attenuation is greater than 28dB for low frequency and 75dB for high frequencies and the lowpass cutoff frequency is below fS / 2. 36 See the Typical Operating Characteristics for filter characteristics. Line Inputs The MAX9851/MAX9853 MAX9851/MAX9853 provide two single-ended audio line inputs for mixing with analog audio from either the ADC record path or to the DAC playback path. Each line input amplifier has a programmablegain function controlled by PGAL1 and PGAL2 (registers 0x0E and 0x0F). The gain is adjustable over the +30dB to -32dB range in 2dB increments. DirectDrive Headphone and Receiver Amplifiers The MAX9851/MAX9853 MAX9851/MAX9853 headphone and receiver amplifiers make use of Maxim's patented DirectDrive architecture to create ground-biased outputs as shown in Figure 5. Traditional single-supply headphone amplifiers have their outputs biased about a nominal DC voltage, typically half the supply. Large coupling capacitors are typically needed to block this DC bias from the headphone. Without these capacitors, a significant amount of DC current flows to the headphone, resulting in unnecessary power dissipation and possible damage to both headphone and headphone amplifier. The DirectDrive architecture uses a charge pump to create an i