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MAX7490/MAX7491 MAX7490 MAX7491 MAX7490CEE MAX7490EEE MAX7491CEE MAX7491EEE - Datasheet Archive

Dual Universal Switched-Capacitor Filters The MAX7490/MAX7491 consist of two identical lowpower, low-voltage, wide dynamic range,

19-1768; Rev 1; 4/09 Dual Universal Switched-Capacitor Filters The MAX7490/MAX7491 MAX7490/MAX7491 consist of two identical lowpower, low-voltage, wide dynamic range, rail-to-rail, 2nd-order switched-capacitor building blocks. Each of the two filter sections, together with two to four external resistors, can generate all standard 2nd-order functions: bandpass, lowpass, highpass, and notch (band reject). Three of these functions are simultaneously available. Fourth-order filters can be obtained by cascading the two 2nd-order filter sections. Similarly, higher order filters can easily be created by cascading multiple MAX7490/MAX7491s. Two clocking options are available: self-clocking (through the use of an external capacitor) or external clocking for tighter cutoff frequency control. The clockto-center frequency ratio is 100:1. Sampling is done at twice the clock frequency, further separating the cutoff frequency and Nyquist frequency. The MAX7490/MAX7491 MAX7490/MAX7491 have an internal rail splitter that establishes a precise common voltage needed for single-supply operation. The MAX7490 MAX7490 operates from a single +5V supply and the MAX7491 MAX7491 operates from a single +3V supply. Both devices feature a low-power shutdown mode and come in a 16-pin QSOP package. _Applications Tunable Active Filters Multipole Filters ADC Anti-Aliasing Post-DAC Filtering Adaptive Filtering Phase-Locked Loops (PLLs) Features o Dual 2nd-Order Filter in a 16-Pin QSOP Package o High Accuracy Q Accuracy: ±0.2% Clock-to-Center Frequency Error: ±0.2% o Rail-to-Rail Input and Output Operation o Single-Supply Operation: +5V (MAX7490 MAX7490) or +3V (MAX7491 MAX7491) o Internal or External Clock o Highpass, Lowpass, Bandpass, and Notch Filters o Clock-to-Center Frequency Ratio of 100:1 o Internal Sampling-to-Center Frequency Ratio of 200:1 o Center Frequency up to 40kHz o Easily Cascaded for Multipole Filters o Low-Power Shutdown: < 1µA Supply Current Ordering Information PART TEMP RANGE SUPPLY PINVOLTAGE PACKAGE (+V) MAX7490CEE MAX7490CEE+ 0°C to +70°C 16 QSOP 5 MAX7490EEE MAX7490EEE+ -40°C to +85°C 16 QSOP 5 MAX7491CEE MAX7491CEE+ 0°C to +70°C 16 QSOP 3 MAX7491EEE MAX7491EEE+ -40°C to +85°C 16 QSOP +Denotes a lead(Pb)-free/RoHS-compliant package. 3 Set-Top Boxes Pin Configuration TOP VIEW + LPA 1 16 LPB BPA 2 15 BPB 14 NB/HPB NA/HPA 3 Typical Application Circuit appears at end of data sheet. INVA 4 SA 5 MAX7490 MAX7490 MAX7491 MAX7491 SHDN 6 13 INVB 12 SB 11 COM GND 7 10 EXTCLK VDD 8 9 CLK QSOP _ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX7490/MAX7491 MAX7490/MAX7491 General Description MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters ABSOLUTE MAXIMUM RATINGS VDD to GND .-0.3V to +6V EXTCLK, SHDN to GND .-0.3V to +6V INV_, LP_, BP_, N_/HP_, S_, COM, CLK to GND.-0.3V to (VDD + 0.3V) Maximum Current into Any Pin .50mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.30mW/°C above +70°C).667mW Operating Temperature Range MAX749 MAX749_CEE .0°C to +70°C MAX749 MAX749_EEE .-40°C to +85°C Die Temperature .+150°C Storage Temperature.-65°C to +150°C Lead Temperature (soldering, 10s) .+300°C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS-MAX7490 CHARACTERISTICS-MAX7490 (VDD = VEXTCLK = +5V; fCLK = 625kHz; 10k || 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to GND; 50% duty-cycle clock input; COM = VDD/2; TA = TMIN to TMAX. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS FILTER Center Frequency Range Clock-to-Center Frequency Accuracy fO 0.001 to 40 Mode 1 kHz Q Accuracy Mode 1, R1 = R3 = 50k , R2 = 10k, Q = 5, deviation from 100:1 ±0.2 ±0.7 Mode 1, R1 = R3 = 50k, R2 = 10k, Q = 5 fCLK/fO ±0.2 ±2 % % fO Temperature Coefficient ±1 ppm/°C Q Temperature Coefficient ±5 ppm/°C Mode 1, R1 = R2 = 10k ±0.1 ±0.5 VOS1 DC offset of input inverter ±3 ±12.5 VOS2 DC offset of 1st integrator ±4 ±15 DC offset of 2nd integrator ±4 ±30 fIN = 10kHz -60 DC Lowpass Gain Accuracy DC Offset Voltage (Figure 8) VOS3 Crosstalk (Note 2) Input: COM externally driven Output: COM internally driven COM Voltage Range Input Resistance at COM VDD/2 - 0.5 VDD/2 - 0.2 VCOM 140 Output Voltage Swing VDD/2 VDD/2 + 0.5 VDD/2 VDD/2 + 0.2 250 325 k VRMS 60 VRMS 0.2 VDD - 0.2 ±0.1 SHDN = GND, VCOM = 0 to VDD Input Leakage Current at COM dB 200 Up to 5th harmonic of fCLK Mode 1, R1 = R2 = R3 =10k, LP output, Q=1 Noise (Note 3) mV V RCOM Clock Feedthrough % V ±10 A CLOCK Maximum Clock Frequency Internal Oscillator Frequency (Note 4) Clock Input High 2 fCLK fOSC 4 EXTCLK = GND, COSC = 1000pF 95 EXTCLK = GND, COSC = 100pF 135 1.35 VDD - 0.5 _ MHz 175 kHz MHz V Dual Universal Switched-Capacitor Filters (VDD = VEXTCLK = +5V; fCLK = 625kHz; 10k || 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to GND; 50% duty-cycle clock input; COM = VDD/2; TA = TMIN to TMAX. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP Clock Input Low MAX 0.5 50 ± 5 Clock Duty Cycle UNITS V % SHDN AND EXTCLK Input High VIH Input Low VIL Input Leakage Current VDD - 0.5 V 0.5 V ±10 A 5.5 V 4.0 mA 1 ±0.4 VINPUT = 0 to VDD A POWER REQUIREMENTS Supply Voltage VDD Power-Supply Current IDD Shutdown Current ISHDN 4.5 No external load, mode 1, R1 = R3 = 50k, R2 = 10k, Q = 5 SHDN = GND INTERNAL OP AMPS CHARACTERISTICS Output Short-Circuit Current ±18 mA RL 10k, CL 50pF 130 dB GBW RL 10k, CL 50pF 7 MHz SR RL 10k, CL 50pF 6.4 V/s DC Open-Loop Gain Gain Bandwidth Product Slew Rate 3.5 _ 3 MAX7490/MAX7491 MAX7490/MAX7491 ELECTRICAL CHARACTERISTICS-MAX7490 CHARACTERISTICS-MAX7490 (continued) MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters ELECTRICAL CHARACTERISTICS-MAX7491 CHARACTERISTICS-MAX7491 (VDD = VEXTCLK = +3V; fCLK = 625kHz; 10k || 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to GND; 50% duty-cycle clock input; COM = VDD/2; TA = TMIN to TMAX. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS FILTER Center Frequency Range Clock-to-Center Frequency Accuracy fO 0.001 to 40 Mode 1 kHz Q Accuracy Mode 1, R1 = R3 = 50k , R2 = 10k, Q = 5, deviation from 100:1 ±0.2 ±0.7 % Mode 1, R1 = R3 = 50k, R2 = 10k, Q=5 fCLK/fO ±0.2 ±2 % fO Temperature Coefficient ±1 ppm/°C Q Temperature Coefficient ±5 ppm/°C Mode 1, R1 = R2 = 10k ±0.1 ±0.5 VOS1 DC offset of input inverter ±3 ±12.5 VOS2 DC offset of 1st integrator ±4 ±15 DC offset of 2nd integrator ±4 ±25 fIN = 10kHz -60 DC Lowpass Gain Accuracy DC Offset Voltage (Figure 8) VOS3 Crosstalk (Note 2) VDD/2 - 0.1 VDD/2 VDD/2 + 0.1 Output: COM internally driven Input Resistance at COM mV dB Input: COM externally driven COM Voltage Range % VDD/2 - 0.1 VDD/2 VDD/2 + 0.1 80 120 VCOM V RCOM 60 k Clock Feedthrough Up to 5th harmonic of fCLK 200 VRMS Noise (Note 3) Mode 1, R1= R2 = R3 = 10k, LP output, Q = 1 60 VRMS Output Voltage Swing 0.2 ±0.1 SHDN = GND, VCOM = 0 to VDD Input Leakage Current at COM VDD - 0.2 V ±10 A CLOCK Maximum Clock Frequency fCLK Internal Oscillator Frequency (Note 4) fOSC 4 EXTCLK = GND, COSC = 1000pF 95 EXTCLK = GND, COSC = 100pF Clock Input High 135 MHz 175 1.35 VDD - 0.5 V Clock Input Low 0.5 50 ±5 Clock Duty Cycle kHz MHz V % SHDN AND EXTCLK Input High VIH Input Low VIL Input Leakage Current 4 VDD - 0.5 V 0.5 VINPUT = 0 to VDD ±0.4 _ V ±10 A Dual Universal Switched-Capacitor Filters (VDD = VEXTCLK = +3V; fCLK = 625kHz; 10k || 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to GND; 50% duty-cycle clock input; COM = VDD/2; TA = TMIN to TMAX. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 3.6 V 4.0 mA 1 A POWER REQUIREMENTS Supply Voltage VDD Power-Supply Current Shutdown Current 2.7 No load, mode 1, R1 = R3 = 50k, R2 = 10k, Q = 5 IDD 3.5 SHDN = GND ISHDN INTERNAL OP AMPS CHARACTERISTICS ±11 Output Short-Circuit Current mA RL 10k, CL 50pF 130 dB GBW RL 10k, CL 50pF 7 MHz SR RL 10k, CL 50pF 6 V/s DC Open-Loop Gain Gain Bandwidth Product Slew Rate Note 1: Resistive loading of the N_/HP_, LP_, BP_ outputs includes the resistors used for the filter implementation. Note 2: Crosstalk between internal filter sections is measured by applying a 1VRMS 10kHz signal to one bandpass filter section input and grounding the input of the other bandpass filter section. The crosstalk is the ratio between the output of the grounded filter section and the 1VRMS input signal of the other section. Note 3: Bandwidth of noise measurement is 80kHz. Note 4: fOSC (kHz) = 135 x 103 / COSC (COSC in pF) Typical Operating Characteristics (VDD = +5V for MAX7490 MAX7490, VDD = +3V for MAX7491 MAX7491, fCLK = 625kHz, VSHDN = VEXTCLK = VDD, COM = VDD/2, Mode 1, R3 = R1 = 50k, R2 = 10k, Q = 5, TA = +25°C, unless otherwise noted.) 2ND-ORDER BANDPASS FILTER FREQUENCY RESPONSE 200 PHASE (%) GAIN (dB) -10 -20 -30 150 100 -40 VDD = +5V fCLK = 625kHz Q=5 50 -50 -60 0 1 10 FREQUENCY (kHz) 100 1 MAX7490-03 MAX7490-03 250 -0.1 fCLK/fO DEVIATION (%) 0 0 MAX7490-02 MAX7490-02 300 MAX7490-01 MAX7490-01 10 CLOCK-TO-CENTER FREQUENCY DEVIATION vs. CLOCK FREQUENCY 2ND-ORDER BANDPASS FILTER PHASE RESPONSE -0.2 VDD = 5V -0.3 VDD = 3V -0.4 -0.5 -0.6 -0.7 -0.8 10 FREQUENCY (kHz) 100 100 1000 10,000 fCLK (kHz) _ 5 MAX7490/MAX7491 MAX7490/MAX7491 ELECTRICAL CHARACTERISTICS-MAX7491 CHARACTERISTICS-MAX7491 (continued) Typical Operating Characteristics (continued) (VDD = +5V for MAX7490 MAX7490, VDD = +3V for MAX7491 MAX7491, fCLK = 625kHz, VSHDN = VEXTCLK = VDD, COM = VDD/2, Mode 1, R3 = R1 = 50k, R2 = 10k, Q = 5, TA = +25°C, unless otherwise noted.) VDD = 3V -0.2 -0.3 -0.4 -0.5 -0.6 0 20 40 60 80 100 -1 -2 -3 -5 -6 -40 -15 10 35 60 100 85 1000 NOISE vs. Q SUPPLY CURRENT vs. TEMPERATURE 3.7 MAX7490-08 MAX7490-08 500 MAX7490-07 MAX7490-07 1.5 450 3.6 400 1.0 -0.5 300 IDD (mA) NOISE (µVRMS) 0 250 200 150 -1.0 VDD = 3V 3.5 350 0.5 10,000 fCLK (kHz) TEMPERATURE (°C) Q DEVIATION vs. TEMPERATURE Q DEVIATION (%) VDD = 3V -4 Q 2.0 MAX7490-06 MAX7490-06 VDD = 5V 0 MAX7490-09 MAX7490-09 -0.1 fCLK/fO DEVIATION (%) fCLK/fO DEVIATION (%) 0 Q DEVIATION vs. CLOCK FREQUENCY 1 Q DEVIATION (%) VDD = 5V 0.1 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 MAX7490-05 MAX7490-05 0.2 CLOCK-TO-CENTER FREQUENCY DEVIATION vs. TEMPERATURE MAX7490-04 MAX7490-04 CLOCK-TO-CENTER FREQUENCY DEVIATION vs. Q 3.4 VDD = 5V 3.3 3.2 100 -1.5 3.1 50 -2.0 3.0 0 -40 -15 10 35 60 0 85 20 40 60 80 -40 100 -15 10 35 60 Q SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX7491 MAX7491 THD + NOISE vs. FREQUENCY 3.9 3.40 3.8 -20 MAX7490-11 MAX7490-11 3.41 MAX7490-10 MAX7490-10 4.0 -30 +85°C fCLK = 3MHz IDD (mA) 3.5 fCLK = 625kHz 3.4 3.37 +25°C 3.36 -40°C 3.35 3.3 THD + NOISE (dB) 3.38 3.6 A = MODE 1 B = MODE 3 -40 3.39 3.7 -50 -60 B A -70 -80 -90 3.34 -100 3.1 3.33 -110 3.0 3.32 fCLK = 2kHz 3.2 3.0 3.5 4.0 4.5 VDD (V) 6 85 TEMPERATURE (°C) MAX7490-12 MAX7490-12 TEMPERATURE (°C) IDD (mA) MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters 5.0 5.5 -120 3.0 3.5 4.0 4.5 VDD (V) 5.0 5.5 1k 10k INPUT FREQUENCY (Hz) _ Dual Universal Switched-Capacitor Filters A = MODE 1 B = MODE 3 A = MODE 1 B = MODE 3 -20 -10 MAX7490-14 MAX7490-14 -10 MAX7490-13 MAX7490-13 -20 -30 MAX7490 MAX7490 THD + NOISE vs. INPUT VOLTAGE MAX7491 MAX7491 THD + NOISE vs. INPUT VOLTAGE MAX7490-15 MAX7490-15 MAX7490 MAX7490 THD + NOISE vs. FREQUENCY A = MODE 1 B = MODE 3 -20 -40 B -70 -80 A THD + NOISE (dB) -60 THD + NOISE (dB) THD + NOISE (dB) -30 -30 -50 -40 -50 -60 B -90 -110 A -80 -120 10k -60 B -80 -90 1k -50 -70 -70 -100 -40 A -90 0 0.5 1.0 1.5 2.0 2.5 0 3.0 1 2 3 4 5 INPUT FREQUENCY (Hz) INPUT VOLTAGE (Vp-p) INPUT VOLTAGE (Vp-p) OUTPUT VOLTAGE SWING vs. LOAD RESISTANCE INTERNAL OSCILLATOR PERIOD vs. SMALL CAPACITANCE INTERNAL OSCILLATOR PERIOD vs. LARGE CAPACITANCE 4.0 3.5 VDD = 3V 3.0 2.5 2000 1500 1000 VDD = 3V 500 VDD = 5V 2.0 12 16 20 0 200 RLOAD (k) TO COM 400 600 800 100 80 VDD = 3V 60 40 VDD = 5V 20 1 1000 2 131 130 129 128 127 144 INTERNAL OSCILLATOR FREQUENCY (kHz) 132 4 5 6 7 INTERNAL OSCILLATOR FREQUENCY vs. TEMPERATURE MAX7490-19 MAX7490-19 COSC = 1000pF 3 CAPACITANCE (nF) CAPACITANCE (pF) INTERNAL OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE 133 120 142 MAX7490-20 MAX7490-20 8 INTERNAL OSCILLATOR FREQUENCY (kHz) 4 140 0 0 0 MAX7490-18 MAX7490-18 INTERNAL OSCILLATOR FREQUENCY (kHz) VDD = 5V 160 MAX7490-17 MAX7490-17 INTERNAL OSCILLATOR FREQUENCY (kHz) 4.5 OUTPUT SWING (Vp-p) 2500 MAX7490-16 MAX7490-16 5.0 COSC = 1000pF 140 138 VDD = 3V 136 134 132 VDD = 5V 130 128 126 124 126 3.0 3.5 4.0 4.5 VDD (V) 5.0 5.5 -40 -15 10 35 60 85 TEMPERATURE (°C) _ 7 MAX7490/MAX7491 MAX7490/MAX7491 Typical Operating Characteristics (continued) (VDD = +5V for MAX7490 MAX7490, VDD = +3V for MAX7491 MAX7491, fCLK = 625kHz, VSHDN = VEXTCLK = VDD, COM = VDD/2, Mode 1, R3 = R1 = 50k, R2 = 10k, Q = 5, TA = +25°C, unless otherwise noted.) Dual Universal Switched-Capacitor Filters MAX7490/MAX7491 MAX7490/MAX7491 Pin Description NAME PIN FUNCTION FILTER A FILTER B LP_ 1 16 2nd-Order Lowpass Filter Output BP_ 2 15 2nd-Order Bandpass Filter Output N_/HP_ 3 14 2nd-Order Notch/Highpass Filter Output INV_ 4 13 Inverting Input of Filter Summing Op Amp S_ 5 12 Summing Input. The connection of the summing input, along with the other resistor connections, determine the circuit topology (mode) of each 2ndorder section. S_ must never be left unconnected. SHDN 6 Shutdown Input. Drive SHDN low to enable shutdown mode; drive SHDN high or connect to VDD for normal operation. GND 7 Ground Pin VDD 8 Positive Supply. Bypass VDD with a 0.1µF capacitor to GND. A low-noise supply is recommended. Input +5V for MAX7490 MAX7490 or +3V for MAX7491 MAX7491. CLK 9 Clock Input. Connect CLK to an external capacitor (COSC) between CLK and ground to set the internal oscillator frequency. For external clock operation, drive CLK with a CMOS-level clock. The duty cycle of the external clock should be between 45% and 55% for best performance. EXTCLK 10 External/Internal Clock Select Input. Connect EXTCLK to VDD when driving CLK externally. Connect EXTCLK to GND when using the internal oscillator. COM 11 Common Pin. Biased internally at VDD/2. Bypass externally to GND with 0.1µF capacitor. To override the internal biasing, drive COM with an external low-impedance source. _Detailed Description The MAX7490/MAX7491 MAX7490/MAX7491 are universal switched-capacitor filters designed with a fixed internal fCLK/fO ratio of 100:1. Operating modes use external resistors connected in different arrangements to realize different filter functions (highpass, lowpass, bandpass, notch) in all of the classical filter topologies (Butterworth, Bessel, elliptic, Chebyshev). Figure 1 shows a block diagram. Clock Signal External Clock The MAX7490/MAX7491 MAX7490/MAX7491 switched-capacitor filters are designed for use with external clocks that have a 50% ±5% duty cycle. When using an external clock, drive the EXTCLK pin high or connect to VDD. Drive CLK with CMOS logic levels (GND and VDD). Varying the rate of 8 the external clock adjusts the center frequency of the filter: fO = fCLK /100 Internal Clock When using the internal oscillator, drive the EXTCLK pin low or connect to GND and connect a capacitor (COSC) between CLK and GND. The value of the capacitor (COSC) determines the oscillator frequency as follows: fOSC (kHz) = 135 x 103 / COSC (pF) Since COSC is in the low picofarads, minimize the stray capacitance at CLK so that it does not affect the internal oscillator frequency. Varying the frequency of the internal oscillator adjusts the filter's center frequency by a 100:1 clock-to-center frequency ratio. For example, an internal oscillator frequency of 135kHz produces a nominal center frequency of 1.35kHz. _ Dual Universal Switched-Capacitor Filters MAX7490/MAX7491 MAX7490/MAX7491 SHDN (6) VDD (8) INVA (4) BPA (2) NA/HPA (3) + R - LPA (1) COM (11) NB/HPB (14) SA (5) + R INVB (13) - BPB (15) LPB (16) GND (7) CLK (9) SB (12) EXTCLK (10) Figure 1. Block Diagram 2nd-Order Filter Stage The MAX7490/MAX7491 MAX7490/MAX7491 are dual biquad filters. The biquad topology allows the use of standard filter tables and equations to implement simultaneous lowpass, bandpass, and notch or highpass filters. Topologies such as Butterworth, Chebyshev, Bessel, elliptic, as well as custom algorithms are possible. Internal Common Voltage The COM pin sets the common-mode input voltage and is internally biased to VDD/2 with a resistor-divider. The resistors used are typically 250k for the MAX7490 MAX7490, and typically 80k for the MAX7491 MAX7491. The commonmode voltage is easily overdriven by an external voltage supply if desired. Bypass COM to the analog ground with at least a 0.1µF capacitor. Inverting Inputs Locate resistors that are connected to INV_ as close as possible to INV_ to reduce stray capacitance and noise pickup. INV_ are inverting inputs to continuous-time op amps, and behave like a virtual ground. There is no sampling energy present on these inputs. Outputs Each switched-capacitor section, together with two to four external resistors, can generate all standard 2ndorder functions: bandpass, lowpass, highpass, and notch (band-reject) functions. Three of these functions are simultaneously available. The maximum signal swing is limited by the power-supply voltages used. The amplifiers' outputs in the MAX7490/MAX7491 MAX7490/MAX7491 are able to swing to within approximately 0.2V of either supply. Driving coaxial cable, large capacitive loads, or total resistive loads less than 10k will degrade the total harmonic distortion (THD) performance. Note that the effective resistive load at the output must include both the feedback resistors and any external load resistors. Low-Power Shutdown Mode The MAX7490/MAX7491 MAX7490/MAX7491 have a shutdown mode that is activated by driving SHDN low. In shutdown mode, the filter supply current reduces to < 1µA (max), and the filter outputs become high impedance. The COM input also becomes high impedance during shutdown. For normal operation, drive SHDN high or connect to VDD. _Applications Information Designing with the MAX7490/MAX7491 MAX7490/MAX7491 begins by selecting the mode that best fits the desired circuit requirements. Table 1 lists the available modes and their relative advantages and disadvantages. Table 2 lists the different nomenclature used in the explanations that follow. _ 9 MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters Table 1. Filter Operating Modes MODE LP 1 HP BP N LP-N* HP-N* · · · fCLK/fO ratio is the nominal value. Good for bandpass filters with identical sections cascaded, higher order Butterworth filters, high-Q bandpass, low-Q notches. 1B · · · Same as Mode 1 with fCLK/fO ratios greater than the nominal value. 2 · · · Combination of Mode 1 and Mode 3; fCLK/fO ratios always less than the nominal value. Less sensitivity to resistor tolerances than Mode 3. Extension of Mode 2 that allows higher frequencies. Highpass and lowpass outputs are summed with external op amp and two resistors. Good for lowpass elliptic filters. · 2N 3 · · · · · Adjustable fO above and below the nominal frequency. Commonly used for multiple-pole Chebyshev filters, all-pole higher order bandpass, lowpass, and highpass filters. · 3A COMMENTS · · Extension of Mode 3 that needs an external op amp and two additional resistors. Commonly used for lowpass or higher elliptic or Cauer filters. *LP-N = lowpass notch, HP-N = highpass notch. Both require an external op amp. See Definition of Terms (Table 2). Table 2. Definition of Terms TERM fCLK fO fNOTCH Q DEFINITION The clock frequency applied to the switched-capacitor filter. The center frequency of the 2nd-order complex pole pair, fO, is determined by measuring the peak response frequency at the bandpass output. The frequency of minimum amplitude response at the notch output. Quality factor, or Q, is the ratio of fO to the -3dB bandwidth of the 2nd-order bandpass filter. Q also determines the amount of amplitude peaking at the lowpass and highpass outputs, but is not measured at these outputs. HOBP HOLP The gain in V/V of the lowpass output at f0Hz. HOHP The gain in V/V of the highpass output at ffCLK/2. HON1 The notch output gain as f0Hz. HON2 The notch output gain at f = fCLK/2. LP-N A notch output with HON1 > HON2. HP-N 10 The gain in V/V of the bandpass output at f = fO. A notch output with HON1 < HON2. _ Dual Universal Switched-Capacitor Filters R6 R3 R3 R2 N S BP LP R5 COM R2 N R1 VIN + S BP LP R1 - COM VIN + - COM Figure 2. Mode 1, 2nd-Order Filter Providing Notch, Bandpass, and Lowpass Outputs Figure 3. Mode 1B, 2nd-Order Filter Providing Notch, Bandpass, and Lowpass Outputs Mode 1 Figure 2 shows the MAX7490/MAX7491s' configuration of Mode 1. This mode provides 2nd-order notch, lowpass, and bandpass filter functions. The gain at all three outputs is inversely proportional to the value of R1. The center frequency, fO, is fixed at fCLK/100. HighQ bandpass filters can be built without exceeding the bandpass amplifier's output swing (i.e., HOBP does not have to track Q). The notch and bandpass center frequencies are identical. The notch output gain is the same above and below the notch center frequency. Mode 1 can also be used to make high-order Butterworth lowpass filters, low Q notches, and multiple-order bandpass filters obtained by cascading identical switched-capacitor sections. Mode 1 Design Equations Mode 1B Figure 3 shows the configuration of Mode 1B. R5 and R6 are added to lower the feedback voltage from the lowpass output to the summing input. This allows the clock-to-center frequency to be adjusted beyond the nominal value. This mode essentially has the same functions and speed as Mode 1 while providing a highQ with fCLK/fO ratios greater than the nominal value. Mode 1B Design Equations f fO = CLK 100 fnotch = fO R3 Q= R2 -R2 HOLP = R1 -R 3 HOBP = R1 HON1(as f 0Hz) = f fO = CLK 100 fn = fO Q= R3 R2 HOLP = HOBP = R6 R6 + R5 R6 R6 + R5 R6 + R5 -R2 R1 R6 -R 3 R1 HON1(as f 0Hz) = -R2 R1 HON2 (at f = fCLK / 2) = -R2 R1 HON2 (at f = fCLK / 2) = -R2 R1 -R2 R1 Mode 2 Figure 4 shows the configuration of Mode 2. Mode 2 is a combination of Mode 1 and Mode 3. In this mode, fCLK/fO is always less than the part's nominal ratio. However, it provides less sensitivity to resistor tolerances than does Mode 3. It has a highpass notch output where the notch frequency depends solely on the clock frequency. _ 11 MAX7490/MAX7491 MAX7490/MAX7491 CC CC MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters Mode 2 Design Equations f fO = CLK 100 fCLK fn = 100 Q= R3 R2 1+ 1+ CC R2 R4 R4 R3 R2 HP/N VIN R2 + R4 R4 -R2 HOLP = R1 R4 + R2 HOBP = S BP - COM -R 3 R1 HON1( f 0Hz) = Figure 4. Mode 2, 2nd-Order Filter Providing a Highpass Notch, Bandpass, and Lowpass Outputs -R2 R4 R1 R4 + R2 HON2 (at f = fCLK / 2) = Mode 2N Design Equations -R2 f fO = CLK 100 1+ f fn = CLK 100 R1 Mode 2N Figure 5 shows the configuration of Mode 2N. This mode extends the topology of Mode 3A to Mode 2, where the highpass and lowpass outputs are summed through two external resistors, RH and RL, to create a lowpass notch filter that has higher frequency than the one in Mode 2. Mode 2 is most useful in lowpass elliptic designs. When cascading the sections of the MAX7490/MAX7491 MAX7490/MAX7491, the highpass and lowpass outputs can be summed directly into the inverting input of the next section. Only one external op amp is needed. R 1+ H RL Q= R3 R2 1+ R2 R4 R2 R4 R R HON1(f 0Hz) = G + G RH RL R2 R4 R1 R4 + R2 CC R4 R3 R2 HP/N S BP LP R1 - VIN + COM RG RL LOWPASS NOTCH OUTPUT RH COM Figure 5. Mode 2N, 2nd-Order Filter Providing a Lowpass Notch Output 12 LP R1 _ Dual Universal Switched-Capacitor Filters R4 R3 R2 HP VIN BP S LP COM R1 + - COM R2 R4 f fO = CLK 100 CC Figure 6. Mode 3, 2nd-Order Section Providing Highpass, Bandpass, and Lowpass Outputs R3 R2 R2 R4 -R2 HOHP = R1 -R4 HOLP = R1 -R3 HOBP = R1 Q= Mode 3A Figure 7 shows the configuration of Mode 3A. Similar to Mode 2, this mode adds an external op amp. See Table 3 for op amp selection ideas. This op amp creates a highpass notch and lowpass notch by summing the highpass and lowpass outputs through two external resistors, RH and RL. The ratio of resistors RH and RL adjusts the notch frequency, while R2 and R4 adjust the bandpass center frequency, since the notch (zero pair) frequency can be adjusted to both above and below fO. Mode 3A is suitable for both lowpass and highpass elliptic or Cauer filters. In multipole elliptic filters, only one external op amp is needed. Use the inverting input of the internal op amp as the summing node for all but the final section of the filter. CC R4 R3 R2 S N/HP BP LP COM R1 - VIN + RG RL COM LOWPASS NOTCH OUTPUT RH COM Figure 7. Mode 3A, 2nd-Order Filter Providing Highpass Notch or Lowpass Notch Outputs _ 13 MAX7490/MAX7491 MAX7490/MAX7491 Mode 3 Figure 6 shows the configuration of Mode 3. This mode is a sampled time (Z transform) equivalent of the classical 2nd-order state variable filter. In this versatile mode, the ratio of resistors R2 and R4 can move the center frequency both above and below the nominal ratio. Mode 3 is commonly used to make multiple-pole Chebyshev filters with a single clock frequency. This mode can also be used to make high-order all-pole bandpass, lowpass, and highpass filters. Mode 3 Design Equations MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters Table 3. Suggested External Op Amps PART GBW (MHz) SLEW RATE (V/s) 2 0.7 ISUPPLY/AMP (mA) 0.5 PIN-PACKAGE MAX4281 MAX4281 MAX4322 MAX4322 5 2.0 1.1 5 SOT23 MAX4130 MAX4130 10 4.0 1.15 5 SOT23 MAX4490 MAX4490 10 10.0 2.0 5 SOT23 5 SOT23 Offset Voltage Mode 3A Design Equations f fO = CLK 100 R2 R4 f fn = CLK 100 Q= Switched-capacitor integrators generally exhibit higher input offsets than discrete RC integrators. The larger offset is mainly due to the charge injection of the CMOS switches into the integrating capacitors. The internal op amp offset also adds to the overall offset value. Figure 8 shows the input offsets from a single 2nd-order section. Table 4 lists the formula for the output offset voltage for various modes and output pins. RH RL R3 R2 R2 R4 -R2 HOHP = HOLP = HOBP = Power Supplies The MAX7490 MAX7490 operates from a single +5V supply, and the MAX7491 MAX7491 operates from a single +3V supply. Bypass VDD to GND with at least a 0.1µF capacitor. VDD should be isolated from other digital or high-voltage analog supplies. If dual supplies are required, connect the COM pin to the system ground and the GND pin to the negative supply. Figure 9 shows an example of dual-supply operation. Single-supply and dual-supply performances are equivalent. For dual-supply operation, drive CLK, SHDN, and EXTCLK from GND (which is now V-) to VDD. If using the internal oscillator in dualsupply mode, COSC can be returned to either GND or the actual ground voltage. Use the MAX7490 MAX7490 for ±2.5V and use the MAX7491 MAX7491 for ±1.5V. For most applications, a 0.1µF bypass capacitor from COM to GND is sufficient. If the VDD supply has significant 60Hz energy, increase this capacitor to 1µF or greater to provide better power-supply rejection. R1 -R4 R1 -R 3 R1 HON1(f 0Hz) = RG R4 RL R1 HON2 (at f = fCLK / 2) = RG R2 RH R1 Note: When the passband gain error exceeds 1dB, the use of capacitor CC between the lowpass output and the inverting input will reduce the gain error. The value can best be determined experimentally. Typically, it should be about 5pF/dB (CC-MAX = 15pF). INV BP N/HP + COM LP VOS1 VOS2 - VOS3 S Figure 8. Block Diagram of a 2nd-Order Section Showing the Input Offsets 14 _ Dual Universal Switched-Capacitor Filters MODE VOSN/HP VOSBP VOSLP 1 VOS1[1 + (R2 / R3) + (R2 / R1)] - (VOS3) (R2 / R3) VOS3 VOSN/HP - VOS2 1b VOS1[1 + (R2 / R3) + (R2 / R1)] - (VOS3) (R2 / R3) VOS3 (VOSN/HP - VOS2)[1 + R5 / R6)] 2 VOS1[1 + (R2 / R3) + (R2 / R1) + (R2 / R4) (VOS3)(R2 / R3)][R4 / R2 + R4] + (VOS2)[R2 / R2 + R4] VOS3 VOSN/HP - VOS2 3 VOS2 VOS3 VOS1[1 + (R4 / R1) + (R4 / R2) + (R4 / R3)] - (VOS2) (R4 / R2) - (VOS3)(R4 / R3) Aliasing V+ VDD * SHDN 0.1F COM V+ V- CLOCK CLK MAX7490 MAX7490 MAX7491 MAX7491 0.1F GND *DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE. V- Figure 9. Dual-Supply Operation Input Signal Amplitude Range The optimal input signal range is determined by observing the voltage level at which the signal-to-noise plus distortion (SINAD) ratio is maximized for a given corner frequency. The Typical Operating Characteristics show the THD + Noise response as the input signal's peak-to-peak amplitude is varied. In most systems, the input signal should be kept as large as possible to maximize the signal-to-noise ratio (SNR). Allow sufficient headroom to ensure no signal clipping under expected operating conditions. Anti-Aliasing and Post-DAC Filtering When using the MAX7490/MAX7491 MAX7490/MAX7491 for anti-aliasing or post-DAC filtering, synchronize the DAC (or ADC) and the filter clocks. If the clocks are not synchronized, beat frequencies may alias into the desired passband. Aliasing is an inherent phenomenon of most switchedcapacitor filters. As with all sampled systems, frequency components of the input signal above one half the sampling rate will be aliased. The MAX7490/MAX7491 MAX7490/MAX7491 sample at twice the clock frequency, yielding a 200:1 sampling to cutoff frequency ratio. In particular, input signal components (fIN) near the sampling rate generate a difference frequency (fSAMPLING - fIN) that often falls within the passband of the filter. Such aliased signals, when they appear at the output, are indistinguishable from real input information. For example, the aliased output signal generated when a 99kHz waveform is applied to a filter sampling at 100kHz, (fCLK = 50kHz) is 1kHz. This waveform is an attenuated version of the output that would result from a true 1kHz input. Since sampling is done at twice the clock frequency, the Nyquist frequency is the same as the clock frequency. A simple passive RC lowpass input filter is usually sufficient to remove input frequencies that can be aliased. In many cases, the input signal itself may be band limited and require no special anti-alias filtering. Selecting a passive filter cutoff frequency equal to fC/2 gives 12dB rejection at the Nyquist frequency. Clock Feedthrough Clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter's output pins, even without input signal. The clock feedthrough can be greatly reduced by adding a simple RC lowpass network at the final filter output. Choose a cutoff frequency as low as possible to provide maximum noise attenuation. The attenuation and phase shift of the external filter will limit the actual frequency selected. _ 15 MAX7490/MAX7491 MAX7490/MAX7491 Table 4. Output DC Offsets for a 2nd-Order Section MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters Table 5. Cascading Identical Bandpass Filter Sections TOTAL SECTIONS TOTAL BW TOTAL Q 1 1.000 B 1.00 Q 2 0.644 B 1.55 Q 3 0.510 B 1.96 Q 4 0.435 B 2.30 Q 5 0.386 B Multiple Filter Stages In some designs, such as very narrow band filters, or in modes where fO cannot be tuned with resistors, several 2nd-order sections with identical fO may be cascaded without multiple feedback. The total Q of the resultant filter (QT) is: 2.60 Q Wideband Noise The wideband noise of the filter is the total RMS value of the device's noise spectral density and is used to determine the operating SNR. Most of its frequency contents lie within the filter's passband and cannot be reduced with postfiltering. The total noise depends mainly on the Q of each filter section and the cascade sequence. Therefore, in multistage filters, place the section with the highest Q first for lower output noise. 16 Total QT = Q / (2 1/ N - 1) 1/ 2 Q is the Q of each individual filter section, and N is the number of 2nd-order sections. In Table 5, the total Q and total bandwidth (BW) are listed for up to five identical 2nd-order sections. B is the bandwidth of each section. Chip Information PROCESS: BiCMOS _ Dual Universal Switched-Capacitor Filters 4TH-ORDER 10kHz BANDPASS FILTER R1B 200k LPA BPB R2A 10k NA/HPA R1 200k 4TH-ORDER 10kHz BANDPASS FILTER FREQUENCY RESPONSE OUT LPB BPA R3A 200k R3B 200k MAX7490 MAX7490 MAX7491 MAX7491 5 0 R2B 10k -5 NB/HPB VIN INVA SA GAIN (dB) -10 INVB SB -15 -20 -25 SHDN -30 COM GND EXTCLK VDD CLK C2 0.1F -35 -40 8 VDD fCLK = 1MHz 9 10 11 12 FREQUENCY (kHz) C1 0.1F Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 16 QSOP E16+4 21-0055 _ 17 MAX7490/MAX7491 MAX7490/MAX7491 Typical Application Circuit MAX7490/MAX7491 MAX7490/MAX7491 Dual Universal Switched-Capacitor Filters Revision History REVISION NUMBER REVISION DATE 0 7/00 Initial release 1 4/09 Changes to add lead-free packages, style edits DESCRIPTION PAGES CHANGED - 110, 16, 17, 18 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 _Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.