MAX3664 MAX3675 MAX3664E/D MAX3664ESA MAX3664EUA MAX3664-04 MAX3664-06 - Datasheet Archive
KIT ATION EVALU E AILABL AV 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET The MAX3664 low-power
19-0479; Rev 0; 3/96 KIT ATION EVALU E AILABL AV 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET The MAX3664 MAX3664 low-power transimpedance preamplifier for 622Mbps SDH/SONET applications consumes only 85mW. Operating from a single +3.3V supply, it converts a small photodiode current to a measurable differential voltage. A DC cancellation circuit provides a true differential output swing over a wide range of input current levels, thus reducing pulse-width distortion. The differential outputs are back-terminated with 60 per side. The transimpedance gain is nominally 6k. For input signal levels beyond approximately 100µAp-p, the amplifier will limit the output swing to 900mV. The MAX3664 MAX3664's low 55nA input noise provides a typical sensitivity of -33.2dBm in 1300nm, 622Mbps receivers. The MAX3664 MAX3664 is designed to be used in conjunction with the MAX3675 MAX3675 clock recovery and data retiming IC with limiting amplifier. Together, they form a complete 3.3V, 622Mbps SDH/SONET receiver. In die form, the MAX3664 MAX3664 is designed to fit on a header with a PIN diode. It includes a filter connection, which provides positive bias for the photodiode through a 1k resistor to VCC. The device is also available in 8-pin SO and µMAX packages. _Features o Single +3.3V Supply Operation o 55nARMS Input-Referred Noise o 6k Gain o 85mW Power o 300µA Peak Input Current o 200ps Max Pulse-Width Distortion o Differential Output Drives 100 Load o 590MHz Bandwidth _Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX3664E/D MAX3664E/D -40°C to +85°C Dice MAX3664ESA MAX3664ESA MAX3664EUA MAX3664EUA* -40°C to +85°C -40°C to +85°C 8 SO 8 µMAX * Contact factory for package availability. _Applications SDH/SONET Receivers PIN/Preamplifier Receivers Pin Configuration appears at end of data sheet. Regenerators for SDH/SONET _Typical Application Circuit VCC (+3.3V) 0.01µF VCC (+3.3V) 1k 100pF (FILT) 0.01µF VCC INREF2 INREF1 OUT+ LIMITING AMP 100 MAX3664 MAX3664 OUTCOMP IN DATA AND CLOCK RECOVERY DATA CLK 0.01µF GND MAX3675 MAX3675 400pF ( ) ARE FOR MAX3664E/D MAX3664E/D (DICE) ONLY. _ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 MAX3664 MAX3664 _General Description MAX3664 MAX3664 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET ABSOLUTE MAXIMUM RATINGS VCC .-0.5V to +5.5V Continuous Current IN, INREF1, INREF2, COMP, FILT.5mA OUT+, OUT-.25mA Continuous Power Dissipation (TA = +85°C) SO (derate 5.88mW/°C above +85°C) .383mW µMAX (derate 4.1mW/°C above +85°C) .268mW Operating Junction Temperature (die) .-55°C to +175°C Processing Temperature (die) .+400°C Storage Temperature Range .-65°C to +160°C Lead Temperature (soldering, 10sec) .+300°C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +3.3V ±0.3V, COMP = GND, 100 load between OUT+ and OUT-, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Notes 1, 2) PARAMETER Input Bias Voltage SYMBOL VIN Gain Nonlinearity CONDITIONS MIN TYP MAX 0.8 0.95 V ±5 IIN = 0µA to 300µA % IIN = 0µA to 20µA UNITS Supply Current ICC IIN = 0µA 12 25 35 mA Small-Signal Transimpedance z21 Differential output 4.5 6 7.5 k Output Common-Mode Level VCC - 1.3 Power-Supply Rejection Ratio PSRR f < 1MHz, referred to output Differential Output Offset VOUT ±7 IIN = 200µA, CCOMP = 400pF Output Impedance (per side) Maximum Output Voltage Filter Resistor (die only) mV 20 dB 40 60 75 950 mV 800 ZOUT VOUT(max) V 1000 1200 IIN = 300µA RFILT Note 1: Dice are tested at Tj = +27°C. Note 2: µMAX package tested at TA = 0°C to +85°C. AC ELECTRICAL CHARACTERISTICS (VCC = +3.3V ±0.3V, CCOMP = 400pF, CIN = 1.1pF, outputs terminated into 50, 8-pin SO package in MAX3664 MAX3664 EV board, TA = +25°C, unless otherwise noted.) (Notes 3, 4) PARAMETER Small-Signal Bandwidth SYMBOL BW-3dB CONDITIONS Relative to gain at 10MHz MIN TYP 590 Low-Frequency Cutoff Pulse-Width Distortion (Note 5) RMS Noise Referred to Input 2µA to 100µA peak input current, 50% duty cycle, 10 pattern 6 kHz 100 PWD ps 100µA to 300µA peak input current, 50% duty cycle, 10 pattern in UNITS MHz 150 80 CIN = 0.3pF (Note 6), IIN = 0µA 55 CIN = 1.1pF (Note 6), IIN = 0µA 73 Note 3: AC Characteristics are guaranteed by design. Note 4: CIN is the total capacitance at IN. Note 5: PWD = 2 x Pulse width - Period | | 2 Note 6: DC to 470MHz, measured with 3-pole Bessel filter at output. 2 MAX _ 200 86 nA 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET SMALL-SIGNAL GAIN vs. FREQUENCY 40 IIN = 300µA COMP CONNECTED TO GROUND 72 COMP CONNECTED THROUGH 400pF TO GROUND 70 68 100 50 66 CIN IS SOURCE CAPACITANCE PRESENTED TO DIE. INCLUDES PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE 10 IIN = 100µA 0 64 62 60 0 -40 30 -5 65 -50 10k 100 1M 100k 10M 100M 1G JUNCTION TEMPERATURE (°C) -40 FREQUENCY (Hz) INPUT-REFERRED RMS NOISE CURRENT vs. DC INPUT CURRENT 10G SMALL-SIGNAL TRANSIMPEDANCE vs. TEMPERATURE VCC = 3.6V CIN = 0.5pF 6200 6100 VCC = 3V 6000 1 10 100 1000 CIN = 1.0pF 550 CIN = 1.5pF 500 450 MEASUREMENT FREQUENCY = 20MHz CIN IS SOURCE CAPACITANCE PRESENTED TO DIE. INCLUDES PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE 400 5800 0.1 85 600 5900 10 65 650 BANDWIDTH (MHz) 100 45 BANDWIDTH vs. TEMPERATURE 6300 TRANSIMPEDANCE () CSTC = 0.5pF, 470MHz BANDWIDTH 25 0 AMBIENT TEMPERATURE (°C) 6400 MAX3664-04 MAX3664-04 1000 -25 MAX3664-06 MAX3664-06 20 MAX3664-05 MAX3664-05 NOISE (nA) CIN = 0.5pF 30 RMS NOISE CURRENT (nA) MAX3664 MAX3664 IN EV BOARD 150 74 CIN = 1.0pF 60 50 200 76 CIN = 1.5pF 70 MAX3664 MAX3664 IN EV BOARD 78 PWD (ps) 80 80 MAX3664-02 MAX3664-02 470MHz BANDWIDTH GAIN (dB) 90 MAX3664-01 MAX3664-01 100 PULSE-WIDTH DISTORTION vs. TEMPERATURE MAX3664-03 MAX3664-03 INPUT-REFERRED NOISE vs. TEMPERATURE -40 30 -5 -40 100 65 30 -5 100 65 JUNCTION TEMPERATURE (°C) JUNCTION TEMPERATURE (°C) LOW-FREQUENCY CUTOFF vs. AVERAGE INPUT CURRENT DATA-DEPENDENT JITTER vs. INPUT SIGNAL AMPLITUDE OUTPUT COMMON-MODE VOLTAGE (REFERENCED TO VCC) vs. TEMPERATURE CCOMP = 50pF 200 CCOMP = 100pF 150 CCOMP = 200pF 100 CCOMP = 400pF 50 100 CCOMP = 100pF 80 CCOMP = 200pF CCOMP = 400pF 60 CCOMP = 800pF 40 INPUT: 213 - 1 PRBS CONTAINS 72 ZEROS 20 CCOMP = 1000pF 0 20 40 60 80 100 120 140 160 AVERAGE INPUT CURRENT (µA) -1.20 VCC = 3.0V -1.25 VCC = 3.3V -1.30 -1.35 VCC = 3.6V -1.40 0 0 -1.15 MAX3664-09 MAX3664-09 250 EXTINCTION RATIO > 10 COMMON-MODE VOLTAGE (V) MAX3664-07 MAX3664-07 120 PEAK-TO-PEAK JITTER (ps) LOW-FREQUENCY CUTOFF (kHz) 300 MAX3664-08 MAX3664-08 DC INPUT CURRENT (µA) 0 50 100 150 200 250 PEAK-TO-PEAK AMPLITUDE (µA) 300 -40 -20 0 20 40 60 80 100 AMBIENT TEMPERATURE (°C) _ 3 MAX3664 MAX3664 _Typical Operating Characteristics (VCC = +3.3V, CCOMP = 400pF, TA = +25°C, unless otherwise noted.) _Typical Operating Characteristics (continued) (VCC = +3.3V, CCOMP = 400pF, TA = +25°C, unless otherwise noted.) VCC = 3.6V 700 MAX3664-12 MAX3664-12 MAX3664-11 MAX3664-11 MAX3664-10 MAX3664-10 800 INPUT = 300µAp-p EYE DIAGRAM (INPUT = 300µAp-p) EYE DIAGRAM (INPUT = 10µAp-p) OUTPUT AMPLITUDE vs. TEMPERATURE AMPLITUDE (mV) MAX3664 MAX3664 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET VCC = 3.3V 600 VCC = 3.0V 100mV/ div 10mV/ div 500 400 300 INPUT: 213 - 1 PRBS CONTAINS 72 ZEROS INPUT: 213 - 1 PRBS CONTAINS 72 ZEROS 200 -40 -20 0 20 40 60 80 100 300ps/div 300ps/div AMBIENT TEMPERATURE (°C) _Pin Description VCC PIN NAME 1 VCC 2 IN 3, 4 INREF1, INREF2 FUNCTION 1k D1 (FILT) +3.3V Supply Voltage RF 5 6 7 8 - Signal Input 6k Input References 1 and 2. Connect to photodetector AC ground. GND OUT+ Q2 Ground Noninverting Voltage Output. Current flowing into IN causes VOUT+ to increase. VCC VCC OUT- COMP IN Q1 FILT* Filter Connection. Provides positive bias for photodiode through a 1k resistor to VCC. See Step 3: Designing Filters. (This pad is accessible on the die only.) PARAPHASE AMP Q3 R2 TRANSIMPEDANCE AMP R3 R4 Q4 DC CANCELLATION AMP INREF2 MAX3664 MAX3664 COMP ( ) ARE FOR MAX3664E/D MAX3664E/D (DIE) ONLY. * MAX3664E/D MAX3664E/D (die) only. Figure 1. Functional Diagram 4 OUT+ VCC INREF1 Inverting Voltage Output. Current flowing into IN causes VOUT- to decrease. External Compensation Capacitor for DC cancellation loop. Connect 400pF or more from COMP to GND for normal operation. Connect COMP directly to GND to disable the DC cancellation loop. R1 _ OUT- 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET The MAX3664 MAX3664 is a transimpedance amplifier designed for 622Mbps SDH/SONET applications. It comprises a transimpedance amplifier, a paraphase amplifier with emitter-follower outputs, and a DC cancellation loop. Figure 1 is a functional diagram of the MAX3664 MAX3664. Transimpedance Amplifier The signal current at IN flows into the summing node of a high-gain amplifier. Shunt feedback through RF converts this current to a voltage with a gain of 6k. Diode D1 clamps the output voltage for large input currents. INREF1 is a direct connection to the emitter of the input transistor, and must be connected directly to the photodetector AC ground return for best performance. Paraphase Amplifier The paraphase amplifier converts single-ended inputs to differential outputs, and introduces a voltage gain of 2. This signal drives a pair of internally biased emitter followers, Q2 and Q3, which form the output stage. Resistors R1 and R2 provide back-termination at the output, absorbing reflections between the MAX3664 MAX3664 and its load. The output emitter followers are designed to drive a 100 differential load between OUT+ and OUT-. They can also drive higher output impedances, resulting in increased gain and output voltage swing. DC Cancellation Loop The DC cancellation loop removes the DC component of the input signal by using low-frequency feedback. This feature centers the signal within the MAX3664 MAX3664's dynamic range, reducing pulse-width distortion on large input signals. The output of the paraphase amplifier is sensed through resistors R3 and R4 and then filtered, amplified, and fed back to the base of transistor Q4. The transistor draws the DC component of the input signal away from the transimpedance amplifier's summing node. The COMP pin sets the DC cancellation loop's response. Connect 400pF or more between COMP and GND for normal operation. Connect the pin directly to GND to disable the loop. The DC cancellation loop can sink up to 300µA of current at the input. When operated with CCOMP = 400pF, the loop takes approximately 20µs to stabilize. The MAX3664 MAX3664 minimizes pulse-width distortion for data sequences that exhibit a 50% duty cycle. A duty cycle other than 50% causes the device to generate pulsewidth distortion. DC cancellation current is drawn from the input and adds noise. For low-level signals with little or no DC component, this is not a problem. Preamplifier noise will increase for signals with significant DC component. _Applications Information The MAX3664 MAX3664 is a low-noise, wide-bandwidth transimpedance amplifier that is ideal for 622Mbps SDH/ SONET receivers. Its features allow easy design into a fiber optic module, in four simple steps. Step 1: Selecting a Preamplifier for a 622Mbps Receiver Fiber optic systems place requirements on the bandwidth, gain, and noise of the transimpedance preamplifier. The MAX3664 MAX3664 optimizes these characteristics for SDH/SONET receiver applications that operate at 622Mbps. In general, the bandwidth of a fiber optic preamplifier should be 0.6 to 1 times the data rate. Therefore, in a 622Mbps system, the bandwidth should be between 375MHz and 622MHz. Lower bandwidth causes pattern-dependent jitter and a lower signal-to-noise ratio, while higher bandwidth increases thermal noise. The MAX3664 MAX3664 typical bandwidth is 590MHz, making it ideal for 622Mbps applications. The preamplifier's transimpedance must be high enough to ensure that expected input signals generate output levels exceeding the sensitivity of the limiting amplifier (quantizer) in the following stage. The MAX3675 MAX3675 clock recovery and limiting amplifier IC has an input sensitivity of 3.6mVp-p, which means that 3.6mVp-p is the minimum signal amplitude required to produce a fully limited output. Therefore, when used with the MAX3664 MAX3664, which has a 6k transimpedance, the minimum detectable photodetector current is 600nA. It is common to relate peak-to-peak input signals to average optical power. The relationship between optical input power and output current for a photodetector is called the responsivity (), with units Amperes/Watt (A/W). The photodetector peak-to-peak current is related to the peak-to-peak optical power as follows: Ip-p = (Pp-p)() Based on the assumption that SDH/SONET signals maintain a 50% duty cycle, the following equations relate peak-to-peak optical power to average optical power and extinction ratio (Figure 2): Average Optical Power = PAVE = (P0 + P1) / 2 Extinction Ratio = re = P1 / P0 Peak-to-Peak Signal Amplitude = Pp-p = P1 - P0 Therefore, PAVE = Pp-p (1 / 2)[(re + 1) / (re - 1)] _ 5 MAX3664 MAX3664 _Detailed Description MAX3664 MAX3664 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET In a system where the photodiode responsivity is 0.9A/W and the extinction ratio is 10, the MAX3664/ MAX3664/ MAX3675 MAX3675 receiver with 670nA gain sensitivity will deliver a fully limited output for signals of average optical power larger than: (600nA / 0.9A/W)(1 / 2)(11 / 9) = 407nW -33.9dBm Sensitivity is a key specification of the receiver module. The ITU/Bellcore specifications for SDH/SONET receivers require a link sensitivity of -27dBm with a bit error rate (BER) of 1E - 10. There is an additional 1dB power penalty to accommodate various system losses; therefore, the sensitivity of a 622Mbps receiver must be better than -28dBm. Although several parameters affect sensitivity (such as the quantizer sensitivity and preamplifier gain, as previously discussed), most fiber optic receivers are designed so that noise is the dominant factor. Noise from the highgain transimpedance amplifier, in particular, determines the sensitivity. The noise generated by the MAX3664 MAX3664 can be modeled with a Gaussian distribution. In this case, a BER of 1E - 10 corresponds to a peak-to-peak signal amplitude to RMS noise ratio (SNR) of 12.7. The MAX3664 MAX3664's typical input-referred noise, in, (bandwidthlimited to 470MHz) is 55nARMS. Therefore, the minimum input for a BER of 1E - 10 is (12.7 x 55nA) = 700nAp-p. Rearranging the previous equations in these terms results in the following relation: Optical Sensitivity (dBm) = -10log[(in / )(SNR)(1/2)(re + 1) / (re - 1)(1000)] At room temperature, with re = 10, SNR = 12.7, in = 55nA, and = 0.9A/W, the MAX3664 MAX3664 sensitivity is -33.2dBm. At +85°C, noise increases to 62nA and sensitivity decreases to -32.7dBm. The MAX3664 MAX3664 provides 4.7dB margin over the SDH/SONET specifications, even at +85°C. The largest allowable input to an optical receiver is called the input overload. The MAX3664 MAX3664's largest input current (Imax) is 300µAp-p, with 200ps of pulse-width distortion. The pulse-width distortion and input current are closely related (see Typical Operating Characteristics). If the clock recovery circuit can accept more pulse-width distortion, a higher input current might be acceptable. For worst-case responsivity and extinction ratio, = 1A/W and re = , the input overload is: Overload (dBm) = -10log (Imax)(1 / 2)(1000) For Imax = 300µA, the MAX3664 MAX3664 overload is -8.2dBm. Step 2: Selecting Time Constants A receiver built with the MAX3664 MAX3664 will have a bandpass frequency response. The low-frequency cutoff causes unwanted data-dependent jitter and sensitivity loss. Because SDH/SONET data streams contain scrambled data, certain data sequences may generate continuous successions of 1s or 0s. The low-frequency cutoff forces the output of such sequences to zero, ultimately causing a sensitivity reduction. The SDH specifications state that a receiver must be able to handle up to 72 consecutive bits of the same value within the data. Therefore, choose the low-frequency cutoff to ensure an acceptable amount of data-dependent jitter and sensitivity loss. Determine the reduction in signal-to-noise ratio due to a transitionless sequence of duration t as follows: SNRloss = 1 - e-t / = 1-e-(2fct) POWER where is the time constant of the offset correction, fc is the low-frequency cutoff, and t is the time for 72 bits (116ns for a 622Mbps data rate). Suppose that the receiver should not have more than 0.25dB (6%) of sensitivity loss due to a 72-bit transitionless sequence. This means that: (1 - e-(2fc)(116ns) < 0.06 fc = (ln 0.94) / [(-2)(116ns)] = 85kHz (max) P1 PAVE P0 TIME The loss of sensitivity is a concern only when the SNR is small (close to 12.7), which occurs with input currents less than 3µAp-p. Figure 2. Optical Power Definitions 6 _ 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET fc = -ln[1 - (1.0E9)(DDJ)] / [2t] If the maximum allowable DDJ is 100ps, and t = 112ns for a 72-bit sequence, then the maximum low-frequency cutoff is 150kHz. Several circuits in the receiver can determine the lowfrequency cutoff. In a receiver using the MAX3664 MAX3664 and MAX3675 MAX3675, there are three locations for concern: 1) The MAX3664 MAX3664's DC cancellation circuit. 2) The coupling capacitors between the MAX3664 MAX3664 outputs and MAX3675 MAX3675 inputs. 3) The MAX3675 MAX3675's offset correction circuit. The highest cutoff frequency in the system determines the amount of data-dependent jitter created. The time constants of the MAX3675 MAX3675's offset correction and of the coupling capacitors should be separated by a factor of ten (one decade) to prevent low-frequency oscillations. For example, select the offset correction of the MAX3664 MAX3664 to set the receiver cutoff frequency. Note that the MAX3664 MAX3664's low-frequency cutoff increases with average input current. Since DDJ increases with fc, it follows that DDJ increases as average input increases. When the input signal is large enough to limit the outputs, however, DDJ does not increase. Therefore, the maximum DDJ results from the lowest input that causes the MAX3664 MAX3664 to have limited outputs (see Typical Operating Characteristics), which is about 150µAp-p. When selecting a capacitor for the COMP pin that achieves your desired DDJ, use the data from Typical Operating Characteristics at IINPUT = 150µA. In summary, use the following method to select the lowfrequency cutoff that will provide the sensitivity and DDJ required for SDH/SONET receivers: 1) Determine the longest time without transitions. 2) Determine the acceptable loss of SNR ratio, and the acceptable DDJ due to the transitionless time. 3) Estimate the low-frequency cutoff required for either the worst-case SNR loss or for DDJ. 4) Select the location in the receiver to determine the highest cutoff frequency. Normally, the MAX3664 MAX3664 would determine the dominant low-frequency cutoff. Then select all other low-frequency cutoffs one decade lower. 5) Select a capacitor for the COMP pin from the Typical Operating Characteristics graphs. 400pF is adequate for most 622Mbps SDH/SONET applications. _ 7 MAX3664 MAX3664 The cutoff frequency also affects the data-dependent jitter (DDJ). DDJ due to low-frequency cutoff can be approximated as droop / slope, where the slope in V/sec is measured at the 50% crossing of an eye diagram, and droop is the loss-of-signal to noise calculated above as 1 - e-(2fct). The slope at the 50% crossing is typically two times the 10% to 90% slope, which is approximately 0.35 / bandwidth. For a 622Mbps receiver with a 470MHz bandwidth, the 10% to 90% rise time is approximately 750ps. The slope through the 50% crossing will be approximately: Amplitude (2)(0.8) / 750ps = 1.6 Amplitude / 750ps = 2E9 Amplitude V/sec DDJ = 2 [Amplitude (1 - e-(2fct)] / [ 2.0E9 Amplitude ] = (1 - e-(2fct) / (1E9) OR 8 PHOTODIODE 100pF GND IN 400pF COMP OUT- OUT+ MAX3664 MAX3664 INREF1 INREF2 FILT VCC +3.3V Zo = 50 Zo = 50 0.01µF +3.3V 4.7nF 100 4.7nF VCC 3k LOL PHADJ+ 120pF 0.1µF PHADJ- >10k RSSI MAX3675 MAX3675 GND OLC+ OLC- CFILT INSEL ADI- ADI+ DDI- DDI+ 0.1µF +3.3V INV FIL+ RF1 RF2 39 VTH LOP SCLK- SCLK+ SDO- SDO+ FIL- 2.2µF 10pF 50 Zo = 50 Zo = 50 50 Zo = 50 Zo = 50 VCC - 2V 50 VCC - 2V 50 MAX3664 MAX3664 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET Figure 3. Simplified Schematic of the MAX3664/MAX3675 MAX3664/MAX3675 Receiver _ 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET The MAX3664 MAX3664's noise performance is a strong function of the circuit's bandwidth, which changes over temperature and varies from lot to lot. The receiver sensitivity can be improved by adding filters to limit this bandwidth. Filter designs can range from a one-pole filter using a single capacitor, to more complex filters using inductors. Figure 4 illustrates two examples: the simple filter provides moderate roll-off with minimal components, while the complex filter provides a sharper rolloff and better transient response. Supply voltage noise at the cathode of the photodiode produces a current I = CPHOTO (V/t), which reduces the receiver sensitivity. C PHOTO is the photodiode capacitance. The FILT resistor of the MAX3664 MAX3664, combined with an external capacitor (see Typical Operating Circuit) can be used to reduce this noise. The external capacitor (C FILT ) is placed in parallel with the photodiode. Current generated by supply noise is divided between CFILT and CPHOTO. The input noise current due to supply noise is (assuming the filter capacitor is much larger than the photodiode capacitance): INOISE = MAX3664 MAX3664 60 60 C1 5pF RL 100 b) 3-POLE, 470MHz BESSEL FILTER MAX3664 MAX3664 15.5nF 60 1.2pF 7.3pF RL 100 60 15.5nF ) [( )( Figure 4. Filter Design Examples Step 4: Designing a Low-Capacitance Input (VNOISE )(CPHOTO ) (RFILT )(INOISE ) For example, with maximum noise voltage = 100mVp-p, CPHOTO = 0.5pF, RFILT = 1k, and INOISE selected to be 5nA (1/10 of MAX3664 MAX3664 input-referred noise): ( )( a) SIMPLE, 1-POLE, 530MHz FILTER (VNOISE )(CPHOTO ) (RFILT )(CFILT ) If the amount of tolerable noise is known, then the filter capacitor can be easily selected: CFILT = MAX3664 MAX3664 Step 3: Designing Filters )] CFILT = 0.1 0.5E - 12 / 1000 5E - 9 = 10nF Noise performance and bandwidth are adversely affected by stray capacitance on the input node. Select a low-capacitance photodiode and use good high-frequency design and layout techniques to minimize capacitance on this pin. The MAX3664 MAX3664 is optimized for 0.5pF of capacitance on the input- approximately the capacitance of a photodetector diode sharing a common header with the MAX3664 MAX3664 in die form. _ 9 MAX3664 MAX3664 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET Photodiode capacitance changes significantly with bias voltage. With a 3.3V supply voltage, the reverse voltage on the PIN diode is only 2.5V. If a higher voltage supply is available, apply it to the diode to significantly reduce capacitance. Take great care to reduce input capacitance. With the SO and µMAX versions of the MAX3664 MAX3664, the package capacitance is about 0.3pF, and the PC board between the MAX3664 MAX3664 input and the photodiode can add parasitic capacitance. Keep the input line short, and remove power and ground planes beneath it. Packaging the MAX3664 MAX3664 into a header with the photodiode provides the best possible performance. It reduces parasitic capacitance to a minimum, resulting in the lowest noise and the best bandwidth. VCC FILTER CAP OUT+ IN INREF1 and INREF2 Connect INREF1 and INREF2 as close to the AC ground of the photodetector diode as possible. The photodetector AC ground is usually the ground of the filter capacitor from the photodetector anode. The total loop (from INREF1/INREF2, through the bypass capacitor and the diode, and back to IN) should be no more than 2 cm. long. OUT- PIN DIODE COMP OUT+ OUT- Figure 5. Suggested Layout for TO-46 Header Wire Bonding For high current density and reliable operation, the MAX3664 MAX3664 uses gold metallization. Make connections to the die with gold wire only, and use ball bonding techniques (wedge bonding is not recommended). Die-pad size is 4 mils square, with a 6 mil pitch. Die thickness is 12 mils. 10 VCC and Ground Use good high-frequency design and layout techniques. The use of a multilayer circuit board with separate ground and VCC planes is recommended. Take care to bypass VCC and to connect the GND pin to the ground plane with the shortest possible traces. _ 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET _Chip Topography TOP VIEW OUT- VCC 1 8 7 OUT+ 5 GND OUT- 6 COMP COMP IN 2 OUT+ GND INREF1 3 MAX3664 MAX3664 INREF2 4 V CC INREF2 SO/µMAX IN FILT INREF1 TRANSISTOR COUNT: 73 SUBSTRATE CONNECTED TO GND _Package Information DIM D 0°-8° A 0.101mm 0.004in. e B A1 E C H L Narrow SO SMALL-OUTLINE PACKAGE (0.150 in.) A A1 B C E e H L INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.157 0.150 0.050 0.244 0.228 0.050 0.016 DIM PINS D D D 8 14 16 MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 3.80 4.00 1.27 5.80 6.20 0.40 1.27 INCHES MILLIMETERS MIN MAX MIN MAX 0.189 0.197 4.80 5.00 0.337 0.344 8.55 8.75 0.386 0.394 9.80 10.00 21-0041A _ 11 MAX3664 MAX3664 _Pin Configuration MAX3664 MAX3664 622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET _Package Information (continued) DIM C A 0.101mm 0.004 in e B A1 L A A1 B C D E e H L INCHES MAX MIN 0.044 0.036 0.008 0.004 0.014 0.010 0.007 0.005 0.120 0.116 0.120 0.116 0.0256 0.198 0.188 0.026 0.016 6° 0° MILLIMETERS MIN MAX 0.91 1.11 0.10 0.20 0.25 0.36 0.13 0.18 2.95 3.05 2.95 3.05 0.65 4.78 5.03 0.41 0.66 0° 6° 21-0036D 21-0036D E H 8-PIN µMAX MICROMAX SMALL-OUTLINE PACKAGE D Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 _Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.