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LT4275AHMS#TRPBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LT4275BIDD#TRPBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT4275CIMS#TRPBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT4275AIDD#PBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT4275BIMS#PBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC4257CS8#TR Linear Technology LTC4257 - IEEE 802.3af PD Power over Ethernet Interface Controller; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy

M88E1111 ETHERNET

Catalog Datasheet MFG & Type PDF Document Tags

M88E1111

Abstract: LCD 1602D Virtex 5 LX50T. The large on-board collection of high-end peripherals, including Gbit Ethernet, HDMI , SODIMM with 64-bit wide data 10/100/1000 Ethernet PHY and RS-232 serial port multiple USB2 ports for , , Ethernet PHY I/O, GPIO FPGA Core, Ethernet PHY core DDR & FPGA DDR I/O DDR SODIMM Termination Voltage , and circuits on the Genesys board. Ethernet PHY The Genesys board includes a Marvell Alaska , xps_ll_temac IP core uses the hard Ethernet MAC hardware core included in the Virtex 5 FPGA. U10 N5 T6
Digilent
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M88E1111 LCD 1602D 5-LX50T 500MH

Marvell PHY 88E1111 Xilinx

Abstract: CSG324C including Gbit Ethernet, HDMI Video, 128MByte 16-bit DDR2 memory, and USB and audio ports make the Atlys , : 502-178 23 6 DDR2 128MByte 45 4 10/100/1000 Ethernet PHY 29 Adept USB2 Config & , 128Mbyte DDR2 with 16-bit wide data 10/100/1000 Ethernet PHY on-board USB2 ports for programming and data , 0.9V Circuits FPGA I/O, video, USB ports, clocks, ROM, audio FPGA aux, VHDC, Ethernet PHY I/O, GPIO FPGA core, Ethernet PHY core DDR & FPGA DDR I/O DDR termination voltage (VTT) Device IC16
Digilent
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Marvell PHY 88E1111 Xilinx CSG324C M88E1111 datasheet Marvell 88E1111 ethernet mac vhdl code 128MB

js28f256p

Abstract: s162d . . . . . . . . . . . . . . . . . 11. 10/100/1000 Tri-Speed Ethernet PHY . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . Ethernet PHY Status LEDs . . . . . . . . . . . . . . . , Virtex-6 FPGAs except the XC6VLX760. â'¢ Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC User Guide This guide describes the dedicated Tri-Mode Ethernet Media Access Controller available in all Virtex , memory, an 8-lane PCI Express® interface, a tri-mode Ethernet PHY, general purpose I/O, and a UART
Xilinx
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js28f256p s162d MT4JSF6464HY-1G1 RGMII phy Xilinx ML605 UG534 2002/96/EC 2002/95/EC 2006/95/EC 2004/108/EC

M88E1111

Abstract: 32K10K-400E3 136073-1 12 11 Ethernet 10/100/1000 Marvell M88E1111 EPHY 11 12 USB UART (USB-to-UART , 11. 10/100/1000 Tri-Speed Ethernet PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ethernet PHY Status LEDs . . . . . . , , a 1-lane PCI Express® interface, a tri-mode Ethernet PHY, general purpose I/O and a UART , Connectivity Gen1 x1 · 10. SFP Module Connector · 11. 10/100/1000 Tri-Speed Ethernet PHY ·
Xilinx
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SP605 MT41J64M16LA-187E W25Q64VSFIG JS28F256P30 EG-2121CA-200 32K10K-400E3 M88E1111 ETHERNET ICS874001 Chrontel CH7301C-TF UG526 DS162 UG380 UG388 DS570

DSP48A1

Abstract: SP605 . . . . . . . . 11. 10/100/1000 Tri-Speed Ethernet PHY . . . . . . . . . . . . . . . . . . . . . . , Ethernet PHY Status LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , ® interface, a tri-mode Ethernet PHY, general purpose I/O and a UART. Additional user desired features can be , '¢ Gen1 x1 â'¢ 10. SFP Module Connector â'¢ 11. 10/100/1000 Tri-Speed Ethernet PHY â , 15. Status LEDs â'¢ â'¢ FPGA INIT â'¢ â'¢ Ethernet Status FPGA DONE 16. User I/O â
Xilinx
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DSP48A1 alaska atx 250 p4

PTD08D021W

Abstract: LVCMOS18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10/100/1000 Tri-Speed Ethernet , Ethernet PHY, general purpose I/O, and two UART interfaces. Other features can be added by using mezzanine , Evaluation Board Features â'¢ â'¢ Ethernet PHY SGMII interface (RJ-45 connector) PCI Express , '¢ 10/100/1000 tri-speed Ethernet PHY â'¢ USB-to-UART bridge â'¢ HDMIâ"¢ codec â'¢ I2C , multiplier Status LEDs â'¢ â'¢ Power good â'¢ FPGA INIT â'¢ â'¢ Ethernet status FPGA
Xilinx
Original
PTD08D021W LVCMOS18 MT8JTF12864HZ-1G6G1 ba37 diode ADV7511KSTZ Marvell alaska 88E1111 VC707 UG885