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Abstract: List Configuration Comments 1 See Figure 6 EP14, LVEP14 2 See Figure 7 EP17 , / LVEP14 0603 CHIP CAPACITOR 0.01 mF PIN 1 VEE VCC WIRE 0402 CHIP RESISTOR 50 W 0805 CHIP CAPACITOR 0.01 mF EXPANDED BOTTOM VIEW EP14 / LVEP14 Figure 6. Configuration 1 Table 3. Configuration 1 (Device EP14 and LVEP14) Device J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 ... Original
datasheet

18 pages,
184.89 Kb

RO4003 Johnson Components SMA ep29 EP14 ECLTSSOP20EVB ep57 ECLTSSOP20EVB abstract
datasheet frame
Abstract: mode. Designers can take advantage of the LVEP14's performance to distribute low skew clocks across , VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output­to­output skew. Optimal design, layout, and processing , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

8 pages,
66.04 Kb

MC100LVEP14DTR2 MC100LVEP14DT MC100LVEP14 LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

7 pages,
129.55 Kb

MC100LVEP14 100 vp14 LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

7 pages,
99.35 Kb

TSSOP-20 MC100LVEP14 LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and processing , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

8 pages,
70.79 Kb

MC100LVEP14 LVEP14 TSSOP-20 MC100LVEP14 abstract
datasheet frame
Abstract: advantage of the LVEP14's performance to distribute low skew clocks across the backplane or the board. For , single­ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under LVPECL conditions. The LVEP14 specifically guarantees low output­to­output skew. Optimal design, layout, and , other LVECL devices, can be operated from a positive VCC supply in LVPECL mode. This allows the LVEP14 ... Original
datasheet

8 pages,
111.7 Kb

MC100LVEP14DTR2 MC100LVEP14DT MC100LVEP14 m 1305 LVEP14 AN1406/D MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

9 pages,
133.99 Kb

MC100LVEP14 LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

8 pages,
144.79 Kb

MC100LVEP14 LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

7 pages,
103.92 Kb

TSSOP-20 MC100LVEP14 TSSOP20 FOOTPRINT 1775 data sheet LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: Designers can take advantage of the LVEP14's performance to distribute low skew clocks across the backplane , the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and processing , allows the LVEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. ... Original
datasheet

8 pages,
69.15 Kb

typical normal diodes 555 application notes pin diagram of ic 555 1775 data sheet RMS-2 me 555 1425 lvds pinout data sheet D flip flop application note 555 Marking Code .25c lvds 40 pin pinout datasheet of ic 555 MC100LVEP14 MC100LVEP14 MC100LVEP14 abstract
datasheet frame
Abstract: A LVEP210 LVEP210 / LVEP111 LVEP111 / LVEP14 / EP11 etc. EPT 23 LVTTL or LVCMOS CARD A MC100LVEP210FA MC100LVEP210FA compared ... Original
datasheet

2 pages,
340.53 Kb

LVEP111 ARD900/D ARD900/D abstract
datasheet frame

Extended Electronics Archive (Experimental)

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[IBIS Ver] 3.1 [File Name] mc100lvep14dt_25.ibs [File Rev] 3 [Source] Derived from mc10ep57dt_33.ibs & mc100lvep210fa_25.ibs | Measured and created by ICX Technology [Date] 10/27/2005 | | * [Copyright] | * | (C) COPYRIGHT 1993-2000 | MENTOR GRAPHICS CORPORATION | ICX STANDARD LIBRARY, ICX PROJECT MODELING, | ICX CUSTOM MODELING, ICX VENDOR MODEL | ALL RIGHTS Model Builder 2.8 [Component] mc100lvep14dt_25 [Manufacturer] ON | [Package] | variable typ min
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On Semiconductor 30/03/2009 9.51 Kb IBS mc100lvep14dt_25.ibs
| * | YOU ARE ONLY AUTHORIZED TO USE THIS SOFTWARE | ACCORDING TO LICENSOR'S LICENSE RESTRICTIONS. | * | [IBIS Ver] 3.1 [File Name] mc100lvep14dt_33.ibs [File Rev] 2 [Source] Derived from mc10ep57dt_33.ibs & mc100lvep210fa_33.ibs | from Measured and created models by ICX Technology [Date] 12 .8 [Component] mc100lvep14dt_33 [Manufacturer] ON | [Package] | variable typ min max R_pkg .18ohms
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On Semiconductor 30/03/2009 10.11 Kb IBS mc100lvep14dt_33.ibs
100LVEP14 2.5 V / 3.3 V 1:5 Differential ECL/PECL/HSTL Clock Driver
www.datasheetarchive.com/files/on-semiconductor/html/ds/01_clockdistribution.html
On Semiconductor 27/08/2008 20.59 Kb HTML 01_clockdistribution.html
100 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver MC100LVEP14/D
www.datasheetarchive.com/files/on-semiconductor/taxonomy/clockmanagement.htm
On Semiconductor 28/09/2007 26.84 Kb HTM clockmanagement.htm
100 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver MC100LVEP14/D
www.datasheetarchive.com/files/on-semiconductor/taxonomy/differentiallogic.htm
On Semiconductor 28/09/2007 88.06 Kb HTM differentiallogic.htm
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Philips 21/03/2003 434.46 Kb TXT xref.txt
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www.datasheetarchive.com/download/29940701-653733ZC/xref.zip (xref.txt)
Philips 21/03/2003 66.17 Kb ZIP xref.zip
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www.datasheetarchive.com/files/philips/xref/data/xref-v1.txt
Philips 15/06/2005 676.98 Kb TXT xref-v1.txt
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www.datasheetarchive.com/download/46441519-653735ZC/xref-v1.zip (xref.txt)
Philips 15/06/2005 97.68 Kb ZIP xref-v1.zip