NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
SiFLEX02 LS900-SI-02-AXX LSDEV-SI02-A30 ATXMEGA256A3 AT86RF212 LS900-SI-02-A20 - Datasheet Archive
LS900-SI-02-AXX DATASHEET Integrated Transceiver Modules for ZigBee / 802.15.4 (900 MHz) Development Kit Available:
SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Integrated Transceiver Modules for ZigBee / 802.15.4 (900 MHz) Development Kit Available: LSDEV-SI02-A30 LSDEV-SI02-A30 FEATURES DESCRIPTION · 250mW output power · Long range: 2 miles · Up to 1Mbps RF data rate · Miniature footprint: 0.9" x 1.63" · Multiple antenna options · Agency Approvals: FCC and IC · Powerful Atmel 256k ATXMEGA256A3 ATXMEGA256A3 with 802.15.4 MAC or ZigBee Stack · LSR serial interface based on 802.15.4 MAC · Low power operation · RoHS compliant · Streamlined development with LSR design services. · License options available to purchase design or integrate design. Security · Lighting Control · HVAC Control · Sensor Networks · Medical · The module comes preloaded with the Atmel MAC-Stack that can be used with the LSR host serial interface. Full debug and programming capabilities are included to develop custom applications. Easily load the ZigBee or MAC stack onto the module and create your own network. Need to get to market quickly? Not an expert in 802.15.4 or ZigBee? Need a custom antenna? Would you like to own the design? Would you like a custom design? Not quite what you need? Do you need help with your host board? LS Research Design Services will be happy to develop custom hardware or software, integrate the design, or license the design so you can manufacture yourself. Contact us at sales@lsr.com or call us at 262-375-4400. APPLICATIONS · The SiFLEX module is a high performance 900MHz IEEE 802.15.4 radio (AT86RF212 AT86RF212 & RF amplifier circuit) and microcontroller (ATXMEGA256A3 ATXMEGA256A3) in a cost effective, pre-certified footprint. Industrial Automation ORDERING INFORMATION Order Number Description LS900-SI-02-A20 LS900-SI-02-A20 SiFLEX Module with U.FL connector for external antenna LS900-SI-02-A30 LS900-SI-02-A30 SiFLEX Module with wire antenna LS900-SI-02-A40 LS900-SI-02-A40 SiFLEX Module with helical antenna LS900-SI-02-A50 LS900-SI-02-A50 SiFLEX Module with castellated RF trace for off board antenna. Note: See Antenna Options section for more details. LSDEV-SI02-A30 LSDEV-SI02-A30 SiFLEX Development Kit Table 1 Orderable SiFLEX Model Numbers The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 1 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET ATXMEGA256A3 ATXMEGA256A3 (Microcontroller) SPI AT86RF212 AT86RF212 (802.15.4 Radio) RF Amplifier Antenna GPIO PGM/DBG Serial I/O Analog TMR/PWM BLOCK DIAGRAM Figure 1 SiFLEX Module Block Diagram High-Level DEVELOPMENT KIT The SiFLEX Development Kit can be used out of the box to evaluate RF range performance with the simple press of a button. Users interested in further investigating the performance and capabilities of the SiFLEX Module can use the SiFLEX Test Tool. This PC-based software can demonstrate just how easy it is to send & receive data, collect performance data, change channels, power levels, or addresses using the LSR Serial Host Protocol with another microcontroller. More advanced users can use the development board to create and debug their own software for the SiFLEX module using the 802.15.4 MAC or ZigBee stack from Atmel. Figure 2 SiFLEX Development Board Part Number LSDEV-SI02-A30 LSDEV-SI02-A30 Description SiFLEX Development Kit Kit Contents · SiFLEX Development Board with SiFLEX Series Transceiver Module with Wire antenna (x2) · USB Cable (x2) · AA Batteries (x4) · Software & Technical Information CD · Quick Start Guide The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 2 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET TABLE OF CONTENTS FEATURES . 1 APPLICATIONS . 1 DESCRIPTION . 1 ORDERING INFORMATION . 1 BLOCK DIAGRAM . 2 DEVELOPMENT KIT. 2 Kit Contents . 2 MODFLEXTM GENERIC MODULE FOOTPRINT . 5 PIN DESCRIPTIONS . 6 MODULE OVERVIEW . 10 Microcontroller . 10 Radio . 12 RF Amplifier . 13 Antenna Options . 13 MODES OF OPERATION . 15 Host Microcontroller . 15 Software Stacks . 15 DEVELOPMENT TOOLS . 17 AVR Studio . 17 Eclipse . 17 WinAVR . 17 AVR JTAGICE mkII . 17 AVRISP mkII . 17 IAR Embedded Workbench for Atmel AVR . 17 ELECTRICAL SPECIFICATIONS . 18 Absolute Maximum Ratings . 18 Recommended Operating Conditions . 18 General Characteristics . 19 RF Characteristics . 20 The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 3 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET SOLDERING RECOMMENDATIONS . 22 Recommended Reflow Profile . 22 Lead (Pb) Free Soldering Paste . 22 Cleaning . 22 Optical Inspection . 22 Repeating Reflow Soldering . 22 Wave Soldering . 23 Hand Soldering . 23 Rework . 23 Additional Grounding . 23 SHIPPING, HANDLING, AND STORAGE . 23 Shipping . 23 Handling . 23 Moisture Sensitivity Level (MSL) . 23 Storage . 23 AGENCY CERTIFICATIONS . 23 MECHANICAL DATA. 24 PCB Footprint . 24 General Module Dimensions . 25 Module with Wire Antenna . 26 Module with Helical Antenna . 27 MODULE REVISION HISTORY . 28 Rev A . 28 Rev B . 28 Rev C . 28 CONTACTING LS RESEARCH . 29 The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 4 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET MODFLEXTM GENERIC MODULE FOOTPRINT To maintain compatibility with all ModFLEXTM family transceiver modules it is important to use the module pins in your application as they are designated in Figure 3. Not all the pins on the SiFLEX module may be used, refer to Figure 4 for specifics. 1 69 2 68 3 67 4 66 5 65 6 64 7 63 8 62 9 61 10 60 11 59 12 58 ModFLEXTM Generic Module Footprint JTAG/PDI/JRST 13 57 56 15 55 16 54 17 53 18 52 19 51 20 50 21 49 22 48 23 47 24 46 25 45 GND GND GND NC NC NC NC NC SPI - MOSI SPI - MISO SPI - SCK SPI - SS IIC - SDA IIC - SCL GPIO 16 GPIO 15 GPIO 14 GPIO 13 GPIO 12 GPIO 11 GPIO 10 GPIO 9 GPIO 8 GPIO 7 GPIO 6 GND GPIO 5 GPIO 4 GPIO 3 GPIO 2 GPIO 1 UART - RTS UART - CTS UART - RX UART - TX TMR/PWM 8 TMR/PWM 7 30 31 32 33 34 35 36 37 38 39 40 41 42 43 TMR/PWM 6 29 TMR/PWM 4 28 TMR/PWM 3 44 27 TMR/PWM 2 26 TMR/PWM 1 nReset Analog REF Analog REF CMP+ CMPCMPOUT ADC1 ADC2 ADC3 ADC4 ADC5 ADC6 VCC - 3V3DC 14 TMR/PWM 5 GND GND GND NC NC NC NC NC JTAG - TMS JTAG - TDI JTAG - TCK JTAG - TDO Figure 3 ModFLEXTM Generic Module Footprint The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 5 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET PIN DESCRIPTIONS Module Pin Name MCU Pin Type 1 GND N/A GND Ground 2 GND N/A GND Ground 3 GND N/A GND Ground 4 NC N/A NC No Connect 5 NC N/A NC No Connect 6 NC N/A NC No Connect 7 NC N/A NC No Connect 8 NC N/A NC No Connect 9 JTAG TMS 10 I/O General-purpose digital I/O (PB4), Analog input, JTAG TMS 10 JTAG TDI 11 I/O General-purpose digital I/O (PB5), Analog input, JTAG TDI 11 JTAG TCK 12 I/O General-purpose digital I/O (PB6), Analog input, JTAG TCK 12 JTAG TDO 13 I/O General-purpose digital I/O (PB7), Analog input, JTAG TDO 13 JTAG/PDI/JRST 56 I/O PDI/PDI_DATA 14 nRESET 57 Input 15 PA0 62 I/O General-purpose digital I/O, Analog input, Analog REF A 16 PB0 6 I/O General-purpose digital I/O, Analog input, Analog REF B 17 PA2 64 I/O General-purpose digital I/O, Analog input, Analog comparator 2 18 PA1 63 I/O General-purpose digital I/O, Analog input, Analog comparator 1 19 PA7 5 I/O General-purpose digital I/O, Analog input, Analog comparator output 20 PA4 2 I/O General-purpose digital I/O, Analog input 21 PA5 3 I/O General-purpose digital I/O, Analog input 22 PA6 4 I/O General-purpose digital I/O, Analog input 23 PB1 7 I/O General-purpose digital I/O, Analog input 24 PB2 8 I/O General-purpose digital I/O, Analog input 25 PB3 9 I/O General-purpose digital I/O, Analog input 26 VCC - 3V3DC VCC VCC 27 PF3 49 I/O General-purpose digital I/O, Output Compare, UART Tx 28 PF2 48 I/O General-purpose digital I/O, Output Compare, UART Rx 29 PF1 47 I/O General-purpose digital I/O, Output Compare, UART XCK0 Description RESET/PDI_CLOCK Supply Voltage The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 6 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Module Pin Name MCU Pin Type 30 PF0 46 I/O General-purpose digital I/O, Output Compare 31 PE5 41 I/O General-purpose digital I/O, Output Compare, UART XCK1, SPI MOSI 32 PE4 40 I/O General-purpose digital I/O, Output Compare, SPI SS 33 PE3 39 I/O General-purpose digital I/O, Output Compare, UART Tx 34 PE2 38 I/O General-purpose digital I/O, Output Compare, UART Rx 35 PC3, UART TX 19 I/O General-purpose digital I/O, Output Compare, UART Tx 36 PC2, UART RX 18 I/O General-purpose digital I/O, Output Compare, UART Rx 37 PC1 17 I/O General-purpose digital I/O, Output Compare, IIC SCL 38 PC0 16 I/O General-purpose digital I/O, Output Compare, IIC SDA 39 PF5 51 I/O General-purpose digital I/O 40 PF6 54 I/O General-purpose digital I/O 41 PF7 55 I/O General-purpose digital I/O 42 PA3 1 I/O General-purpose digital I/O, Analog input 43 NC N/A NC No Connect 44 GND N/A GND 45 NC N/A NC No Connect 46 NC N/A NC No Connect 47 NC N/A NC No Connect 48 NC N/A NC No Connect 49 NC N/A NC No Connect 50 NC N/A NC No Connect 51 NC N/A NC No Connect 52 NC N/A NC No Connect 53 NC N/A NC No Connect 54 NC N/A NC No Connect 55 NC N/A NC No Connect 56 PE1 37 I/O General-purpose digital I/O, Output Compare, IIC SCL 57 PE0 36 I/O General-purpose digital I/O, Output Compare, IIC SDA 58 PC4 20 I/O General-purpose digital I/O, Output Compare, SPI SS 59 PC7 23 I/O General-purpose digital I/O, Output Compare, UART Tx, SPI SCK 60 PC6 22 I/O General-purpose digital I/O, Output Compare, UART Rx, SPI MISO Description Ground The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 7 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Module Pin Name MCU Pin Type 61 PC5 21 I/O General-purpose digital I/O, Output Compare, UART XCK1, SPI MOSI 62 NC N/A NC No Connect 63 NC N/A NC No Connect 64 NC N/A NC No Connect 65 NC N/A NC No Connect 66 NC N/A NC No Connect 67 GND N/A GND Ground 68 GND N/A GND Ground 69 GND N/A GND Ground Description Table 2 SiFLEX Module Pin Descriptions The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 8 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET 11 12 13 56 57 62 6 64 63 5 2 3 4 7 8 9 - 65 6 64 7 63 8 62 9 61 10 60 11 59 12 58 Atmel ATXMEGA256A3 ATXMEGA256A3 JTAG/PDI/JRST 13 nRESET PA0 PB0 PA2 PA1 PA7 PA4 PA5 PA6 PB1 PB2 PB3 VCC - 3V3DC 14 57 56 15 55 16 54 17 53 18 52 19 51 20 50 21 49 22 48 23 47 24 46 25 45 26 44 46 41 40 39 38 PE2 47 PE3 48 PE4 49 PE5 PF0 MCU# MCU# 21 22 23 20 36 37 - 30 31 32 33 34 35 36 37 38 39 40 41 42 43 PF1 29 PF2 28 PF3 27 GND GND GND NC NC NC NC NC PC5 PC6 PC7 PC4 PE0 PE1 NC NC NC NC NC NC NC NC NC NC NC GND 19 18 17 16 51 54 55 NC 10 66 5 PA3 - 4 PF7 - 67 PF6 - 68 3 PF5 - 2 PC0 - 69 PC1 - 1 PC2/UART RX - GND GND GND NC NC NC NC NC JTAG TMS JTAG TDI JTAG TCK JTAG TDO PC3/UART TX MCU# 1 - MCU# Figure 4 Electronic Interface Control Drawing (EICD) The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 9 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET MODULE OVERVIEW Figure 5 shows the internal interconnects of the ICs on the SiFLEX module. Consult the respective IC datasheets for details, or contact LSR sales to purchase the SiFLEX module schematics as part of LSR's ModFLEXTM design program. For a high-level block diagram of the SiFLEX module, see Figure 1. 26 27 28 29 30 31 Atmel ATXMEGA256A3 ATXMEGA256A3 32 33 /RST RX_START IRQ SLP_TR /SEL MOSI MISO SCLK 8 10 24 11 23 22 20 Atmel AT86RF212 AT86RF212 19 Figure 5 SiFLEX Module Block Diagram Internal Interconnects Microcontroller The XMEGA A3 is a family of low power, high performance and peripheral rich CMOS 8/16-bit microcontrollers based on the AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the XMEGA A3 achieves throughputs approaching 1 Million Instructions Per Second (MIPS), thus allowing the system designer to optimize power consumption versus processing speed. Figure 6 shows a block diagram of the ATXMEGA256A3 ATXMEGA256A3. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 10 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Figure 6 ATXMEGA256A3 ATXMEGA256A3 Block Diagram The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction, executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs many times faster than conventional singleaccumulator or CISC based microcontrollers. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 11 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET The XMEGA A3 devices have five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and all peripherals to continue functioning. The Power-down mode saves the SRAM and register contents but stops the oscillators, disabling all other functions until the next TWI or pin-change interrupt, or Reset. In Powersave mode, the asynchronous Real Time Counter continues to run, allowing the application to maintain a timer base while the rest of the device is sleeping. In Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is sleeping. This allows very fast start-up from external crystal combined with low power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run. To further reduce power consumption, the peripheral clock for each individual peripheral can optionally be stopped in Active mode and Idle sleep mode. Radio The AT86RF212 AT86RF212 is a low-power, low-voltage 800/900 MHz transceiver specially designed for low-cost IEEE 802.15.4, ZigBeeTM, and high data rate ISM applications. For the sub-1 GHz bands, it supports a low data rate of 40kbps of the IEEE 802.15.4-2003 standard [2] and provides an optional data rate 250kbps using O-QPSK, according to IEEE 802.15.4-2006. Furthermore hardware accelerators improve overall system power efficiency and timing. The receiver path is based on a low-IF architecture. After channel filtering and down conversion the low-IF signal is sampled and applied to the digital signal processing part. Communication between transmitter and receiver is based on direct sequence spread spectrum with different modulation schemes and spreading codes. The AT86RF212 AT86RF212 supports the IEEE 802.15.4-2006 standard mandatory BPSK modulation and optional O-QPSK modulation in the 800 and 900 MHz band. For applications not necessarily targeting IEEE compliant networks the radio transceiver supports proprietary High Data Rate Modes based on O-QPSK. The AT86RF212 AT86RF212 features hardware supported 128 bit security operation. The standalone AES encryption/decryption engine can be accessed in parallel to all PHY operational modes. Configuration of the AT86RF212 AT86RF212, reading, and writing of data memory as well as the AES hardware engine are controlled by the SPI interface and additional control signals. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 12 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Figure 7 AT86RF212 AT86RF212 Block Diagram RF Amplifier The SiFLEX module contains a discrete high performance RF Front End for low-power and low-voltage 900MHz wireless applications. It is capable of 250mW output power, providing miles of range in outdoor applications. Antenna Options The SiFLEX module includes multiple antenna options. The module's regulatory certification has been completed with the following antennas: · Integrated 3.2-inch wire monopole soldered to the board. · Pulse W3112A W3112A helical antenna · Nearson S467AH-915 S467AH-915 dipole antenna attached to the board via 6-inch cable with connector. The SiFLEX castellated RF trace is not covered in the modular certification. If a host board is designed that will utilize an off board antenna via the castellated antenna connection an additional certification will be required. LS Research is equipped with a certification lab and can assist in getting this done at a very reasonable cost in a short period of time. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 13 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET An adequate ground plane is necessary to provide good efficiency. The ground plane of the host board on which the module is mounted increases the effective antenna ground plane size and improves the antenna performance. The environment the module is placed in will dictate the range performance The non-ideal characteristics of the environment will result in the transmitted signal being reflected, diffracted, and scattered. All of these factors randomly combine to create extremely complex scenarios that will affect the link range in various ways. It is also best to keep some clearance between the antenna and nearby objects. This includes how the module is mounted in the product enclosure. Unless the items on the following list of recommendations are met, the radiation pattern can be heavily distorted. Whichever antenna is used, it is best to keep a few things in mind when determining its location. · Never place ground plane or copper trace routing underneath the antenna. · LSR recommends keeping metal objects as far away from the antenna as possible. At a very minimum keep the antenna at least 5 cm from any metallic objects, components, or wiring. The farther the antenna is placed from these interferers, the less the radiation pattern and gain will be perturbed. · Do not embed the antenna in a metallic or metalized plastic enclosure. · If located within a plastic enclosure, keep the enclosure at least 1 cm from the antenna. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 14 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET MODES OF OPERATION · With a host microcontroller · With the Atmel 802.15.4 MAC · With the Atmel ZigBee stack Host Microcontroller PC LSR Test Tool Software Figure 9 ModFLEXTM Test Tool Communications Log UART Si-FLEX Module on Evaluation Board Some examples of serial commands that can be used with the SiFLEX Module: · · UART Si-FLEX Module on Your Board Set/Query device address · Your Microcontroller (Host) of Choice Set/Query RF power · -OR- Set/Query RF channel Transmit RF data or notification RF data received · Go to Sleep Software Stacks Figure 8 Host Microcontroller Modes of Operation Out of the box the SiFLEX module contains an 802.15.4 based application that uses a host serial processor. This allows features of the module to be explored with the LSR PC based test tool, or controlled with a host microcontroller. The advantage of this method is simplicity; all major features of using the radio are simplified into a simple serial message, taking the burden of becoming a radio expert off the developer. Use the Communications Log in the ModFLEXTM Test Tool software and serial host protocol documents to see the messages in action. It will help you become familiar with the serial commands and how to implement them on your own microcontroller. There are two software stacks provided by Atmel to streamline development: MAC (802.15.4) Atmel ZigBee Stack Overall Complexity and Development Effort Figure 10 SiFLEX Compatible Stacks 802.15.4 MAC · · · Use for applications requiring point-topoint or star network topology. Advantages: Quick learning curve, minimize software development, easy to deploy in the field Disadvantages: No mesh networking The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 15 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET · Application Software (to control switches, LED's, serial ports and so on) Software Interface 802.15.4 MAC (To Tx/Rx RF data) Figure 11 SiFLEX with 802.15.4 MAC Advantages: Covers a large area with a ZigBee network. · Disadvantages: Large learning curve, more software development, complexity Application Software (to control switches, LED's, serial ports and so on) Software Interface ZigBee Stack (To Tx/Rx RF data) Atmel ZigBee Stack · Use when mesh networking is required. Figure 12 SiFLEX with Atmel ZigBee Stack The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 16 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET DEVELOPMENT TOOLS AVR Studio AVR Studio® is an Integrated Development Environment (IDE) for writing and debugging AVR® applications in Windows® 9x/NT/2000/XP/Vista(32- and 64-bit) environments. AVR Studio 4 includes an assembler, simulator, and in-circuit debugger. into the ModFLEXTM Development Board, and can easily be adapted to other hardware. See the Atmel website for more information and ordering options. AVR Studio is the Integrated Development Environment (IDE) developed by Atmel for writing and debugging Atmel AVR applications. Eclipse Eclipse is an IDE for C/C+ developers. The Eclipse IDE requires a Java Runtime Environment (JRE) be installed on your machine to run. While it can run using a Java 1.4 JRE, a Java5 JRE (minimum) is recommended. See the SiFLEX User's Guide for detailed instructions for installing Eclipse and integrating it with AVR Studio and WinAVR. Figure 13 AVR JTAGICE mkII AVRISP mkII Another option for in-circuit programming is the AVRISP mkII from Atmel, Figure 14. The AVRISP mkII combined with AVR Studio® can program new AVR 8-bit RISC microcontrollers with ISP Interface. WinAVR WinAVR is a suite of executable, open source software development tools for the Atmel AVR series of RISC microprocessors hosted on the Windows platform. It includes the GNU GCC compiler for C/C+. WinAVR contains all the tools for developing on AVR family microcontrollers from Atmel. This includes avr-gcc (compiler), avrdude (programmer), avr-gdb (debugger), and more. AVR JTAGICE mkII Custom firmware development can be done on the SiFLEX module using development tools available through Atmel. Shown in Figure 13, a JTAGICE mkII interface is required. It plugs Figure 14 AVRISP mkII IAR Embedded Workbench for Atmel AVR Another option is IAR Embedded Workbench for Atmel AVR. IAR Embedded Workbench for AVR is an integrated development environment for building and debugging embedded applications. Visit the IAR Systems website for additional information. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 17 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET ELECTRICAL SPECIFICATIONS The majority of these characteristics are based on the use of the Atmel IEEE 802.15.4 MAC loaded with the generic application firmware written by LSR. Custom firmware may require these values to be re-characterized by the customer. Absolute Maximum Ratings Rating Min 3.6 V -0.3 Vcc + 0.3 V +10 Voltage on any pin with respect to ground Unit 0 Power supply voltage Max dBm +85 ºC +150 ºC RF input power Operating temperature range -40 Storage temperature -50 Table 3 Absolute Maximum Ratings 1 Recommended Operating Conditions Characteristic Min Typ Max Unit Power supply voltage (Vdd) 2.0 3.3 3.45 Vdc Ambient temperature range -40 25 85 ºC Table 4 Recommended Operating Conditions Module will NOT transmit, if VCC > 3.5V. 1 Under no circumstances should exceeding the maximum ratings specified in the Absolute Maximum Ratings section be allowed. Stressing the module beyond these limits may result permanent damage to the module that is not covered by the warranty. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 18 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET General Characteristics Parameter Min RF frequency range Typ Max Unit 906 924 MHz RF data rate 40 1000 kbps Host data rate 1.2 921.6 kbps 19.2 Flash memory 256 kB RAM 16 kB EEPROM 4 kB Table 5 General Characteristics Power Consumption (Ta = 25°C, Vcc = 3.3V, fc = 906-924MHz, Rload = 50) Parameter Transmit mode Test Conditions Min Typ Max Unit Maximum power step 270 285 300 mA 27 30 33 mA 2 5 µA Typ Max Unit Receive mode Sleep mode Table 6 Power Consumption DC Characteristics General Purpose I/O Parameter Test Conditions Min Logic input low -0.3 0.2 * VCC V Logic input high 0.8 * VCC VCC + 0.3 V Logic output low Iout = 15mA Vcc = 3.3V 0.4 V Logic output high Iout = -8mA Vcc = 3.3V 2.9 V Table 7 DC Characteristics General Purpose I/O The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 19 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET RF Characteristics Transmitter Characteristics (TA =25°C, VDD=3.3 V, fc =906-924 MHz) Parameter Test Conditions Min Typ Max Unit 24.0 25 dBm 25 dBm Nominal max output power 250mW 22 Programmable output power range 22 Steps -6.0 Harmonics (2fo) -34 dBm Harmonics (3fo) -38 dBm Error vector magnitude 10 35 % rms Table 8 Transmitter RF Characteristics The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 20 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Host Protocol RF Power Level AT86RF212 AT86RF212 PHY_TX_PWR Register Value 21 OQPSK into 50 ohms at U.FL BPSK into 50 ohms at U.FL RF Output Power (dBm) Typical Current Consumption (mA) RF Output Power (dBm) Typical Current Consumption (mA) 0x0C 23.9 260 24.4 285 20 0x0B 23.8 255 24.3 275 19 0x0A 23.4 245 24.0 270 18 0x09 23.0 235 23.5 260 17 0x08 21.8 200 22.0 220 16 0x07 20.7 185 20.7 195 15 0x06 20.0 175 20.0 185 14 0x05 19.5 165 19.5 175 13 0x04 18.6 150 18.5 160 12 0x03 17.6 140 17.5 145 11 0x02 16.2 125 16.0 130 10 0x23 15.6 120 15.0 120 9 0x22 14.0 105 13.0 105 8 0x42 12.0 95 10.5 90 7 0x41 9.0 80 8.0 80 6 0x61 7.0 75 5.0 70 5 0x60 4.5 68 2.5 65 4 0x83 1.0 62 0.0 61 3 0x82 -1.5 59 -3.0 57 2 0x81 -4.0 57 -5.0 55 1 0xA1 -6.0 55 -7.0 54 0 0xC0 -8.0 54 -9.0 53 Table 9 RF Power Settings Receiver Characteristics (TA =25°C, VDD=3.3 V, fc =906-924 MHz) Parameter Test Conditions Receiver Sensitivity @ 1% PER BPSK 40kbit/s ANT1 Port Saturation Level @ 1% PER Min ANT1 port Typ Max Unit -102 dBm -2 dBm Table 10 Receiver RF Characteristics For additional details regarding the electrical specifications, refer to the ATXMEGA256A3 ATXMEGA256A3 and AT86RF212 AT86RF212 datasheets on the Atmel website. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 21 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET SOLDERING RECOMMENDATIONS · · Soak Time 60-120 sec · TLiquidus 217°C · Time above TL 60-150 sec · Tpeak 260°C · Time within 5º of Tpeak 20-30 sec · Time from 25º to Tpeak 8 min max · Ramp down rate 6°C/sec max · Achieve the brightest possible solder fillets with a good shape and low contact angle. Ultrasonic cleaning could damage the module permanently. Maximum Soak Temperature 200°C · · Minimum Soak Temperature 150°C · Cleaning with alcohol or a similar organic solvent will likely flood soldering flux residuals into the RF shield, which is not accessible for post-washing inspection. The solvent could also damage any stickers or labels. Ramp up rate (from Tsoakmax to Tpeak) 3º/sec max · Cleaning with water can lead to capillary effects where water is absorbed into the gap between the host board and the module. The combination of soldering flux residuals and encapsulated water could lead to short circuits between neighboring pads. Water could also damage any stickers or labels. · Recommended Reflow Profile Lead (Pb) Free Soldering Paste Use of a "No Clean" Lead (Pb) free Tin/Silver/Copper solder paste is strongly recommended. Melting temperature 216-221°C. Consider using a "no clean" soldering paste and thus eliminate the post-soldering cleaning step completely. Optical Inspection Note: The quality of solder joints on the castellations (`half vias') where they contact the host board should meet the appropriate IPC Specification. See IPC-A-610-D IPC-A-610-D Acceptability of Electronic Assemblies, section 8.2.4 Castellated Terminations." The soldering temperatures and profile chosen depends on additional factors such as choice of soldering paste, size, thickness and other properties of the host board. Cleaning After soldering the Module to the host board, consider optical inspection to check the following: · Proper alignment and centering of the module over the pads. · Proper solder joints on all pads. · Excessive solder or contacts to neighboring pads, or vias. Repeating Reflow Soldering Only a single reflow process is encouraged boards. soldering for host In general, cleaning the populated modules is strongly discouraged. Residuals under the module cannot be easily removed with any cleaning process. The information in this document is subject to change without notice. Confirm the data is current by downloading the latest revision from www.lsr.com. SFLX-DATA-0001-01 SFLX-DATA-0001-01.10 Copyright © 2009 LS Research, LLC Page 22 of 29 SiFLEX02 SiFLEX02 TRANSCEIVER MODULE LS900-SI-02-AXX LS900-SI-02-AXX DATASHEET Wave Soldering Handling If wave soldering is required on the host boards due to the presence of leaded components, only a single wave soldering process on the side opposite the module is encouraged. The SiFLEX modules are designed and packaged to be processed in an automated assembly line. Hand Soldering Hand soldering is possible. Use a soldering iron temperature setting equivalent to 350°C, follow IPC recommendations/reference document IPC-7711 IPC-7711. Rework The SiFLEX module can be unsoldered from the host board. Use of a hot air rework tool and hot plate for pre-heating from underneath is recommended. Avoid overheating. Never attempt a rework on the module itself, e.g. replacing individual components. Such actions will terminate warranty coverage. Warning! The SiFLEX modules contain a highly sensitive electronic circuitry. Handling without proper ESD protection may destroy or damage the module permanently. Warning! According to JEDEC ISP, the SiFLEX modules are moisture sensitive devices. Appropriate handling instructions and precautions are summarized in Section 2.1. Read carefully to prevent permanent damage due to moisture intake. Moisture Sensitivity Level (MSL) MSL 3, per J-STD-033 J-STD-033 Storage Additional Grounding Attempts to improve module or system grounding by soldering braids, wires, or cables onto the module RF shield cover is done at the customers own risk. The numerous ground pins at the module perimeter should be sufficient for optimum immunity to external RF interference. SHIPPING, HANDLING, AND STORAGE Storage/shelf life in sealed bags is 12 months at