LPC2290/01 - Datasheet Archive

 

ERRATA SHEET Date: Document Release: Device Affected: 2008 March 5 Version 1.2 LPC2290/01 This errata sheet describes both the

 

INTEGRATED CIRCUITS ERRATA SHEET Date: Document Release: Device Affected: 2008 March 5 Version 1.2 LPC2290/01 LPC2290/01 This errata sheet describes both the known functional problems and any deviations from the electrical specifications known at the release date of this document. Each deviation is assigned a number and its history is tracked in a table at the end of the document. 2008 March 5 NXP Semiconductors NXP Semiconductors LPC2290/01 LPC2290/01 Erratasheet Document revision history Rev 1.2 1.1 2008 March 5 Date March 5, 2008 December 21, 2007 Description 1. Added Rev C to Timer.1 problem 1. This table was added after document revision 1.0 2. Added Rev C 3. Removed Errata Note for P0.26 pin. It was accidentally listed in version 1.0. P0.26 pin does not exist on LPC2290/01 LPC2290/01. 4. Added Errata Note for TD1 pin. 2 NXP Semiconductors LPC2290/01 LPC2290/01 Erratasheet Identification: The LPC2290/01 LPC2290/01 devices typically have the following top-side marking: LPC2290xxx /01 xxxxxxx xxYYWWR The last letter in the last line (field `R') will identify the device revision. This Errata Sheet covers the following revisions of the LPC2290/01 LPC2290/01: Revision Identifier (R) `B' `C' Comment Initial device revision Second device revision Field `YY' states the year the device was manufactured. Field `WW' states the week the device was manufactured during that year. 2008 March 5 3 NXP Semiconductors LPC2290/01 LPC2290/01 Erratasheet Errata Overview - Functional Problems Functional Problem Short Description Core.1 Incorrect load of the link register SPI.1 Incorrect shifting of data in slave mode at lower frequencies SSP.1 Initial data bits/clocks corrupted in SSP transmission Timer0.1 Match 0.1 is not connected to P0.5 Timer.1 Device Revision the problem occurs in Timer Counter reset occurs on incorrect edge in counter mode B, C B B, C B B, C Errata Overview - AC/DC Deviations AC/DC Deviation N/A Short Description N/A N/A Errata Notes Note Note.1 2008 March 5 Device Revision the deviation occurs in Short Description TD1 pin (pin 22) must not be driven low during reset. 4 NXP Semiconductors LPC2290/01 LPC2290/01 Erratasheet Functional Problems of LPC2290/01 LPC2290/01 Core.1 Incorrect update of the Abort Link register in Thumb state Introduction: If the processor is in Thumb state and executing the code sequence STR, STMIA or PUSH followed by a PC relative load, and the STR, STMIA or PUSH is aborted, the PC is saved to the abort link register. Problem: In this situation the PC is saved to the abort link register in word resolution, instead of half-word resolution. Conditions: The processor must be in Thumb state, and the following sequence must occur: