LMX2332L 2549U LMX233X BFR505 1SV229 - Datasheet Archive

 

EVALUATION BOARD SET-UP INSTRUCTIONS The LMX2332L Evaluation Board is an implementation of the schematic shown as Figure 2. The

 

OPERATING INSTRUCTIONS FOR THE NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION BOARD SET-UP INSTRUCTIONS The LMX2332L LMX2332L Evaluation Board is an implementation of the schematic shown as Figure 2. The board, shown in Figure 3, consists of the LMX2332L LMX2332L, a modular RF VCO, a discrete IF VCO and their respective loop filters. Resistors denoted as O.C. / S.C. are for connecting various outputs to output pads or to ground by using 0 resistors as shorts. The board has two kinds of interconnections. SMA flange mount connectors are supplied for the external reference and VCO output, power supply biasing and grounding. A four pin header allows VCC, VP, and Vvco to be driven off either a single voltage supply, or separately. The cable provided connects to the evaluation board pin header and the parallel port of a PC XT (or better) equivalent. Since most P.C.'s parallel port output level is 5 V, pads for resistive dividers on the Clock, Data, and Load Enable are also included. This will allow low voltage operation of the PLL without overdriving the Microwire inputs. The power supplies should be connected through the SMA connectors. The user should make the following connections to operate the evaluation board in standard mode: (1) Connect the RF or IF VCO output, (or both)VCO OUT, to a spectrum analyzer, (2) Connect a reference input from 5 MHz to 40 MHz at 0 dBm to the REF IN port, a 50 ohm termination is already on the board for using an external signal generator. (3) Connect the cable assembly to the parallel port of the PC and to the 6 pin header on the evaluation board. Connect the power supplies to the appropriate biasing (3.0V) using the SMA connectors and shorting bars on the pin headers (see schematic). Connect the cable with the arrow on the connector facing the board. If you were holding the cable in your hand the sockets to the far left should attach to the pins on the board. The board is now ready to operate. This configuration is for evaluation purposes only and is not meant show how it will be used in a system. The Loop values for the 2 integrators have been selected and placed in the loop in the configurations shown below. The loop filters were designed for an RF comparison frequency of 200 kHz, and an IF comparison frequency of 50 kHz. TM The evaluation board has been designed to accept more complex configurations. For Fastlock operation, add resistor R2' equal to R2 and add a 0 resistor for R10. DoRF 820pf 15k 4.7k RF VCO 82pf 8200pf RF LOOP FILTER Figure 1: Loop Filters VCO used: Varil 902 or Varil 2549U 2549U Icp = 4X mode DoIF 3300pf 22k 3.9k. 0.1uf IF LOOP FILTER Rev D 01/20/98 IF VCO 82pf NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES USING LMX2332L LMX2332L SOFTWARE Insert the diskette into drive a: or b:. The program may be operated from the floppy or may be copied onto a hard disk. Because the program uses extended precision real numbers in its calculations the program may not operate on some older DOS computers. A PC-AT or equivalent is recommended. The program may be started by typing LMX2332L LMX2332L. The LMX2332L LMX2332L evaluation program controls the LMX2332L LMX2332L Evaluation Board via a standard parallel port. A cable is provided to make the connection from the computer to the board. The program is intended to be easy to install and use, exercise the PLL, and demonstrate typical performance. It is not intended to be representative of the control code which the customer will implement within their application. Upon power-up the program will detect the number and location of parallel ports available to the system. The user will be prompted to select one port. The evaluation program is menu driven. All menu selections may be made by pressing "Enter" when a menu is highlighted. Up, down, left and right arrows are used to change which menu id highlighted. Speed keys are also included for each active menu item. Use Speed keys by typing the letter displayed in red corresponding to the mode desired. The top menu pane consists of pull down menus titled "Set (F)requency", "Set (R)egister", "(T)uning", "(M)odes", "Fo/(L)D", and "(Q)uit" where the speed keys are listed in parentheses. To exit from a menu at anytime press "Escape". A status pane is included at the bottom of the pane to give on-line help descriptions of highlighted menu items. The program displays a block showing the present tuning parameters for VCO, Crystal Reference, and Phase detector reference frequency for the HIGH frequency PLL. To display and edit the second PLL select "IF P(L)L" under the "Modes" pulldown menu. Activate the "Set Frequency" pulldown menu to control these values. To the right of this block is the "Scratchpad", showing the values as you enter them. The program will issue a warning and a suggestion if a value is selected which does not maintain an integer relationship between the VCO or crystal frequency and the reference frequency. The suggestion will be the nearest value of the parameter just changed which will produce an integer relationship. The user may select this value, or any other, so long as the integer relationship is established. Upon successful selection of tuning parameters, the download values are calculated and loaded. The board must be powered up in order for the values to be loaded. If power is applied after the software is on or power is turned off for some reason all that is required is entering "Load Dual PLL" to download the values for both PLL's. The program displays, and allows modification of, the binary values for the VCO divider (P), Reference Divider(R), and control codes. The value of P (either 64 or 128) shows the present status of the prescaler control bit which enables either the 64/65 prescaler or the 128/129 prescaler. When an N value is entered which is invalid for P=64, the program will display an error message and automatically switch to P=128. To modify N, R or P directly, activate the "Set Register" menu, select the desired mode and use the arrow keys to move horizontally or to change values ("up" changes "0" to "1", "down" changes "1" to "0"). You may also type in "1" or "0". Users will find items in the "Tuning" menu useful. In "Hand Tune" mode the user may step up or down in single increments by using the up or down arrows, or in increments of 10 by using the left and right arrows. Other steps, 2 up to 9, are taken by pressing any number from 2 to 9. Steps downward are taken by pressing the down or left arrow keys or by holding down the shift key when pressing any number from 2 to 9. Rev D 01/20/98 NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES The "Switch" mode in the "Tuning" menu allows measurement of PLL switching time by initiating switching between the presently tuned frequency and a frequency an arbitrary number of steps away. In "Switch" mode, the user will be prompted for an integer (+ or -) number of steps and a delay (msec). The delay will allow the user to specify the time delay between switching. The "Enable" input forms a fairly good trigger (it is written twice, once for N and once for R). Load time will vary depending upon the processing speed of the computer being used. The "Auto Tune" mode in the "Tuning" menu allows the user to switch to a set frequency and specify the interval to step in. Entering this mode, the user will be prompted for an integer to step up to, an integer to step by and a delay (msec). The delay allows the user to specify the time delay between steps. This would allow a user to verify operation at all channels of interest. The "Modes" menu is used to toggle the PLL between different states. The menu items are interactive and change with the state of the PLL. Choosing the first menu item (either "IF PLL" or "RF PLL") switches the active display from the High Frequency PLL to the Low Frequency PLL, or vice versa. The second menu item toggles the slope of the phase detector between "PD = Positive" and "PD = Negative". "Icp = 1(4) mA" switches between the high and low current charge pump output. The "Power Down (Up)" selection powers down (or up) the currently displayed PLL only. Selecting the last menu item under modes "Do Tri-State (Active)" toggles the PLL charge pump in and out of Tri-State mode. The "Fo/LD" menu is specifically used to control the state of the frequency divider/ lock detect/ Fastlock output pin. The user may select the Fastlock mode, as well as disable the output, or select one of seven output states which allow monitoring either the R or N divider outputs, or lock detect for each PLL. While selecting Fastlock mode, the user will be prompted for a delay time in milleseconds, and `Fastlock' will appear in the active mode display. Upon using the switching mode with Fastlock activated, the part will stay in the 4mA Fastlock mode with R2' switched in to ground for the programmed number of milleseconds and then revert to the 1mA mode with the FoLD input a high impedance. Keep in mind the number of milleseconds actually delayed may vary from computer to computer, and is more accurate when the program is run directly from DOS. The program is exited by choosing "Yes,Quit" in the "Quit" menu, which saves the current parameters in a log file. Any mode may be exited by pressing "Enter". TYPICAL MEASURED PERFORMANCE OF THE LMX2332L LMX2332L EVALUATION BOARD Normal operating parameters for the RF PLL include spurious at less than -80 dBc, switching speed (for a 200 kHz reference frequency and a step of 50 MHz to within a frequency error of 1 kHz) < 750 microseconds. Phase noise is under -79 dBc/Hz at 1 kHz offset. Noise at 100 kHz is under -110 dBc/Hz. The VCO operating voltages are 3 V. The high frequency VCO tunes over a frequency range of 889 to 915 MHz, while the low frequency VCO has a frequency range of approximately 204 MHz to 212 MHz. Typical current draw at 3 volts is 3 mA (not including the 6 mA VCO). These parameters were measured on a very small sample size. All parameters are subject to change. NOTE: Computer monitors and other lab equipment has been shown to cause noise spikes. If you see noise spikes on the signal try turning off the monitor or other equipment to verify that they are not the cause. Also noise may be getting onto the signal through the cable that connects to the parallel port of the computer. Rev D 01/20/98 NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES TYPICAL MEASURED DATA "Close in" Phase Noise Reference Spurs Rev D 01/20/98 NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES Loop Bandwidth Positive Frequency Switching Waveform Rev D 01/20/98 NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES Negative Frequency Switching Waveform PositiveLock Time to within 1 kHz Rev D 01/20/98 NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES Negative Lock Time to within 1kHz Rev D 01/20/98 Figure 2 : LMX2332L LMX2332L Evaluation Board Schematic VccRF C14 0.1 uf Vp RF C13 0.1 uf C12 100 pf RF C19 0.1 uf Vp if R2' C2 C2 4 2 3 1 10 RES1 R29 18 C16 0.01 uf R2 C25 0.1 uf O.C. R4 C4 C11 0.01 uf IF Loop Filter R20 C3 C1 U2 6 5 4 1 2 3 RF VCO C8 100 pf C9 100 pf R8 10 C7 100 pf 20 LMX233X LMX233X 19 18 17 U1 16 15 14 13 12 11 R17 10k C26 IF out C28 Q1 C35 BFR505 BFR505 100 pf C30 100 pf 100 pf C27 10 pf C31 C33 R15 8.2K 27 pf R16 100 C29 27 pf R19 C32 D1 1SV229 1SV229 C37 100 pf R25 C6 1000 pf R26 10K 22k J1 8 6 4 2 R23 R24 10K 22K Ref. in Rref 51 FoLD R21 O.C. // S.C. R22 22K 10K Dual PLL (20 Pin) Evaluation Board (3 Volt Operation) Rev D 01/20/98 56 nH C36 100 pf R13 75 R10 O.C. // S.C. RF out R14 10k L1 C20 0.01 uf 1 2 3 4 5 6 7 8 9 10 C24 100 pf C17 0.01 uf R3 S.C. C22 100 pf IF O.C. // S.C. R28 18 O.C. C10 1.0 uf C18 100 pf R shunt 3 1 RF Loop Filter R27 10 C15 100 pf C21 0.1 uf 4 2 R2 VccIF 7 5 3 1 Figure 3 : LMX2332L LMX2332L Evaluation Board Layout Rev D 01/20/98 NATIONAL SEMICONDUCTOR LMX2332L LMX2332L EVALUATION NOTES LMX2332L LMX2332L Bill of Materials Part Used PartType Designators -1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 9 1 2 2 1 1 2 1 1 1 2 5 1 2 3 2 1 1 1 1 13 0.01 uf 0.1 uf 0.01 uf 0.1 uf 0.01 uf 0.1 uf 1.0 uf 1SV229 1SV229 8.2K 10 10K 10 pf 18 22K 27 pf 51 56 nH 75 100 100 pf 22 23 31 33 1 1 1 1 1000 pf BFR505 BFR505 0 RF VCO Rev D 01/20/98 C1 C2 C3 C31 C33 R2 R3 R19 R20 C11 C13 C14 C16 C17 C19 C20 C21 C25 C10 D1 R15 R8 R27 R21 R23 R25 R14 R17 C27 R28 R29 R22 R24 R26 C28 C29 Rref L1 R13 R16 C7 C8 C9 C12 C15 C18 C22 C24 C26 C30 C35 C36 C37 C6 Q1 R4 U2