LM111QML LM111 LM106 LM710 LM111E-SMD 5962-8687701Q2A LM111H-SMD - Datasheet Archive

 

Voltage Comparator General Description The LM111 is a voltage comparator that has input currents nearly a thousand times lower

 

LM111QML LM111QML Voltage Comparator General Description The LM111 LM111 is a voltage comparator that has input currents nearly a thousand times lower than devices such as the LM106 LM106 or LM710 LM710. It is also designed to operate over a wider range of supply voltages: from standard ± 15V op amp supplies down to the single 5V supply used for IC logic. The output is compatible with RTL, DTL and TTL as well as MOS circuits. Further, it can drive lamps or relays, switching voltages up to 50V at currents as high as 50 mA. Both the inputs and the output of the LM111 LM111 can be isolated from system ground, and the output can drive loads referred to ground, the positive supply or the negative supply. Offset balancing and strobe capability are provided and outputs can be wire OR'ed. Although slower than the LM106 LM106 and LM710 LM710 (200 ns response time vs 40 ns) the device is also much less prone to spurious oscillations. The LM111 LM111 has the same pin configuration as the LM106 LM106 and LM710 LM710. Features n n n n n n n n n Available with radiation guaranteed Operates from single 5V supply Input current: 200 nA max. over temperature Offset current: 20 nA max. over temperature Differential input voltage range: ± 30V Power consumption: 135 mW at ± 15V Power supply voltage, single 5V to ± 15V Offset voltage null capability Strobe capability Ordering Information NS PART NUMBER SMD PART NUMBER NS PACKAGE NUMBER PACKAGE DESCRIPTION LM111E-SMD LM111E-SMD 5962-8687701Q2A 5962-8687701Q2A E20A 20LD Leadless Chip Carrier LM111H-SMD LM111H-SMD 5962-8687701QGA 5962-8687701QGA H08C 8LD TO-99 Metal Can LM111J-8-SMD LM111J-8-SMD 5962-8687701QPA 5962-8687701QPA J08A 8LD CERDIP LM111WG-SMD LM111WG-SMD 5962-8687701QZA 5962-8687701QZA WG10A WG10A 10LD Ceramic SOIC LM111E/883 LM111E/883 E20A LM111H/883 LM111H/883 H08C 8LD TO-99 Metal Can LM111J-8/883 LM111J-8/883 J08A 8LD CERDIP LM111J/883 LM111J/883 J14A 14LD CERDIP LM111W/883 LM111W/883 W10A 10LD CERPACK LM111WG/883 LM111WG/883 WG10A WG10A 20LD Leadless Chip Carrier 10LD Ceramic SOIC LM111HPQMLV LM111HPQMLV 5962P0052401VGA 5962P0052401VGA 30k rd(Si) H08C 8LD TO-99 Metal Can LM111WPQMLV LM111WPQMLV 5962P0052401VHA 5962P0052401VHA 30k rd(Si) W10A 10LD CERPACK LM111WGPQMLV LM111WGPQMLV 5962P0052401VZA 5962P0052401VZA 30k rd(Si) WG10A WG10A LM111HLQMLV LM111HLQMLV 5962L0052401VGA 5962L0052401VGA 50k rd(Si) H08A 8LD TO-99 Metal Can LM111J-8LQMLV LM111J-8LQMLV 5962L0052401VPA 5962L0052401VPA 50k rd(Si) J08A 8LD CERDIP LM111WGLQMLV LM111WGLQMLV 5962L0052401VZA 5962L0052401VZA 50k rd(Si) WG10A WG10A LM111WLQMLV LM111WLQMLV 5962L0052401VHA 5962L0052401VHA 50k rd(Si) W10A © 2005 National Semiconductor Corporation DS201285 DS201285 10LD Ceramic SOIC 10LD Ceramic SOIC 10LD CERPACK www.national.com LM111QML LM111QML Voltage Comparator December 2005 LM111QML LM111QML Connection Diagrams Metal Can Package 20128506 Note: Pin 4 connected to case Top View See NS Package Number H08C Dual-In-Line Package Dual-In-Line Package 20128534 Top View See NS Package Number J08A 20128535 Top View See NS Package Number J14A 20128533 See NS Package Number W10A, WG10A WG10A 20128573 See NS Package NumberE20A www.national.com 2 LM111QML LM111QML Schematic Diagram (Note 1) 20128505 Note 1: Pin connections shown on schematic diagram are for H08 package. 3 www.national.com LM111QML LM111QML Absolute Maximum Ratings (Note 2) Positive Supply Voltage +30.0V Negative Supply Voltage -30.0V Total Supply Voltage 36V Output to Negative Supply Voltage 50V GND to Negative Supply Voltage 30V Differential Input Voltage ± 30V Sink Current 50mA Input Voltage ± 15V (Note 3) Power Dissipation (Note 4) 8 LD CERDIP 400mW @ 25°C 8 LD Metal Can 330mW @ 25°C 10 LD CERPACK 330mW @ 25°C 10 LD Ceramic SOIC 330mW @ 25°C 20 LD LCC 500mW @ 25°C Output Short Circuit Duration 10 seconds Maximum Strobe Current 10mA -55°C TA 125°C Operating Temperature Range Thermal Resistance JA 8 LD CERDIP (Still Air @ 0.5W) 134°C/W 8 LD CERDIP (500LF/Min Air flow @ 0.5W) 76°C/W 8 LD Metal Can (Still Air @ 0.5W) 162°C/W 8 LD Metal Can (500LF/Min Air flow @ 0.5W) 92°C/W 10 Ceramic SOIC (Still Air @ 0.5W) 231°C/W 10 Ceramic SOIC (500LF/Min Air flow @ 0.5W) 153°C/W 10 CERPACK (Still Air @ 0.5W) 231°C/W 10 CERPACK (500LF/Min Air flow @ 0.5W) 153°C/W 14 LD CERDIP (Still Air @ 0.5W) 97°C/W 14 LD CERDIP (500LF/Min Air flow @ 0.5W) 65°C/W 20 LD LCC (Still Air @ 0.5W) 90°C/W 20 LD LCC (500LF/Min Air flow @ 0.5W) 65°C/W JC 8 LD CERDIP 21°C/W 8 LD Metal Can Pkg 50°C/W 10 LD Ceramic SOIC 24°C/W 10 LD CERPACK 24°C/W 14 LD CERDIP 20°C/W 20 LD LCC 21°C/W -65°C TA 150°C Storage Temperature Range Maximum Junction Temperature 175°C Lead Temperature (Soldering, 60 seconds) 300°C V+ = -5V Voltage at Strobe Pin Package Weight (Typical) 8 LD Metal Can 965mg 8 LD CERDIP 1100mg 10 LD CERPACK 250mg 10 LD Ceramic SOIC 225mg 14 LD CERDIP TBD 20 LD LCC ESD Rating www.national.com TBD (Note 5) 300V 4 LM111QML LM111QML Recommended Operating Conditions VCC = ± 15VDC 15VDC Supply Voltage -55°C TA 125°C Operating Temperature Range Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A Subgroup Description 1 Static tests at Temperature (°C) +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 5 www.national.com LM111QML LM111QML LM111 LM111 883 Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. DC: V56 = 0, RS = 0 , VCC = ± 15V, VCM = 0, VO = 1.4V WRT -VCC The pin assignments are based on the 8 pin package configuration. (Note 7) Symbol Parameter Conditions Notes IIO Input Offset Current VCM = 13.5V, RS = 50K Subgroups Min Max -10 10 nA 1 -20 20 nA 2, 3 -30 30 nA 1 -10 10 nA 1 -20 20 nA 2, 3 -30 30 nA 1 -10 10 nA 1 -20 20 nA 2, 3 -30 30 nA 1 100 nA 1 150 nA 2, 3 VCM = -14.5V, RS = 50K 100 nA 1 150 nA 2, 3 RS = 50K 100 nA 1 150 nA 2, 3 VCM = 13.5V, V85 = V86 = 0V, RS = 50K (Note 7) VCM = -14.5V, RS= 50K VCM = -14.5V, V85 = V86 = 0V, RS= 50K (Note 7) RS = 50K V85 = V86 = 0V, RS = 50K IIB Input Bias Current (Note 7) VCM = 13.5V, RS = 50K Unit IOL Output Leakage Current VCC = ± 18V, I5 + I6 = 5mA, VO = 35V WRT -VCC (Note 7) 10 nA 1 (Note 7) 500 nA 2, 3 IGL Ground Leakage Current VCC = ± 18V, I5 + I6 = 5mA, VO = 50V WRT -VCC (Note 7) 25 nA 1 (Note 7) 500 nA 2 VI = -5mV, I7 = 50mA (Note 7) 1.5 V 1, 2, 3 VI = -6mV, I7 = 8mA (Note 7) 0.4 V 1, 2, 3 5.0 mA 1, 2 15 mA 3 6.0 mA 1, 2 15 mA 3 VSat -ICC +ICC IL1 IL2 VOSt Saturation Voltage Negative Supply Current Positive Supply Current Input Leakage Current Input Leakage Current Collector Output Voltage (Strobe) www.national.com VCC = ± 18V, V28 = 1V, V38 = 30V, I5 + I6 = 5mA VO = 50V WRT -VCC (Note 7) 10 nA 1 (Note 7) 30 nA 2 VCC = ± 18V, V38 = 1V, V28 = 30V, I5 + I6 = 5mA VO = 50V WRT -VCC (Note 7) 10 nA 1 (Note 7) 30 nA 2 14 6 V 1 14 ISt = 3mA V 1 883 Electrical Characteristics LM111QML LM111QML LM111 LM111 (Continued) DC Parameters (Continued) The following conditions apply, unless otherwise specified. DC: V56 = 0, RS = 0 , VCC = ± 15V, VCM = 0, VO = 1.4V WRT -VCC The pin assignments are based on the 8 pin package configuration. (Note 7) Symbol Parameter Conditions VIO Input Offset Voltage Notes VCM = 13.5V Min Max Unit Subgroups -3.0 3.0 mV 1 -4.0 4.0 mV 2, 3 -3.0 3.0 mV 1 -3.0 3.0 mV 1 -4.0 4.0 mV 2, 3 -3.0 3.0 mV 1 -3.0 3.0 mV 1 -4.0 4.0 mV 2, 3 -3.0 3.0 mV 1 VO = 0.4V, +VCC = 4.5V, -VCC = 0V, VCM = 3V -5.0 5.0 mV 1 -6.0 6.0 mV 2, 3 VO = 4.5V, +VCC = 4.5V, -VCC = 0V, VCM = 3V -3.0 3.0 mV 1 -4.0 4.0 mV 2, 3 VO = 0.4V, +VCC = 4.5V, -VCC = 0V, VCM = 0.5V -5.0 5.0 mV 1 -6.0 6.0 mV 2, 3 VO = 4.5V, +VCC = 4.5V, -VCC = 0V, VCM = 0.5V -3.0 3.0 mV 1 -4.0 4.0 mV 2, 3 VCM = 13.5V, V85 = V86= 0V (Note 7) VCM = -14.5V VCM = -14.5V, V85 = V86 = 0V V85 = V86 = 0V AVS Large Signal Gain (Note 7) (Note 7) -12V VO 35V, RL = 1K (Note 6) 40 V/mV 4 (Note 6) 30 V/mV 5, 6 AC Parameters The following conditions apply, unless otherwise specified. AC: V56 = 0, RS = 0 , VCC = ± 15V, VCM = 0, VO = 1.4V WRT -VCC The pin assignments are based on the 8 pin package configuration. (Note 7) Symbol tR Parameter Response Time 7 Notes Min Max Unit Subgroups 400 Conditions nS 7 www.national.com LM111QML LM111QML LM111 LM111 SMD Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. DC: VCC = ± 15V, VCM = 0 Max Unit Subgroups -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50 -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 +VCC = +2.5V, -VCC = -2.5V, VI = 0V, RS = 50 -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 VI = 0V, RS = 50 -3.0 +3.0 mV 1 -4.5 +4.5 mV 2, 3 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50 -3 +3 mV 1 -4.5 +4.5 mV 2, 3 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50 Parameter Min +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50 Symbol -3.0 +3.0 mV 1 -4.5 +4.5 mV 2, 3 VI = 0V, RS = 50K -10 +10 nA 1, 2 Conditions Notes VI = 0V, RS = 50 VIO VIO R IIO Input Offset Voltage Raised Input Offset Voltage Input Offset Current -20 +10 nA 1, 2 -20 +20 nA 3 -10 +10 nA 1, 2 -20 +20 nA 3 VI = 0V, RS = 50K -25 +25 nA 1, 2 +50 nA 3 -100 0.1 nA 1, 2 0.1 nA 3 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K -150 0.1 nA 1, 2 -200 0.1 nA 3 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50K Input Bias Current -10 -150 ± IIB 3 -50 Raised Input Offset Current nA +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50K IIOR +20 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K -150 0.1 nA 1, 2 -200 0.1 nA 3 14 V 1, 2, 3 80 dB 1, 2, 3 VI = 0V, RS = 50K VOSt Collector Output Voltage (Strobe) CMRR Common Mode Rejection Ratio -28V -VCC -0.5V, RS = 50, 2V +VCC 29.5V, RS = 50, -14.5V VCM 13V, RS = 50 www.national.com +VI = Gnd, -VI = 15V, ISt = -3mA, RS = 50 8 (Note 8) SMD Electrical Characteristics LM111QML LM111QML LM111 LM111 (Continued) DC Parameters (Continued) The following conditions apply, unless otherwise specified. DC: VCC = ± 15V, VCM = 0 ICEX IL Output Leakage Current Input Leakage Current Subgroups +VCC = 4.5V, -VCC = Gnd, IO = 8mA, ± VI = 0.71V, VID = -6mV 0.4 V 1, 2, 3 0.4 V 1, 2, 3 1.5 V 1, 2, 3 IO = 50mA, ± Vl= -14V, VID = -5mV Low Level Output Voltage Unit IO = 50mA, ± VI = 13V, VID = -5mV VOL Parameter Max +VCC = 4.5V, -VCC = Gnd, IO = 8mA, ± VI = -1.75V, VID = -6mV Symbol 1.5 V 1, 2, 3 -1.0 10 nA 1 -1.0 500 nA 2 Conditions Notes +VCC = 18V, -VCC = -18V, VO = 32V Min (Note 11) -5.0 500 nA 1, 2, 3 +VCC = 18V, -VCC = -18V, +VI = -17V, -VI = +12V (Note 11) -5.0 500 nA 1, 2, 3 6.0 mA 1, 2 7.0 mA 3 -5.0 mA 1, 2 -6.0 +ICC +VCC = 18V, -VCC = -18V, +VI = +12V, -VI = -17V mA 3 Power Supply Current -ICC Power Supply Current VIO / T Temperature Coefficient Input Offset Voltage Short Circuit Current µV/°C 2 (Notes 11, -25 13) 25 µV/°C 3 25°C T 125°C (Notes 11, -100 13) 100 pA/°C 2 (Notes 11, -200 13) 200 pA/°C 3 VO = 5V, t 10mS, -VI = 0.1V, +VI = 0V (Note 10) 200 mA 1 (Note 10) 150 mA 2 (Note 10) IOS 25 -55°C T 25°C Temperature Coefficient Input Offset Current (Notes 11, -25 13) -55°C T 25°C IIO / T 25°C T 125°C 250 mA 3 mV 1 mV 1 +VIO adj. Input Offset Voltage (Adjustment) VO = 0V, VI = 0V, RS = 50 -VIO adj. Input Offset Voltage (Adjustment) VO = 0V, VI = 0V, RS = 50 ± AVE Voltage Gain (Emitter) RL = 600 5.0 -5.0 (Note 6) 10 V/mV 4 (Note 6) 8.0 V/mV 5, 6 AC Parameters The following conditions apply, unless otherwise specified. AC: Symbol tRLHC VCC = ± 15V, VCM = 0 Parameter Response Time (Collector Output) Conditions VOD(Overdrive) = -5mV, CL = 50pF, VI = -100mV 9 Max Unit Subgroups (Note 13) 300 nS 7, 8B (Note 13) 640 nS 8A Notes Min www.national.com LM111QML LM111QML LM111 LM111 SMD Electrical Characteristics (Continued) AC Parameters (Continued) The following conditions apply, unless otherwise specified. AC: VCC = ± 15V, VCM = 0 Symbol tRHLC Parameter Response Time (Collector Output) www.national.com Conditions VOD(Overdrive) = 5mV, CL = 50pF, VI = 100mV 10 Max Unit Subgroups (Note 13) 300 nS 7, 8B (Note 13) 500 nS 8A Notes Min LM111QML LM111QML LM111 LM111 RH Electrical Characteristics DC Parameters (Note 12) The following conditions apply, unless otherwise specified. DC: VCC = ± 15V, VCM = 0 Parameter Min Max Unit Subgroups -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50 -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50 -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 +VCC = +2.5V, -VCC = -2.5V, VI = 0V, RS = 50 Symbol -3.0 +3.0 mV 1 -4.0 +4.0 mV 2, 3 VI = 0V, RS = 50 -3.0 +3.0 mV 1 Conditions Notes VI = 0V, RS = 50 VIO VIO R Input Offset Voltage Raised Input Offset Voltage -4.5 Input Offset Current mV 2, 3 -3.0 +3.0 mV 1 -4.5 +4.5 mV 2, 3 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50 IIO +4.5 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50 -3.0 +3.0 mV 1 -4.5 +4.5 mV 2, 3 VI = 0V, RS = 50K -10 +10 nA 1, 2 -20 +10 nA 1, 2 -20 +20 nA 3 -10 +10 nA 1, 2 -20 +20 nA 3 VI = 0V, RS = 50K -25 +25 nA 1, 2 +50 nA 3 -100 0.1 nA 1, 2 0.1 nA 3 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K -150 0.1 nA 1, 2 -200 0.1 nA 3 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50K Input Bias Current -10 -150 ± IIB 3 -50 Raised Input Offset Current nA +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50K IIOR +20 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K -150 0.1 nA 1, 2 -200 0.1 nA 3 14 V 1, 2, 3 80 dB 1, 2, 3 VI = 0V, RS = 50K VOSt Collector Output Voltage (Strobe) +VI = Gnd, -VI = 15V, ISt = -3mA, RS = 50 CMRR Common Mode Rejection Ratio -28V -VCC -0.5V, RS = 50, 2V +VCC 29.5V, RS = 50, -14.5V VCM 13V, RS = 50 11 (Note 13) www.national.com LM111QML LM111QML LM111 LM111 RH Electrical Characteristics (Continued) DC Parameters (Note 12) (Continued) The following conditions apply, unless otherwise specified. DC: VCC = ± 15V, VCM = 0 ICEX IL Output Leakage Current Input Leakage Current Subgroups +VCC = 4.5V, -VCC = Gnd, IO = 8mA, ± VI = 0.5V, VID = -6mV 0.4 V 1, 2, 3 0.4 V 1, 2, 3 1.5 V 1, 2, 3 IO = 50mA, ± VI = -14V, VID = -5mV Low Level Output Voltage Unit IO = 50mA, ± VI = 13V, VID = -5mV VOL Parameter Max +VCC = 4.5V, -VCC = Gnd, IO = 8mA, ± VI = 3V, VID = -6mV Symbol 1.5 V 1, 2, 3 -1.0 10 nA 1 -1.0 500 nA 2 Conditions Notes +VCC = 18V, -VCC = -18V, VO = 32V Min (Note 11) -5.0 500 nA 1, 2, 3 +VCC = 18V, -VCC = -18V, +VI = -17V, -VI = +12V (Note 11) -5.0 500 nA 1, 2, 3 6.0 mA 1, 2 7.0 +ICC +VCC = 18V, -VCC = -18V, +VI = +12V, -VI = -17V mA 3 mA 1, 2 Power Supply Current -ICC Power Supply Current VIO / T Temperature Coefficient Input Offset Voltage IIO / T Temperature Coefficient Input Offset Current IOS Short Circuit Current -5.0 mA 3 25°C T 125°C -25 -6.0 25 µV/°C 2 -55°C T 25°C -25 25 µV/°C 3 25°C T 125°C -100 100 pA/°C 2 -200 -55°C T 25°C +VIO adj. Input Offset Voltage (Adjustment) Input Offset Voltage (Adjustment) Voltage Gain (Emitter) RL = 600 3 mA 1 (Note 10) 150 mA 2 250 mA 3 mV 1 mV 1 VO = 0V, VI = 0V, RS = 50 ± AVE pA/°C 200 VO = 0V, VI = 0V, RS = 50 -VIO adj. 200 (Note 10) (Note 10) VO = 5V, t 10mS, -VI = 0.1V, +VI = 0V 5.0 -5.0 (Note 6) 10 V/mV 4 (Note 6) 8.0 V/mV 5, 6 AC Parameters (Note 12) The following conditions apply, unless otherwise specified. AC: VCC = ± 15V, VCM = 0 Symbol tRLHC tRHLC Parameter Conditions Response Time (Collector Output) VOD(Overdrive) = -5mV, CL = 50pF, VI = -100mV Response Time (Collector Output) VOD(Overdrive) = 5mV, CL = 50pF, VI = 100mV www.national.com 12 Notes (Note 13) (Note 13) Min Max Unit Subgroups 300 nS 7, 8B 640 nS 8A 300 nS 7, 8B 500 nS 8A RH Electrical Characteristics LM111QML LM111QML LM111 LM111 (Continued) DC Drift Parameters (Note 12) The following conditions apply, unless otherwise specified. DC: VCC = ± 15V, VCM = 0 Delta calculations performed on QMLV devices at group B , subgroup 5. Subgroups -0.5 0.5 mV 1 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50 -0.5 0.5 mV 1 -0.5 0.5 mV 1 VI = 0V, RS = 50K -12.5 12.5 nA 1 -12.5 12.5 nA 1 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50K -12.5 12.5 nA 1 +VCC = 18V, -VCC = -18V, VO = 32V -5.0 5.0 nA 1 Min Max Unit Subgroups +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K -50 +50 nA 1 +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50K ICEX Unit +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K ± IIB Max +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50 VIO Min VI = 0V, RS = 50 Symbol -50 +50 nA 1 Parameter Input Offset Voltage Input Bias Current Output Leakage Current Conditions Electrical Characteristics Notes Post Radiation Limits The following conditions apply, unless otherwise specified Symbol IIO ± IIB Parameter Input Offset Current Notes Output Leakage Current VI = 0V, RS = 50K -150 0.1 nA 1 +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50K ICEX Input Bias Current Conditions -175 0.1 nA 1 +VCC = 18V, -VCC = -18V, VO = 32V -25 +25 nA 1 Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 3: This rating applies for ± 15V supplies. The positive input voltage limits is 30 V above the negative supply. The negative input voltage limits is equal to the negative supply voltage or 30V below the positive supply, whichever is less. Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), JA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/JA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 5: Human body model, 1.5 k in series with 100 pF. Note 6: Datalog reading in K=V/mV. Note 7: Pin names based on an 8 pin package configuration. When using higher pin count packages then: Pin 2 & 3 are Inputs, Pin 5 is Balance, Pin 6 is V56is the Voltage between the Balance and Balance / Strobe pins Balance / Strobe, Pin 7 is Output, and Pin 8 is V+. For example: Note 8: IST = -2mA at -55°C Note 9: Calculated parameter. Note 10: Actual min. limit used is 5mA due to test setup. 13 www.national.com LM111QML LM111QML Note 11: VID is voltage difference between inputs. Note 12: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in Mil-Std-883, Method 1019.5, Condition A. Note 13: Group A sample ONLY LM111 LM111 Typical Performance Characteristics Input Bias Current Input Bias Current 20128543 20128544 Input Bias Current Input Bias Current 20128546 20128545 Input Bias Current Input Bias Current 20128547 www.national.com 20128548 14 Input Bias Current Input Overdrives LM111QML LM111QML LM111 LM111 Typical Performance Characteristics (Continued) Input Bias Current Input Overdrives 20128550 20128549 Response Time for Various Input Overdrives Input Bias Current 20128551 20128552 Response Time for Various Input Overdrives Output Limiting Characteristics 20128554 20128553 15 www.national.com LM111QML LM111QML LM111 LM111 Typical Performance Characteristics Supply Current (Continued) Supply Current 20128555 20128556 Leakage Currents 20128557 2. Certain sources will produce a cleaner comparator output waveform if a 100 pF to 1000 pF capacitor C2 is connected directly across the input pins. 3. When the signal source is applied through a resistive network, RS, it is usually advantageous to choose an RS' of substantially the same value, both for DC and for dynamic (AC) considerations. Carbon, tin-oxide, and metal-film resistors have all been used successfully in comparator input circuitry. Inductive wire wound resistors are not suitable. 4. When comparator circuits use input resistors (e.g. summing resistors), their value and placement are particularly important. In all cases the body of the resistor should be close to the device or socket. In other words there should be very little lead length or printed-circuit foil run between comparator and resistor to radiate or pick up signals. The same applies to capacitors, pots, etc. For example, if RS=10 k, as little as 5 inches of lead between the resistors and the input pins can result in oscillations that are very hard to damp. Twisting these input leads tightly is the only (second best) alternative to placing resistors close to the comparator. Application Hints CIRCUIT TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS When a high-speed comparator such as the LM111 LM111 is used with fast input signals and low source impedances, the output response will normally be fast and stable, assuming that the power supplies have been bypassed (with 0.1 µF disc capacitors), and that the output signal is routed well away from the inputs (pins 2 and 3) and also away from pins 5 and 6. However, when the input signal is a voltage ramp or a slow sine wave, or if the signal source impedance is high (1 k to 100 k), the comparator may burst into oscillation near the crossing-point. This is due to the high gain and wide bandwidth of comparators like the LM111 LM111. To avoid oscillation or instability in such a usage, several precautions are recommended, as shown in Figure 1 below. 1. The trim pins (pins 5 and 6) act as unwanted auxiliary inputs. If these pins are not connected to a trim-pot, they should be shorted together. If they are connected to a trim-pot, a 0.01 µF capacitor C1 between pins 5 and 6 will minimize the susceptibility to AC coupling. A smaller capacitor is used if pin 5 is used for positive feedback as in Figure 1. www.national.com 16 5. 6. circuit of Figure 2, the feedback from the output to the positive input will cause about 3 mV of hysteresis. However, if RS is larger than 100, such as 50 k, it would not be reasonable to simply increase the value of the positive feedback resistor above 510 k. The circuit of Figure 3 could be used, but it is rather awkward. See the notes in paragraph 7 below. 7. When both inputs of the LM111 LM111 are connected to active signals, or if a high-impedance signal is driving the positive input of the LM111 LM111 so that positive feedback would be disruptive, the circuit of Figure 1 is ideal. The positive feedback is to pin 5 (one of the offset adjustment pins). It is sufficient to cause 1 to 2 mV hysteresis and sharp transitions with input triangle waves from a few Hz to hundreds of kHz. The positive-feedback signal across the 82 resistor swings 240 mV below the positive supply. This signal is centered around the nominal voltage at pin 5, so this feedback does not add to the VOS of the comparator. As much as 8 mV of VOS can be trimmed out, using the 5 k pot and 3 k resistor as shown. (Continued) Since feedback to almost any pin of a comparator can result in oscillation, the printed-circuit layout should be engineered thoughtfully. Preferably there should be a ground plane under the LM111 LM111 circuitry, for example, one side of a double-layer circuit card. Ground foil (or, positive supply or negative supply foil) should extend between the output and the inputs, to act as a guard. The foil connections for the inputs should be as small and compact as possible, and should be essentially surrounded by ground foil on all sides, to guard against capacitive coupling from any high-level signals (such as the output). If pins 5 and 6 are not used, they should be shorted together. If they are connected to a trim-pot, the trim-pot should be located, at most, a few inches away from the LM111 LM111, and the 0.01 µF capacitor should be installed. If this capacitor cannot be used, a shielding printed-circuit foil may be advisable between pins 6 and 7. The power supply bypass capacitors should be located within a couple inches of the LM111 LM111. (Some other comparators require the power-supply bypass to be located immediately adjacent to the comparator.) 8. It is a standard procedure to use hysteresis (positive feedback) around a comparator, to prevent oscillation, and to avoid excessive noise on the output because the comparator is a good amplifier for its own noise. In the These application notes apply specifically to the LM111 LM111 and LF111 LF111 family of comparators, and are applicable to all high-speed comparators in general, (with the exception that not all comparators have trim pins). 20128529 Pin connections shown are for LM111H LM111H in the H08 hermetic package FIGURE 1. Improved Positive Feedback 17 www.national.com LM111QML LM111QML Application Hints LM111QML LM111QML Application Hints (Continued) 20128530 Pin connections shown are for LM111H LM111H in the H08 hermetic package FIGURE 2. Conventional Positive Feedback 20128531 FIGURE 3. Positive Feedback with High Source Resistance www.national.com 18 LM111QML LM111QML Typical Applications (Note 16) Offset Balancing Strobing 20128536 20128537 Note: Do Not Ground Strobe Pin. Output is turned off when current is pulled from Strobe Pin. Increasing Input Stage Current (Note 14) Detector for Magnetic Transducer 20128538 Note 14: Increases typical common mode slew from 7.0V/µs to 18V/µs. 20128539 Digital Transmission Isolator Relay Driver with Strobe 20128540 20128541 *Absorbs inductive kickback of relay and protects IC from severe voltage transients on V+ line. Note: Do Not Ground Strobe Pin. 19 www.national.com LM111QML LM111QML Typical Applications (Note 16) (Continued) Strobing off Both Input and Output Stages (Note 15) 20128542 Note: Do Not Ground Strobe Pin. Note 15: Typical input current is 50 pA with inputs strobed off. Note 16: Pin connections shown on schematic diagram and typical applications are for H08 metal can package. Positive Peak Detector Zero Crossing Detector Driving MOS Logic 20128524 20128523 *Solid tantalum Typical Applications for H08 Package (Pin numbers refer to H08 package) Zero Crossing Detector Driving MOS Switch 100 kHz Free Running Multivibrator 20128513 20128514 *TTL or DTL fanout of two www.national.com 20 LM111QML LM111QML Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued) 10 Hz to 10 kHz Voltage Controlled Oscillator 20128515 *Adjust for symmetrical square wave time when VIN = 5 mV Minimum capacitance 20 pF Maximum frequency 50 kHz Driving Ground-Referred Load Using Clamp Diodes to Improve Response 20128517 20128516 *Input polarity is reversed when using pin 1 as output. TTL Interface with High Level Logic 20128518 *Values shown are for a 0 to 30V logic swing and a 15V threshold. May be added to control speed and reduce susceptibility to noise spikes. 21 www.national.com LM111QML LM111QML Typical Applications for H08 Package (Pin numbers refer to H08 package) Crystal Oscillator (Continued) Comparator and Solenoid Driver 20128520 20128519 Precision Squarer 20128521 *Solid tantalum Adjust to set clamp level www.national.com 22 LM111QML LM111QML Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued) Low Voltage Adjustable Reference Supply 20128522 *Solid tantalum Positive Peak Detector Zero Crossing Detector Driving MOS Logic 20128524 20128523 *Solid tantalum Negative Peak Detector 20128525 *Solid tantalum 23 www.national.com LM111QML LM111QML Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued) Precision Photodiode Comparator 20128526 *R2 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing leakages by an order of magnitude. Switching Power Amplifier 20128527 www.national.com 24 LM111QML LM111QML Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued) Switching Power Amplifier 20128528 25 www.national.com LM111QML LM111QML Revision History Released Revision Section Originator Changes 10/11/05 A New Release, Corporate format L. Lytle 3 MDS data sheets converted into one Corp. data sheet format. MNLM111-X MNLM111-X Rev 0A0, MDLM111-X MDLM111-X Rev. 0B0, and MRLM111-X-RH MRLM111-X-RH Rev 0E1. The drift table was eliminated from the 883 section since it did not apply; Note #3 was removed from RH & QML datasheets with SG verification that it no longer applied. Added NSID's for 50k Rad and Post Radiation Table. MDS data sheets will be archived. 12/14/05 B Ordering Information Table R. Malone Removed NSID reference LM111J-8PQMLV LM111J-8PQMLV, 5962P0052401VPA 5962P0052401VPA 30k rd(Si). Reason: NSID on LTB, Inventory exhausted. Added following NSID's: LM111HPQMLV LM111HPQMLV, LM111WPQMLV LM111WPQMLV and LM111WGPQMLV LM111WGPQMLV. Reason: Still have Inventory. LM111QML LM111QML, Revision A will be archived. www.national.com 26 LM111QML LM111QML Physical Dimensions inches (millimeters) unless otherwise noted Metal Can Package (H) NS Package Number H08C Cavity Dual-In-Line Package (J) NS Package Number J08A 27 www.national.com LM111QML LM111QML Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Dual-In-Line Package (J) NS Package Number J14A Leadless Chip Carrier (E) NS Package Number E20A www.national.com 28 LM111QML LM111QML Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NS Package Number W10A NS Package Number WG10A WG10A 29 www.national.com LM111QML LM111QML Voltage Comparator Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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