LH168M 434-PIN ZO1/XO128 YO128 ZO128 XO128/ZO1 FPD87310 XO128 XO1-ZO128 - Datasheet Archive

 

384-output TFT-LCD Source Driver IC LH168M DESCRIPTION PIN CONNECTIONS The LH168M is a 384-output TFT-LCD source driver IC which

 

LH168M LH168M 384-output TFT-LCD Source Driver IC LH168M LH168M DESCRIPTION PIN CONNECTIONS The LH168M LH168M is a 384-output TFT-LCD source driver IC which can simultaneously display 262 144 colors in 64 gray scales. TOP VIEW 434-PIN 434-PIN TCP XO1 1 YO1 2 ZO1 3 FEATURES CHIP SURFACE · Number of LCD drive outputs : 384 · Built-in 6-bit digital input DAC · Dot-inversion drive : Outputs the inverted gray scale voltages between LCD drive pins next to each other · RSDSTM*(R _educed S _wing Differential Signaling) _ _ input interface (Data and CK) : Possible to reduce Electro-Magnetic _nterference (EMI) _ _ I · Possible to display 262 144 colors in 64 gray scales with reference voltage input of 18 gray scales : This reference voltage input corresponds to < correction and intermediate reference voltage input can be abbreviated · Cascade connection · Sampling sequence : Output shift direction can be selected XO1, YO1, ZO1/XO128 ZO1/XO128, YO128 YO128, ZO128 ZO128 or ZO128 ZO128, YO128 YO128, XO128/ZO1 XO128/ZO1, YO1, XO1 · Shift clock frequency : 68 MHz (MAX.) · Supply voltages ­ VCC (for logic system) : +3.0 to +3.6 V ­ VLS (for LCD drive system) : +12 V (MAX.) · Package : 434-pin TCP (Tape Carrier Package) * RSDS is a trademark of National Semiconductor Corporation. SHARP recommends FPD87310 FPD87310 of National Semiconductor Corporation as a timing controller for RSDSTM. 434 433 432 431 430 429 428 427 426 425 424 423 422 421 420 419 418 417 416 415 414 413 412 411 410 409 408 407 406 405 404 403 402 401 400 399 398 397 396 395 394 393 392 391 390 389 388 387 386 385 SPOI X0P X0N X1P X1N X2P X2N POL REV LS CKP CKN GND GND VH0 VH8 VH16 VH24 VH32 VH40 VH48 VH56 VH64 GND VLS VL64 VL56 VL48 VL40 VL32 VL24 VL16 VL8 VL0 LBR VCC VCC Y0P Y0N Y1P Y1N Y2P Y2N Z0P Z0N Z1P Z1N Z2P Z2N SPIO XO128 XO128 382 YO128 YO128 383 ZO128 ZO128 384 NOTE : Doesn't prescribe TCP outline. In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. 1 LH168M LH168M PIN DESCRIPTION PIN NO. 1 to 384 SYMBOL XO1-ZO128 XO1-ZO128 I/O O LCD drive output pins DESCRIPTION 385 386 to 391 SPIO I/O Start pulse input/cascade output pin Z2N-Z0P I 392 to 397 Y2N-Y0P I Data input pins 398, 399 VCC ­ Power supply pins for digital circuit 400 401 to 409 LBR VL0-VL64 VL0-VL64 I Shift direction selection input pin I Reference voltage input pins Power supply pin for analog circuit Data input pins 410 VLS ­ 411, 421, 422 412 to 420 GND VH64-VH0 VH64-VH0 ­ Ground pins I Reference voltage input pins 423, 424 425 CKN, CKP LS I I Shift clock input pins Latch input pin 426 REV I LCD drive output polarity exchange input pin 427 428 to 433 POL I Input data polarity exchange input pin X2N-X0P I Data input pins 434 SPOI I/O Start pulse input/cascade output pin 2 LH168M LH168M BLOCK DIAGRAM VCC VCC GND GND GND 399 398 421 411 422 LBR 400 SPOI 434 SHIFT REGISTER POL 427 CKP 424 385 SPIO CKN 423 X2N 428 Y0P 397 Y2N 392 1 2 COMPARATOR X0P 433 128 6 DATA LATCH 6 SAMPLING MEMORY Z0P 391 6 Z2N 386 6 6 6 6 6 6 6 LS 425 HOLD MEMORY 6 410 VLS LEVEL SHIFTER 6 VH0 420 VH64 412 VL64 409 18 REFERENCE VOLTAGE GENERATION CIRCUIT 64 x 2 DA CONVERTER VL0 401 REV 426 OUTPUT CIRCUIT 1 2 3 XO1 YO1 ZO1 3 382 383 384 XO128 XO128 YO128 YO128 ZO128 ZO128 LH168M LH168M FUNCTIONAL OPERATIONS OF EACH BLOCK BLOCK Shift Register FUNCTION Used as a bi-directional shift register which performs the shifting operation by CK and Data Latch selects bits for data sampling. Used to temporary latch the input data which is sent to the sampling memory. Comparator Sampling Memory Convert low voltage input signal into internal [CMOS level] voltage input signal. Used to sample the data to be entered by time sharing. Hold Memory Used for latch processing of data in the sampling memory by LS input. Used to shift the data in the hold memory to the power supply level of the analog circuit Level Shifter unit and sends the shifted data to DA converter. Reference Voltage Generation Circuit Used to generate a gamma-connected 64 x 2-level voltage by the resistor dividing circuit. DA Converter Used to generate an analog signal according to the display data and sends the signal to the output circuit. Output Circuit Used as a voltage follower, configured with an operational amplifier and an output buffer, which outputs analog signals of 64 x 2 gray scales to LCD drive output pin. INPUT/OUTPUT CIRCUITS VCC I To Internal Circuit ¿Applicable pins¡ LBR, LS, REV GND Fig. 1 Input Circuit (1) VCC I To Internal Circuit GND ¿Applicable pin¡ POL GND Fig. 2 Input Circuit (2) 4 LH168M LH168M VCC *P I GND Differential Input VCC Comparator + *N ­ I To Internal Circuit * : CK, X0-X2, Y0-Y2, Z0-Z2 GND ¿Applicable pin¡ CKP, CKN, X0P-X2P, X0N-X2N, Y0P-Y2P, Y0N-Y2N, Z0P-Z2P, Z0N-Z2N Fig. 3 Input Circuit (3) Pch Tr I VCC Output Signal O Output Control Signal Nch Tr GND VCC To Internal Circuit ¿Applicable pins¡ SPIO, SPOI GND Fig. 4 Input/Output Circuit 5 LH168M LH168M VLS Operational Amplifier O + From Internal Circuit ¿Applicable pins¡ XO1-XO128 XO1-XO128, YO1-YO128 YO1-YO128, ZO1-ZO128 ZO1-ZO128 ­ GND Fig. 5 Output Circuit FUNCTIONAL DESCRIPTION Pin Functions SYMBOL VCC VLS FUNCTIONS Used as power supply pin for digital circuit, connected to +3.0 to +3.6 V. Used as power supply pin for analog circuit, connected to +8.0 to +12.0 V. GND Used as ground pin, connected to 0 V. SPIO Used as input pins of start pulse and also used as output pins for cascade connection. When "H" is input into start pulse input pin, data sampling is started. On completion of SPOI LBR LS CKP CKN VH0-VH64 VH0-VH64 VL0-VL64 VL0-VL64 sampling, "H" pulse is output to output pin for cascade connection. Pin functions are selected by LBR. For selecting, refer to "Functional Operations". Used as input pin for selecting the shift register direction. For selecting, refer to "Functional Operations". Used as input pin for parallel transfer from sampling memory to hold memory. Data is transferred at the rising edge and output from LCD drive output pin. Used as shift clock input pin. Data is latched into sampling memory from data input pin at the falling edge and the rising edge. (Use RSDS input voltage : 0 V to VCC ­ 1.0 V) Used as reference voltage input pins. Hold the reference voltage fixed during the period of LCD drive output. For relation between input data and output voltage values, refer to "Output Voltage Value". For internal gamma correction, refer to "Gamma Correction Value". Observe the following relation for input voltage. VLS > VH0 VH8 VH64 VL64 VL56 VL0 > GND. X0P-X2N Y0P-Y2N Z0P-Z2N Used as data input pins of R, G, and B colors. 3-bit data are input from data pins at the falling edge and the rising edge of CKP (CKN). For relation between input data and output voltage values, refer to "Functional Operations" and "Output Voltage Value". Select the data to be entered into X, Y, and Z according to picture element arrays of the panel. XO1-XO128 XO1-XO128, Used as LCD drive output pins which output the voltage c/orresponding to the input of data input pins (X0P to X2N, Y0P to Y2N, Z0P to Z2N). Data of XO1 to XO128 XO128 correspond to X0P YO1-YO128 YO1-YO128, to X2N. Data of YO1 to YO128 YO128 correspond to Y0P to Y2N, and data of ZO1 to ZO128 ZO128 ZO1-ZO128 ZO1-ZO128 correspond to Z0P to Z2N. For relation between input data and output voltage values, refer to "Functional Operations" and "Output Voltage Value". 6 LH168M LH168M SYMBOL POL REV FUNCTIONS Used as input pin for input data polarity exchange. When "L" is entered, display data becomes normal mode. When "H" is entered, input data becomes polarity exchange mode. For relation between input data and output voltage value, refer to "Output Voltage Value". These pins are pulled down at the inside. Used as polarity exchange pin of LCD drive output. Data is taken at the term when LS is "H" and the output polarity of LCD drive output pin is determined. For exchanging, refer to "Output Characteristics". Functional Operations The following describes the relation between data input pin and output direction. Data input pin X0P-X2N Y0P-Y2N Z0P-Z2N Output XO1 YO1 ZO1 direction X0P-X2N Y0P-Y2N Z0P-Z2N XO128 XO128 YO128 YO128 ZO128 ZO128 The following describes the relation between LBR pin, SPOI pin, SPIO pin and output direction PIN OUTPUT DIRECTION RIGHT SHIFT (XO1, YO1, ZO1/XO128 ZO1/XO128, YO128 YO128, ZO128 ZO128) H LEFT SHIFT (ZO128 ZO128, YO128 YO128, XO128/ZO1 XO128/ZO1, YO1, XO1) L SPOI Input Output SPIO Output Input LBR NOTE : Color data corresponding to X, Y, and Z vary depending on the output direction. 7 LH168M LH168M Output Characteristics The following describes the relation between REV pin and output polarity of LCD drive pin. REV XO1 YO1 "H" + ­ + ZO1 + ­ ­ + YO2 + ­ ZO2 ­ + + ­ ZO3 ­ + + ­ XO4 ­ + YO4 ZO4 + ­ ­ + : XO125 XO125 : : + ­ YO125 YO125 ­ + ZO125 ZO125 + ­ ­ + ZO126 ZO126 + ­ ­ + XO127 XO127 + ­ YO127 YO127 ­ + + ­ YO128 YO128 ­ + + ­ ZO128 ZO128 ­ + XO2 XO3 YO3 XO126 XO126 YO126 YO126 ZO127 ZO127 XO128 XO128 "L" ­ NOTES : + : The gray scale voltages corresponding to reference voltage VH0 to VH64 are outputs. ­ : The gray scale voltages corresponding to reference voltage VL0 to VL64 are outputs. 8 LH168M LH168M Timing Diagram 1 2 3 1 CKP 2 3 SPIO (SPOI) X0P-X0N X0 X1 X0 X1 X0 X1 X0 X1 X1P-X1N X2 X3 X2 X3 X2 X3 X2 X3 X2P-X2N X4 X5 X4 X5 X4 X5 X4 X5 Y0P-Y0N Y0 Y1 Y0 Y1 Y0 Y1 Y0 Y1 Y1P-Y1N Y2 Y3 Y2 Y3 Y2 Y3 Y2 Y3 Y2P-Y2N Y4 Y5 Y4 Y5 Y4 Y5 Y4 Y5 Z0P-Z0N Z0 Z1 Z0 Z1 Z0 Z1 Z0 Z1 Z1P-Z1N Z2 Z3 Z2 Z3 Z2 Z3 Z2 Z3 Z2P-Z2N Z4 Z5 Z4 Z5 Z4 Z5 Z4 Z5 9 LH168M LH168M Output Voltage Value and D0). The Vi is a reference voltage (VHi or VLi) that is determined by the polarity exchange input (REV). Relation between input data and output voltage values is shown below. (i = 0, 8, 16, 24, 32, 40, 48, 56, 64) Two voltages are selected from all of the reference voltages (V0-V64 V0-V64) by the upper 3-bit data (D5, D4 and D3) of the 6-bit input data (D5, D4, D3, D2, D1 and D0) taken by time sharing, and intermediate value is determined by the lower 3-bit data (D2, D1 (1) Output voltage when reference voltage is VH0 to VH64. INPUT DATA 0 OUTPUT VOLTAGE POL = "L" VH0 INPUT POL = "H" DATA VH64 + (VH56 ­ VH64) x 1/8 20 OUTPUT VOLTAGE POL = "L" VH32 POL = "H" VH32 + (VH24 ­ VH32) x 1/8 1 2 VH8 + (VH0 ­ VH8) x 7/8 VH64 + (VH56 ­ VH64) x 2/8 VH8 + (VH0 ­ VH8) x 6/8 VH64 + (VH56 ­ VH64) x 3/8 21 22 VH40 + (VH32 ­ VH40) x 7/8 VH32 + (VH24 ­ VH32) x 2/8 VH40 + (VH32 ­ VH40) x 6/8 VH32 + (VH24 ­ VH32) x 3/8 3 4 VH8 + (VH0 ­ VH8) x 5/8 VH64 + (VH56 ­ VH64) x 4/8 VH8 + (VH0 ­ VH8) x 4/8 VH64 + (VH56 ­ VH64) x 5/8 23 24 VH40 + (VH32 ­ VH40) x 5/8 VH32 + (VH24 ­ VH32) x 4/8 VH40 + (VH32 ­ VH40) x 4/8 VH32 + (VH24 ­ VH32) x 5/8 5 6 VH8 + (VH0 ­ VH8) x 3/8 VH64 + (VH56 ­ VH64) x 6/8 VH8 + (VH0 ­ VH8) x 2/8 VH64 + (VH56 ­ VH64) x 7/8 25 26 VH40 + (VH32 ­ VH40) x 3/8 VH32 + (VH24 ­ VH32) x 6/8 VH40 + (VH32 ­ VH40) x 2/8 VH32 + (VH24 ­ VH32) x 7/8 7 VH8 + (VH0 ­ VH8) x 1/8 VH56 27 VH40 + (VH32 ­ VH40) x 1/8 VH24 8 VH8 VH56 + (VH48 ­ VH56) x 1/8 28 VH40 VH24 + (VH16 ­ VH24) x 1/8 9 VH16 + (VH8 ­ VH16) x 7/8 VH56 + (VH48 ­ VH56) x 2/8 29 VH48 + (VH40 ­ VH48) x 7/8 VH24 + (VH16 ­ VH24) x 2/8 A VH16 + (VH8 ­ VH16) x 6/8 VH56 + (VH48 ­ VH56) x 3/8 2A VH48 + (VH40 ­ VH48) x 6/8 VH24 + (VH16 ­ VH24) x 3/8 B VH16 + (VH8 ­ VH16) x 5/8 VH56 + (VH48 ­ VH56) x 4/8 2B VH48 + (VH40 ­ VH48) x 5/8 VH24 + (VH16 ­ VH24) x 4/8 C VH16 + (VH8 ­ VH16) x 4/8 VH56 + (VH48 ­ VH56) x 5/8 2C VH48 + (VH40 ­ VH48) x 4/8 VH24 + (VH16 ­ VH24) x 5/8 D E VH16 + (VH8 ­ VH16) x 3/8 VH56 + (VH48 ­ VH56) x 6/8 VH16 + (VH8 ­ VH16) x 2/8 VH56 + (VH48 ­ VH56) x 7/8 2D 2E VH48 + (VH40 ­ VH48) x 3/8 VH24 + (VH16 ­ VH24) x 6/8 VH48 + (VH40 ­ VH48) x 2/8 VH24 + (VH16 ­ VH24) x 7/8 F 10 VH16 + (VH8 ­ VH16) x 1/8 VH48 VH16 VH48 + (VH40 ­ VH48) x 1/8 2F 30 VH48 + (VH40 ­ VH48) x 1/8 VH16 VH48 VH16 + (VH8 ­ VH16) x 1/8 11 VH24 + (VH16 ­ VH24) x 7/8 VH48 + (VH40 ­ VH48) x 2/8 31 VH56 + (VH48 ­ VH56) x 7/8 VH16 + (VH8 ­ VH16) x 2/8 12 13 VH24 + (VH16 ­ VH24) x 6/8 VH48 + (VH40 ­ VH48) x 3/8 VH24 + (VH16 ­ VH24) x 5/8 VH48 + (VH40 ­ VH48) x 4/8 32 33 VH56 + (VH48 ­ VH56) x 6/8 VH16 + (VH8 ­ VH16) x 3/8 VH56 + (VH48 ­ VH56) x 5/8 VH16 + (VH8 ­ VH16) x 4/8 14 15 VH24 + (VH16 ­ VH24) x 4/8 VH48 + (VH40 ­ VH48) x 5/8 VH24 + (VH16 ­ VH24) x 3/8 VH48 + (VH40 ­ VH48) x 6/8 34 35 VH56 + (VH48 ­ VH56) x 4/8 VH16 + (VH8 ­ VH16) x 5/8 VH56 + (VH48 ­ VH56) x 3/8 VH16 + (VH8 ­ VH16) x 6/8 16 VH24 + (VH16 ­ VH24) x 2/8 VH48 + (VH40 ­ VH48) x 7/8 36 VH56 + (VH48 ­ VH56) x 2/8 VH16 + (VH8 ­ VH16) x 7/8 17 VH24 + (VH16 ­ VH24) x 1/8 VH40 37 VH56 + (VH48 ­ VH56) x 1/8 VH8 18 VH24 VH40 + (VH32 ­ VH40) x 1/8 38 VH56 VH8 + (VH0 ­ VH8) x 1/8 1A VH32 + (VH24 ­ VH32) x 7/8 VH40 + (VH32 ­ VH40) x 2/8 VH32 + (VH24 ­ VH32) x 6/8 VH40 + (VH32 ­ VH40) x 3/8 3A VH64 + (VH56 ­ VH64) x 7/8 VH8 + (VH0 ­ VH8) x 2/8 VH64 + (VH56 ­ VH64) x 6/8 VH8 + (VH0 ­ VH8) x 3/8 1B 1C VH32 + (VH24 ­ VH32) x 5/8 VH40 + (VH32 ­ VH40) x 4/8 VH32 + (VH24 ­ VH32) x 4/8 VH40 + (VH32 ­ VH40) x 5/8 3B 3C VH64 + (VH56 ­ VH64) x 5/8 VH8 + (VH0 ­ VH8) x 4/8 VH64 + (VH56 ­ VH64) x 4/8 VH8 + (VH0 ­ VH8) x 5/8 1D VH32 + (VH24 ­ VH32) x 3/8 VH40 + (VH32 ­ VH40) x 6/8 3D VH64 + (VH56 ­ VH64) x 3/8 VH8 + (VH0 ­ VH8) x 6/8 1E 1F VH32 + (VH24 ­ VH32) x 2/8 VH40 + (VH32 ­ VH40) x 7/8 VH32 + (VH24 ­ VH32) x 1/8 VH32 3E 3F VH64 + (VH56 ­ VH64) x 2/8 VH8 + (VH0 ­ VH8) x 7/8 VH64 + (VH56 ­ VH64) x 1/8 VH0 19 10 39 LH168M LH168M (2) Output voltage when reference voltage is VL0 to VL64. INPUT DATA 0 1 OUTPUT VOLTAGE INPUT OUTPUT VOLTAGE POL = "L" POL = "H" DATA POL = "L" POL = "H" VL0 VL64 + (VL56 ­ VL64) x 1/8 20 VL32 VL32 + (VL24 ­ VL32) x 1/8 VL8 + (VL0 ­ VL8) x 7/8 VL64 + (VL56 ­ VL64) x 2/8 21 VL40 + (VL32 ­ VL40) x 7/8 VL32 + (VL24 ­ VL32) x 2/8 2 VL8 + (VL0 ­ VL8) x 6/8 VL64 + (VL56 ­ VL64) x 3/8 22 VL40 + (VL32 ­ VL40) x 6/8 VL32 + (VL24 ­ VL32) x 3/8 3 4 VL8 + (VL0 ­ VL8) x 5/8 VL64 + (VL56 ­ VL64) x 4/8 VL8 + (VL0 ­ VL8) x 4/8 VL64 + (VL56 ­ VL64) x 5/8 23 24 VL40 + (VL32 ­ VL40) x 5/8 VL32 + (VL24 ­ VL32) x 4/8 VL40 + (VL32 ­ VL40) x 4/8 VL32 + (VL24 ­ VL32) x 5/8 5 6 VL8 + (VL0 ­ VL8) x 3/8 VL64 + (VL56 ­ VL64) x 6/8 VL8 + (VL0 ­ VL8) x 2/8 VL64 + (VL56 ­ VL64) x 7/8 25 26 VL40 + (VL32 ­ VL40) x 3/8 VL32 + (VL24 ­ VL32) x 6/8 VL40 + (VL32 ­ VL40) x 2/8 VL32 + (VL24 ­ VL32) x 7/8 7 VL8 + (VL0 ­ VL8) x 1/8 27 VL40 + (VL32 ­ VL40) x 1/8 8 9 VL8 VL56 + (VL48 ­ VL56) x 1/8 VL16 + (VL8 ­ VL16) x 7/8 VL56 + (VL48 ­ VL56) x 2/8 28 29 VL40 VL24 + (VL16 ­ VL24) x 1/8 VL48 + (VL40 ­ VL48) x 7/8 VL24 + (VL16 ­ VL24) x 2/8 A B VL16 + (VL8 ­ VL16) x 6/8 VL56 + (VL48 ­ VL56) x 3/8 VL16 + (VL8 ­ VL16) x 5/8 VL56 + (VL48 ­ VL56) x 4/8 2A 2B VL48 + (VL40 ­ VL48) x 6/8 VL24 + (VL16 ­ VL24) x 3/8 VL48 + (VL40 ­ VL48) x 5/8 VL24 + (VL16 ­ VL24) x 4/8 C VL16 + (VL8 ­ VL16) x 4/8 VL56 + (VL48 ­ VL56) x 5/8 2C VL48 + (VL40 ­ VL48) x 4/8 VL24 + (VL16 ­ VL24) x 5/8 D VL16 + (VL8 ­ VL16) x 3/8 VL56 + (VL48 ­ VL56) x 6/8 2D VL48 + (VL40 ­ VL48) x 3/8 VL24 + (VL16 ­ VL24) x 6/8 E VL16 + (VL8 ­ VL16) x 2/8 VL56 + (VL48 ­ VL56) x 7/8 2E VL48 + (VL40 ­ VL48) x 2/8 VL24 + (VL16 ­ VL24) x 7/8 F VL16 + (VL8 ­ VL16) x 1/8 VL48 2F VL48 + (VL40 ­ VL48) x 1/8 VL16 10 VL16 VL48 + (VL40 ­ VL48) x 1/8 30 VL48 VL16 + (VL8 ­ VL16) x 1/8 11 VL24 + (VL16 ­ VL24) x 7/8 VL48 + (VL40 ­ VL48) x 2/8 31 VL56 + (VL48 ­ VL56) x 7/8 VL16 + (VL8 ­ VL16) x 2/8 12 13 VL24 + (VL16 ­ VL24) x 6/8 VL48 + (VL40 ­ VL48) x 3/8 VL24 + (VL16 ­ VL24) x 5/8 VL48 + (VL40 ­ VL48) x 4/8 32 33 VL56 + (VL48 ­ VL56) x 6/8 VL16 + (VL8 ­ VL16) x 3/8 VL56 + (VL48 ­ VL56) x 5/8 VL16 + (VL8 ­ VL16) x 4/8 14 15 VL24 + (VL16 ­ VL24) x 4/8 VL48 + (VL40 ­ VL48) x 5/8 VL24 + (VL16 ­ VL24) x 3/8 VL48 + (VL40 ­ VL48) x 6/8 34 35 VL56 + (VL48 ­ VL56) x 4/8 VL16 + (VL8 ­ VL16) x 5/8 VL56 + (VL48 ­ VL56) x 3/8 VL16 + (VL8 ­ VL16) x 6/8 16 17 VL24 + (VL16 ­ VL24) x 2/8 VL48 + (VL40 ­ VL48) x 7/8 VL24 + (VL16 ­ VL24) x 1/8 VL40 36 37 VL56 + (VL48 ­ VL56) x 2/8 VL16 + (VL8 ­ VL16) x 7/8 VL56 + (VL48 ­ VL56) x 1/8 VL8 18 VL24 VL56 VL40 + (VL32 ­ VL40) x 1/8 38 19 1A VL32 + (VL24 ­ VL32) x 7/8 VL40 + (VL32 ­ VL40) x 2/8 VL32 + (VL24 ­ VL32) x 6/8 VL40 + (VL32 ­ VL40) x 3/8 39 3A VL64 + (VL56 ­ VL64) x 7/8 VL8 + (VL0 ­ VL8) x 2/8 VL64 + (VL56 ­ VL64) x 6/8 VL8 + (VL0 ­ VL8) x 3/8 1B 1C VL32 + (VL24 ­ VL32) x 5/8 VL40 + (VL32 ­ VL40) x 4/8 VL32 + (VL24 ­ VL32) x 4/8 VL40 + (VL32 ­ VL40) x 5/8 3B 3C VL64 + (VL56 ­ VL64) x 5/8 VL8 + (VL0 ­ VL8) x 4/8 VL64 + (VL56 ­ VL64) x 4/8 VL8 + (VL0 ­ VL8) x 5/8 1D VL32 + (VL24 ­ VL32) x 3/8 VL40 + (VL32 ­ VL40) x 6/8 3D VL64 + (VL56 ­ VL64) x 3/8 VL8 + (VL0 ­ VL8) x 6/8 1E VL32 + (VL24 ­ VL32) x 2/8 VL40 + (VL32 ­ VL40) x 7/8 3E VL64 + (VL56 ­ VL64) x 2/8 VL8 + (VL0 ­ VL8) x 7/8 1F VL32 + (VL24 ­ VL32) x 1/8 3F VL64 + (VL56 ­ VL64) x 1/8 VL32 11 VL56 VL24 VL8 + (VL0 ­ VL8) x 1/8 VL0 LH168M LH168M < (Gamma) Correction Value Between reference voltage input pins VH0 and VH64, 64 resistors are connected in series. And between reference voltage input pins VL0 and VL64, 64 resistors are connected in series. No resistor is connected between reference voltage input pins VH64 and VL64. The < correction curve is a broken line connected between intermediate voltage inputs (VH8, VH16, VH24, VH32, VH40, VH48, VH56, VL8, VL16, VL24, VL32, VL40, VL48 and VL56). Each < correction value between the intermediate voltage inputs is divided into 8 parts by the same resistor. LH168M LH168M VH0 VH8 VH16 VH24 VH32 External Reference Voltage VH40 VH48 VH56 VH64 R0 8 equal parts R1 8 equal parts R2 8 equal parts R3 8 equal parts R4 8 equal parts R5 8 equal parts R6 8 equal parts R7 8 equal parts R8 8 equal parts R9 8 equal parts R10 8 equal parts R11 8 equal parts R12 8 equal parts R13 8 equal parts R14 8 equal parts R15 8 equal parts VL64 VL56 VL48 VL40 VL32 VL24 VL16 VL8 VL0 The following shows the ratio of < correction resistance, when R0 equals 1. R0 1.00 R8 1.00 R1 0.50 0.50 R9 0.50 0.50 R2 R3 R10 R11 R4 0.50 0.50 R12 0.50 0.50 R5 0.50 R13 0.50 R6 0.50 1.00 R14 0.50 1.00 R7 R15 12 LH168M LH168M PRECAUTIONS Reference voltage input The relation of the reference voltage input is shown here. Precautions when connecting or disconnecting the power supply This IC has some power supply pins, so it may be permanently damaged by a high current which may flow if voltage is supplied to the LCD drive power supply while the logic system power supply is floating. Therefore, when connecting the power supply, observe the following sequence. VLS > VH0 VH8 VH56 VH64 0.5VLS VL64 VL56 VL8 VL0 > GND Maximum ratings When connecting or disconnecting the power supply, this IC must be used within the range of the absolute maximum ratings. VCC / logic input / VLS, VH0-VH64 VH0-VH64, VL0-VL64 VL0-VL64 When disconnecting the power supply, follow the reverse sequence. Target output load This IC is designed for a 150 pF output load capacity. When using this IC for other than 150 pF panels, confirm the device is having no problem before using it. ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage Input voltage Output voltage Storage temperature SYMBOL VCC VLS VI VI VO VO TSTG APPLICABLE PINS VCC VLS VH0-VL0 SPIO, SPOI, CKP, CKN, LS, REV, LBR, POL, X0P-X2N, Y0P-Y2N, Z0P-Z2N SPIO, SPOI XO1-ZO128 XO1-ZO128 RATING ­0.3 to +6.0 ­0.3 to +13.0 ­0.3 to VLS + 0.3 UNIT V V V ­0.3 to VCC + 0.3 V ­0.3 to VCC + 0.3 ­0.3 to VLS + 0.3 ­45 to +125 V V °C NOTES : 1. TA = +25 °C 2. The maximum applicable voltage on any pin with respect to GND (0 V). RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. VCC +3.0 Supply voltage +8.0 VLS VH0-VH64 VH0-VH64 0.5VLS Reference voltage input VL0-VL64 VL0-VL64 +0.1 Clock frequency fCK LCD drive output load capacity CL TOPR ­20 Operating temperature TYP. MAX. UNIT +3.6 V +12.0 V VLS ­ 0.1 V 0.5VLS V 68 MHz 150 pF +75 °C NOTE : 1. The applicable voltage on any pin with respect to GND (0 V). 13 NOTE 1 NOTE 1, 2 LH168M LH168M ELECTRICAL CHARACTERISTICS DC Characteristics PARAMETER Input "Low" voltage Input "High" voltage RSDS Input "Low" voltage RSDS Input "High" voltage RSDS reference voltage (VCC = +3.0 to +3.6 V, VLS = +8.0 to +12.0 V, TOPR = ­20 to +75 °C) SYMBOL CONDITIONS VIL VIH APPLICABLE PINS SPIO, SPOI, LS, LBR, REV, POL MIN. GND V GND + 0.1 IILL1 mV 1 Z0P-Z2N, CKP, CKN IOL = 0.3 mA IOH = ­0.3 mA VCC ­ 1.2 V GND + 0.4 VCC V V 10 µA 10 µA 400 µA 14 mA 2 mA 5 mA 4 mA GND + 0.2 SPIO, SPOI NOTE mV 200 X0P-X2N, Y0P-Y2N, VCOMRSDS Input "Low" current UNIT V ­200 VIHRSDS VOL VOH MAX. 0.3VCC VCC 0.7VCC VILRSDS Output "Low" voltage Output "High" voltage TYP. 1.2 VLS ­ 0.2 V ­20 +20 mV GND VCC ­ 0.4 2 X0P-X2N, Y0P-Y2N, Z0P-Z2N, Input "High" current SPIO, SPOI, CKP, CKN, LS LBR, REV, POL X0P-X2N, Y0P-Y2N, Z0P-Z2N, SPIO, SPOI, IILH1 CKP, CKN, LS, LBR IILH2 POL fCK = 65 MHz Supply current (In operation mode) ICC1 fLS = 50 kHz fREV = 50 kHz (Data sampling state) Supply current (In standby mode) Supply current (In operation mode) ICC2 ILS1 fCK = 65 MHz fLS = 50 kHz SPI = REV = GND is fixed. (Standby state) fCK = 65 MHz fLS = 50 kHz fREV = 50 kHz (Data sampling state) fCK = 65 MHz Supply current (In standby mode) ILS2 VCC-GND VLS-GND fLS = 50 kHz SPI = REV = GND is fixed. (Standby state) Output voltage range Deviations between output voltage pins VOUT VOD Output current IO1-IO4 Resistance between RGMAH reference voltage input pins RGMAL XO1-ZO128 XO1-ZO128 100 200 VH0-VH64 VH0-VH64 10 20 30 k$ VL0-VL64 VL0-VL64 10 20 30 k$ 14 µA 3 4 LH168M LH168M NOTES : 1. VCOMRSDS = (V*P+V*N)/2 = 1.2 V *P = X0P-X2P, Y0P-Y2P, Z0P-Z2P *N = X0N-X2N, Y0N-Y2N, Z0N-Z2N 2. VDIFFRSDS = V*P ­ V*N = 0.2 V 3. Criterion of evaluating voltage deviations. (a) Between output voltage pins Measuring values : Output voltage value at the time after 10 µs at the rising edge of LS. (Average of several times) (Conditions) Output load capacity is 150 pF. In a state when the reference voltage is fixed. Expecting values : Calculated following these specifications. (Conditions) In a state when the reference voltage is fixed. (b) Between LCD drivers. Measuring values : Applicable to (a). (Conditions) Applicable to (a). Expecting values : Applicable to (a). (Conditions) Applicable to (a). Each input voltage between the LCD drivers must be made perfectly equal by connecting corresponding reference voltage input pins. 4. Io1 : Applied voltage = 8.0 V for output pins XO1 to ZO128 ZO128. Output voltage = 7.5 V for output pins XO1 to ZO128 ZO128. VLS = 10.0 V Io2 : Applied voltage = 7.0 V for output pins XO1 to ZO128 ZO128. Output voltage = 7.5 V for output pins XO1 to ZO128 ZO128. VLS = 10.0 V Io3 : Applied voltage = 3.0 V for output pins XO1 to ZO128 ZO128. Output voltage = 2.5 V for output pins XO1 to ZO128 ZO128. VLS = 10.0 V Io4 : Applied voltage = 2.0 V for output pins XO1 to ZO128 ZO128. Output voltage = 2.5 V for output pins XO1 to ZO128 ZO128. VLS = 10.0 V 15 LH168M LH168M AC Characteristics PARAMETER Clock frequency "H" level pulse width "L" level pulse width (VCC = +3.0 to +3.6 V, VLS = +8.0 to +12.0 V, TOPR = ­20 to +75 °C) SYMBOL CONDITIONS fCK MIN. CKP tCWH tCWL APPLICABLE PINS TYP. MAX. 68 6 6 UNIT MHz ns ns Input rise time tCR 5 ns Input fall time tCF 5 ns Data setup time tSUD Data hold time tHD X0P-X2N, Y0P-Y2N, Z0P-Z2N 3 0 ns ns ns Start pulse setup time tSUSP 1 Start pulse hold time tHSP 2 Start pulse width Start pulse output SPIO, SPOI tWSP ns 1 -fCK ns tDSP CL = 15 pF 13 ns LCD drive output delay time 1 tDO1 CL = 150 pF 3 µs LCD drive output delay time 2 tDO2 CL = 150 pF 10 µs delay time LS signal-SPI signal setup time LS signal-CK signal hold time LS signal "H" level width XO1-ZO128 XO1-ZO128 1 -fCK tWLS REV signal-LS signal setup time tSURV REV signal-LS signal hold time tHRV ns ns ns 10 LS 7 14 tHLS ns 1 -fCK tLSSP ns REV 16 LH168M LH168M Timing Chart tCF tCR CKP (RSDS) 1 tSUSP tHSP tCWH 2 tCWL 1 fCK SPIO Input (SPOI) tSUD tWSP tHD tSUD tHD *P ­ *N (RSDS) *P = X0P-X2P, Y0P-Y2P, Z0P-Z2P *N = X0N-X2N, Y0N-Y2N, Z0N-Z2N CKP (RSDS) LAST ­ 2 LAST ­ 1 tDSP SPIO Output (SPOI) tHLS tWLS LS tLSSP SPIO Input (SPOI) tSURV tHRV REV tDO1 XO1-ZO128 XO1-ZO128 tDO2 17 Target voltage ±(VLS x 0.1) Target voltage (6-bit accuracy)