NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| LFE2M20E-5FN256C | Lattice Semiconductor | FPGA, 19K LUTS, 140 I/O,DSP,256FPBGA; Logic IC family:ECP2M; Logic IC function:FPGA; Voltage, supply:1.2V; Case style:FPBGA; Base number:2; I/O lines, No. of:140; Logic function number:LFE2M20E; Pins, No. of:256; Temp, op. RoHS Compliant: Yes |
732 pages, |
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| LFE2M20E-6FN256C | Lattice Semiconductor | FPGA, 19K LUTS, 140 I/O,DSP,256FPBGA; Logic IC family:ECP2M; Logic IC function:FPGA; Voltage, supply:1.2V; Case style:FPBGA; Base number:2; I/O lines, No. of:140; Logic function number:LFE2M20E; Pins, No. of:256; Temp, op. RoHS Compliant: Yes |
732 pages, |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Package Pins Temp. LUTs (K) LFE2M20E-5FN484C 304 1.2V -5 Lead-Free fpBGA 484 COM 20 LFE2M20E-6FN484C 304 1.2V -6 Lead-Free fpBGA 484 COM 20 LFE2M20E-7FN484C 304 1.2V -7 Lead-Free fpBGA 484 COM 20 LFE2M20E-5FN256C 140 1.2V -5 Lead-Free fpBGA 256 COM 20 LFE2M20E-6FN256C 140 1.2V -6 Lead-Free fpBGA 256 COM 20 LFE2M20E-7FN256C 140 1.2V -7 Lead-Free fpBGA 256 COM 20 I ... | Original |
17 pages, |
LFE2M35E-6FN484C LFE2M35E-5FN256C LFE2M20E-5FN256C LFE2M35E-5FN672C DS1006 DS1006 abstract |
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| Abstract: Package Pins Temp. LUTs (K) LFE2M20E-5FN484I 304 1.2V -5 Lead-Free fpBGA 484 IND 20 LFE2M20E-6FN484I 304 1.2V -6 Lead-Free fpBGA 484 IND 20 LFE2M20E-5FN256I 140 1.2V -5 Lead-Free fpBGA 256 IND 20 LFE2M20E-6FN256I 140 1.2V ... | Original |
18 pages, |
LFE2M35E-6FN484I LFE2M20 1152-ball DS1006 DS1006 abstract |
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| Abstract: FPBGA 31x31 mm 900 12.6 10.5 9.2 6.3 2.0 LFE2M20E FPBGA 17x17 mm 256 24.2 20.2 17.8 12.6 3.2 LFE2M20E FPBGA 23x23 mm 484 18.1 15.6 13.8 ... | Original |
8 pages, |
FPBGA 36 pin, FCBGA 7x7mm 28X28 LFXP2-5E QFN PACKAGE thermal resistance Theta JB ssop 36 LFXP2-8E 132 PBGA 23X23 PBGA 324 19x19 SCM25 SCM15 Theta JB BGA 23X23 datasheet abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.9, January 2012 LatticeECP2/M Family Data Sheet Introduction January 2012 Data Sheet DS1006 DS1006 Features High Logic Density for System Integration · 6K to 95K LUTs · 90 to 583 I/Os Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / ... | Original |
389 pages, |
16x4 sram DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.6, March 2010 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
393 pages, |
c 4161 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.7, July 2010 LatticeECP2/M Family Data Sheet Introduction July 2010 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for S ... | Original |
393 pages, |
PR68A LFE2M20E-5FN484i LFE2M50E-5FN484C LFE2M50e lfe2m35se LFE2M50 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.5, November 2009 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Features Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for S ... | Original |
389 pages, |
sgmii switch DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.8, April 2011 LatticeECP2/M Family Data Sheet Introduction July 2010 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
389 pages, |
DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.3, August 2008 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
386 pages, |
socket 1156 pinout pr77a PR68A CEI 23-50 socket am3 socket pinout CEI 23-50 226 35K capacitor datasheet L33 thermal fuse LFE2M50 marking l33 LFE2M20SE-5FN484C M33 thermal fuse PB58 DS1006 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.0, February 2008 LatticeECP2/M Family Data Sheet Introduction August 2007 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density ... | Original |
385 pages, |
DS1006 DS1006 abstract |
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