L7200 ARM720T UCB1200 ARM720TTM L1121 240X160 EPOC32 L7200SDB 74HC244 16C750 - Datasheet Archive

 

Internet System ProcessorDSP Enhanced Architecture Target Market The L7200 is designed to provide the highest system performance

 

L7200 L7200 Internet System ProcessorDSP Enhanced Architecture Target Market The L7200 L7200 is designed to provide the highest system performance at the lowest power dissipation. Separate data busses for instruction access (from ROM/Flash) and data access (from DRAM) permit the CPU and on-chip DSP to operate at the highest efficiency without waiting for LCD screen refresh cycles. Data transfer operations with DMA-backed on-chip peripherals require minimal CPU intervention, provide high throughput, and at the same time save power. The device's architecture permits the design of very low cost systems. For example, a minimum system can be built with just one SDRAM and a MultiMediaCard flash card, without the use of ROMs. The L7200 L7200 is targeted at the emerging Internet/Information appliance markets. This "systemon-silicon" device delivers high performance, low power, highly integrated, low cost system solutions. The L7200 L7200 is ideally suited for Information/Internet appliances such as wireless Internet terminals, smart phones, Pocket PCs, Web-pads, screen phones, lowcost set top boxes, and POS terminals. L7200 L7200 Block Diagram 32.768 KHz Timer/ RTC 3.6864 MHz PLL ARM720T ARM720T SDRAM Controller Piccolo 512Byte I-Cache Color/Mono LCDC 5KB SRAM 8KB Cache Mono LCDC Multi ICE I/F Boot ROM ROM FLASH Interrupt Controller PC Card I/F Reset & Power Management UART1 UART2 IR MultiMedia Card I/F DMA Cont. Peripheral Bridge Smart Card 1 of 11 Sync 1 UCB1200 UCB1200 I/F 52 GPIOs Sync 2 SPI The wide variety of on-chip peripherals and interfaces allows the OEM flexibility to design almost any kind of system for the target market. In addition, the availability of a CPU and DSP engine on the chip gives the system designer the choice of the engine best suited for the task. Extremely low power systems can be designed using the mono LCD controller. A higher performance color LCD controller is also available with high color depth. High bandwidth memory subsystems can be implemented with SDRAM. The static memory controller is provided for low power systems for control of SRAM, Flash, and expansion I/O such as Dual Processor CPU with 8kByte Cache 32 bit RISC ARM720TTM ARM720TTM with 16 bit instruction extensions (THUMBTM) 8KByte of four-way set-associative unified cache MMU with 64 entry TLB DSP Co-Processor; PiccoloTM 16 bit multiply, accumulate instruction 512Byte Instruction cache Dual Memory Subsystem Dynamic Memory Control 16 bit wide SDRAM (128MBytes/s bandwidth) Two banks of up 16MB each 2 or 4 banks per SDRAM Static Memory Control 16/32 bit wide data path for SRAM, Flash, ROM and External I/O Separate data path for LCD refresh activity Five memory segments of up to 64MByte each Each segment configurable as 16/32 bit Programmable access time 5KB on-chip dual ported SRAM for frame buffer or program/data store Programmable Buzzer PC Card/CompactFlashTM L1121 L1121 PC Card/CompactFlashTM controller interface Dual Display Subsystem Gray Scale Controller 1 640*480 pixels with 16 gray levels 5KB on-chip SRAM frame buffer Single scan monochrome panel support with 1, 2, 4 bits per pixel 240X160 240X160 refresh from on chip frame buffer Color-Mono LCD Controller 2 640*480 for color or mono STN/DSTN DSTN support up to 12 bpp (4096 colors) TFT support up to 12 bpp (4096 colors) MultiMediaCardTM interface Smart Card interface PC Cards. The support of MultiMediaCardTM and CompactFlashTM provides an alternative to the PC Card for memory expansion. Up to 52 general purpose I/Os provide additional flexibility. Support for Windows® CE*, Symbian EPOC32 EPOC32®* and other Real Time Operating Systems (RTOS) provides the OEM with flexibility in the choice of an OS suited for each specific application using the L7200 L7200. *Windows® CE: Windows is a registered trademark of Microsoft Corporation *Symbian EPOC32 EPOC32® is a registered trademark of Symbian Corporation +"ARM" is used to represent ARM Holdings plc (LSE: ARM and NASDAQ: ARMHY); its operating company and ARM Limited and the regional subsidiaries ARM Inc. ARM KK; ARM Korea Ltd. +©1999 ARM Ltd. ARM and Thumb are registered trademarks of ARM Limited. ARM 720T, Piccolo, Angel and Multi-ICE are trademarks of ARM Limited. Serial Communication Subsystem 2 DMA backed UARTs 115Kbps One with modem control signals IrDA 115Kbps, 1.152Mbps and 4Mbps Synchronous Serial Channel #1 with DMA UCB1200 UCB1200 Interface Modem codec Touch screen interface Audio codec SPI Master mode Synchronous Serial Channel #2 with DMA SPI/ Microwire interface with Master/Slave modes Power Management Control Run Mode (all functions enabled) Idle Mode (CPU clock shut off) Snooze Mode ­ LCD refresh from on-chip RAM Standby ­ low power, quick transition to RUN Deep Sleep ­ Ultra low power System Control Two 16 bit timer/counters RTC interrupts at: 31.25ms, 15.62ms, 7.81ms and 3.91ms timer ticks Interrupts 3 external IRQ lines 1 external FIQ lines Programmable buzzer output 32 bit real time clock (RTC) 52 GPIOs including 12 column driver for keyboard High speed data port, 16MByte/s with DMA On-Chip Debug and ICE support JTAG for Multi-ICETM interface (CPU + DSP) On-chip Boot ROM Boot through MMC Card or serial port Ball Grid Array BGA package 280 pin 0.8mm ball pitch Body size16 by 16 mm, 1.2mm high Operating Range 3.3V± 10% at 64/74MHz programmable 2.7V ± 5% at 36MHz Data retention down to 1.8V Page 2 of 11 The L7200 L7200 is a system-on-silicon chip designed to provide a high performance solution for costsensitive applications; such as Pocket PCs, smart phones, wireless Internet terminals, Web-pads, screen phones, low-cost set top box, and POS terminals. Other applications include wireless information products based on Symbian's Quartz Device Family Reference Design platform. The L7200 L7200 includes an on-chip ARM720TTM ARM720TTM core with the PiccoloTM DSP coprocessor. The ARM720TTM ARM720TTM with DSP coprocessor is a 32 bit RISC CPU with ARM®'s 16 bit instruction extensions to provide the high code density required for low cost consumer products. It employs 8 Kbytes of on-chip unified cache, write buffer, and MMU with 64-entry TLB buffer. The CPU core includes a DSP engine with its own instruction cache (512Byte) for applications; such as soft modem, MP3 decode, speech compression, JPEG compression, and other real time applications. The chip block diagram shows the major subsystems integrated on the chip. The memory sub-system consists of a high performance SDRAM controller and a separate Static Memory Controller. By separating the SDRAM controller from the Static Memory Controller, the bandwidth bottleneck typically present in single bus systems is removed. Thus, the CPU does not have to compete with the LCDC for the available memory bandwidth when executing out of ROM/Flash. Two separate LCD control subsystems are provided. The mono LCD controller provides 16 shades of gray and is capable of using on-chip SRAM frame buffer for low power designs. The color LCD controller supports larger DSTN panels in color as well as mono mode for low cost systems and TFT panels for more upscale products such as desktop screen phones. The L7200 L7200 versatility is evident by the support of many of the popular interfaces for the target market. These interfaces include the Motorola SPI/National MicrowireTM, MultiMediaCardTM, PC Card v2.0, CompactFlashTM, and audio codecs. In addition, the chip supports Philips UCB1200 UCB1200 (Modem-Audio-Analog front end) to provide modem and audio functions and a touch screen interface. Two UART channels allow modem interface and wireless communication (IrDA) respectively. DMA support for all peripheral devices provides fast data transfers even while the CPU is stopped to conserve power. Five power states and extensive power management enable the design of long-life battery-based products. Page 3 of 11 All features of the L7200 L7200 can be evaluated by adding individual modules. In addition, the customer can develop his own modules by using the provided design databases for board layout and schematics. Debugging is facilitated by the MultiICE In-Circuit Emulator, separately available from ARM® and LinkUp Systems. The MultiICE makes use of a built-in JTAG port, which provides access to CPU internals and non-intrusive hardware breakpoints. Power consumption can be monitored on every power rail of the L7200 L7200. The L7200SDB L7200SDB gives the developer access to all the hardware peripherals with device driver support. The keypad, LCD, synchronous serial peripherals, memory, and PC Card/CompactFlashTM modules are configurable. This allows the system developer to change the peripherals supported. I/O modules provided with the L7200SDB L7200SDB include: a Philips UCB1200 UCB1200 Modem-Audio-Analog frontend, Flash (16MByte), and a monochrome LCD with keypad. A set of generic low level L7200 L7200 H/W dependent APIs with source code and ARM® AngelTM debug monitor is included. These tools help the system developer to complete productionready product designs quickly. L7200SDB L7200SDB LCD Keypad Ethernet Module Codec Module Flash Module 16MByte L7200SDB L7200SDB Main Board Page 4 of 11 L7200SDB L7200SDB Block Diagram L7200 L7200 VPC 360+ Bridge Compact PCI SDRAM 2* 16MByte 74HC244 74HC244 Header Flash 16 MByte SMI Power Management SRAM 4MByte (optional) Ethernet Module 10/100 BaseT LCD Color/Mono Module (optional) CLCD TL 16C750 16C750 RS232 RS232 Debug Port MLCD MAX3243 MAX3243 KBD Mono LCD 320*240 L1121 L1121 Keyboard Fujitsu FKB1406 FKB1406 PC Card SDRAM MultiMedia Card MMC IR SIB IR IrDA UART1 RS232 RS232 SPI PortD MAX3243 MAX3243 Codec Module with UCB1200 UCB1200 GPIO Module (optional) UART2 JTAG For Multi-ICE JTAG Smart Card Page 5 of 11 Smart Card Reader Development Environment Execute in Real Time Download Code/Data Host PC Multi-ICETM L7200SDB L7200SDB (Optional) The L7200SDB L7200SDB Development System includes device drivers, software framework, sample code, documentation, and many build and development tools required to start development activities based on the L7200 L7200. The DSP software for the on-chip DSP co- processor is developed using L7200 L7200 Toolkit. The Symbian Quartz SDK is separately licensed from Symbian and the Windows® CE Platform Builder is separately available from Microsoft. Page 6 of 11 The L7200SDB L7200SDB consists of a motherboard and several modules as described below. The motherboard contains the following interfaces: Serial Port 1: RS232 RS232, 9-pin SUB-D male connector. All hardware modem control signals are available on this port. Serial Port 2: RS232 RS232, 9-pin SUB-D male connector. Only Rx and Tx are available on this port. Serial Debug port: RS232 RS232, 9-pin SUB-D connector. IR Port: 115kb/s, 1.152MB/s, and 4MB IrDA interface. JTAG interface: JTAG port to connect the MultiICE SDRAM: 32MByte on board, 16 bit wide PC Card: 68-pin Connector MultiMediaCard connector: 8MByte Flash Card included Smart Card Connector: (10pin header) Color LCD: 40-pin connector Monochrome LCD: 18-pin connector for ALPS panels Logic Analyzer: High-density 38-pin connector for HP logic analyzer CompactPCI Connector: Interface to CompactPCI backbone Ethernet Module: 10BaseT/100BaseT for fast code download Codec Module with UCB1200 UCB1200: Speaker Microphone, touch screen I/F and The Multi-ICETM may be used for software download and debug. Set non-intrusive hardware breakpoint. Multi-ICETM is available through ® LinkUp and ARM . Runs on Windows® 95/NT 95/NT, Sun OS 4.1.3 or HP/UX 9.0. Contains the following programs: · ARM® C Compiler (armcc) · ThumbTM C Compiler (tcc) ® · ARM Assembler (armasm) · ThumbTM Assembler (tasm) · Linker (armlink) ® · Symbolic debugger with ARM and ThumbTM instruction set emulation (armsd) ® · ARM Object File Librarian (armlib) · Object File Decoder (decaof) · Image File Decoder (decaxf) ® · ARM Make Utility (armmake) ® · ARM Project Manager for Windows® ® ® · ARM Debugger for Windows® with ARM and ThumbTM instruction set emulation · Image creation tool (fromelf) · PiccoloTM Debugger · Picculator (pre-configured for ARM720TM ARM720TM + PiccoloTM) · PiccoloTM DSP Assembler (picasm) DAA for a V.34 modem Flash Memory Module: 16MByte Flash module, 32bit wide Keyboard/Monochrome LCD Module: Monochrome 240*320 LCD panel with touch screen Key pad with 32 Keys, QWERTY keyboard · · · Symbian Quartz DFRD (available from Symbian) AngelTM Debug Monitor LinkUp L7200API L7200API (function calls, initialization routines, and sample source code). Contains the following programs (Source code) · AngelTM Debug Monitor · L7200 L7200 API · · · L7200SDB L7200SDB User's Guide ® ARM SDT User's Guide (CD) ® ARM SDT Reference Manual (CD) PiccoloTM Instruction-set documentation (CD) ® A computer to run ARM and Microsoft tools. Windows NT® is required for Symbian. Page 7 of 11 The L7200API L7200API provides sample code for common device drivers for L7200 L7200 peripherals that run on the L7200SDB L7200SDB board under the ARM® AngelTM debug monitor. The well-documented source code makes porting to any platform easy. The package reduces the time to port any OS to a L7200 L7200 based system since most of the HAL (Hardware Access Layer) code is already present. The L7200 L7200 Device Driver Application Interface (L7200API L7200API) contains low-level software binaries and source code. This package greatly helps to understand the programming sequence for the L7200 L7200 peripherals. · Source code of low level routines · Demonstration code implementation of the API ® · Runs under ARM AngelTM debug monitor · Compatible with L7200TLK L7200TLK · Can be used with Multi-ICETM · Supports all L7200 L7200 peripherals · OS independent APIs ® · Uses ARM Project Manager (APM) environment · · · · · · · · · · · · · · · · · MMU tables setup Cache control System Initialization Power Management · · · · · · · · Source Code Works on L7200SDB L7200SDB AngelTM Debug Monitor · · Page 8 of 11 Color LCD Mono LCD Static memory interface SDRAM Controller Peripheral DMA controller UART Controller SIR Interface Controller MIR/FIR Interface Controller SSP/SPI controller SIB Interface Controller (UCB1200 UCB1200) MMC Card Interface Controller Smart Card Interface Controller PCMCIA /Compact FlashTM Controller L1121 L1121 PC Card Interface Memory to Memory GPIO High speed DMA to/from GPIO Keyboard Interface Timers Real Time Clock Interface The specification contained herein is Advance Information and is subject to change without notification. This information should not be used for design without prior consultation from LinkUp Systems Corporation. LinkUp Systems Corp., 1190 Coleman Avenue, Suite 2C, San Jose, CA 95110. Phone: (408) 9881848; Fax: (408) 988-3848; URL: http://www.linkupsys.com Page 9 of 11 Page 10 of 11 LinkUp Systems Corporation 1190 Coleman Av. Suite 2C San Jose, CA 95110 Tel: (408) 988-1848; Fax: (408) 988-3848 http://www.linkupsys.com LinkUp Systems Japan Acetronix Uno Bldg. 3F, 2-3-11 Koruaku, Bnkyo-Ku Tokyo, Japan 112-0004 Tel: 03-5805-3677; Fax:03-5805-3371 E-mail: shimoyama@linkupsys.com (Attn: Yuji Shimoyama) 5F., Namhan Bldg., 76-42 Hannam-Dong Yongsan-Ku, Seoul, Korea Tel: 82-2-796-4561; Fax: 82-2-796-4563 E-mail: ace@ace-tronix.co.kr (Attn: S. C. Ahn) LinkUp Systems Europe Premier Technical Sales, Inc. 3235 Kifer Road, Suite 110 Santa Clara, CA 95051 Tel: (408) 736-2260; Fax: (408) 736-2826 E-mail: pardeep@ptsi.com http://www.ptsi.com 13 Lodge End Radlett, Hertfordshire WD7 7EB United Kingdom Tel: 44-0-468-190-188 E-mail: chris.langdon@linkupsys.com (Attn: Chris Langdon) Silicon Alliance International Corporation Premier Technical Sales, Inc. European Sales 14 F-2, No. 81, Hsin Tai Wu Road, HsiChih, Taipei Hsien 221, Taiwan, R.O.C Tel: 886-2-8698-4088; Fax: 886-2-8698-4089 E-mail: david@saic.com.tw (Attn: David Liu). 8 Tottenham Road Godalming, Surrey GU7 2HT United Kingdom Tel: 44-1483 428084; Fax: 44-1483 427996 E-mail: david.rix@ptsi.co.uk (Attn: David Rix) EDOM Technology Corp. Ltd. Inc Technologies (S) Pte Ltd. 8F., No.50, Lane 10, Kee Hu Road, Nei Hu Taipei (114), Taiwan, R.O.C Tel: (02)2657-8811 Ext:275; Fax: (02)2657-9090 E-mail: davidt@edom.com.tw (Attn: David Teng) 135, Joo Seng Road, #03-04 PM Industrial Building Singapore 368363 Tel: 65-383-4993; Fax: 65-383-2273 E-mail: joseph@inctech.com.sg (Attn: Joseph Chiam) American Pacific Technology Group (APTG) Room 2101 & 2102, 21/F, Westlands Centre 20 Westlands Road, Quarry Bay, Hong Kong Tel: 852-2960-4611; Fax: 852-2960-0185 E-mail: mailto:kongeric@ptsasia.com (Attn: Eric Kong) Page 11 of 11