NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| LP3991TL-1.8/NOPB | Texas Instruments | 300mA Linear Voltage Regulator for Digital Applications 4-DSBGA | 
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 FREE
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| LP5900TL-1.8/NOPB | Texas Instruments | Ultra Low Noise, 150mA Linear Regulator for RF/Analog Circuits Requires No Bypass Capacitor 4-DSBGA -40 to 125 |
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FREE
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| LP5952TL-1.8/NOPB | Texas Instruments | 350mA Dual Rail Linear Regulator 5-DSBGA -40 to 125 |
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FREE
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| LP3990TL-1.8/NOPB | Texas Instruments | 150mA Linear Voltage Regulator for Digital Applications 4-DSBGA -40 to 125 |
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FREE
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| LP3999ITL-1.8/NOPB | Texas Instruments | Low Noise 150mA Voltage Regulator for RF/Analog Applications. 5-DSBGA -40 to 125 |
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FREE
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 0 Spartan-3A FPGA Family: Data Sheet R DS529 DS529 July 10, 2007 0 0 Product Specification Module 1: Introduction and Ordering Information - DS529-1 DS529-1 (v1.4.1) July 10, 2007 · · · · · · · Introduction Features Architectural and Configuration Overview General I/O Capabilities Production Status Supported Packages and Package Marking Ordering Information · Module 2: Functional Description Module 3: DC and Switching Characteristics DS529-2 DS529-2 (v1.4) Ju ... | Original |
116 pages, |
XC3SD3400A DS529-4 DSP48A FG676 SRL16 DS529 UG332 UG334 XC3S50A xc3s400a ftg256 UG331 XC3S700A datasheet abstract |
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| Abstract: 1 Spartan-3AN FPGA Family Data Sheet DS557 DS557 December 2, 2010 Product Specification Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS557 DS557 (v4.0) December 2, 2010 DS557 DS557 (v4.0) December 2, 2010 · · · · · · · · · Introduction Features Architectural Overview Configuration Overview In-system Flash Memory Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information · Module 2: F ... | Original |
112 pages, |
UG332 XC3S50AN-4 TQG144 I UG331 SRL16 XC3S700AN FGG484 XC3S1400AN Spartan-3an Spartan-3an xc3s50an FGG676 xc3s700an* footprint HDMI TO component PINOUT XC3s700 XC3S1400AN PIN DETAILS xc3s200an DS557 DS557 abstract |
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| Abstract: 0 Spartan-3AN FPGA Family Data Sheet R DS557 DS557 November 19, 2009 0 Product Specification 0 Module 1: Introduction and Ordering Information - DS557-1 DS557-1 (v3.2) November 19, 2009 · · · · · · · · Introduction Features Architectural Overview Configuration Overview In-system Flash Memory Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information · · Module 2: Functional Description Bitstream Sizes Detailed Descrip ... | Original |
112 pages, |
DS557 FGG484 SPARTAN 3an Spartan 3AN Kit Spartan-3an SRL16 UG331 UG332 UG333 UG334 XC3S1400AN-FGG676 FGG676 Spartan-3AN XC3S700AN-FG484 XC3S400AN datasheet abstract |
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| Abstract: 0 Spartan-3AN FPGA Family Data Sheet R DS557 DS557 December 12, 2007 0 0 Module 1: Introduction and Ordering Information - DS557-1 DS557-1 (v3.0) December 12, 2007 · · · · · · · · Introduction Features Architectural Overview Configuration Overview In-system Flash Memory Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information · · Module 2: Functional Description Bitstream Sizes Detailed Descriptions by Mode · Self-co ... | Original |
108 pages, |
XC3S700AN FGG484 microblaze v7 SRL16 UG331 UG332 UG333 UG334 DS557 XC3S400AN XC3S700AN xc3s200an XC3S1400AN XC3S50AN datasheet abstract |
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| Abstract: 0 Spartan-3AN FPGA Family Data Sheet R DS557 DS557 June 2, 2008 0 0 Module 1: Introduction and Ordering Information - DS557-1 DS557-1 (v3.1) June 2, 2008 · · · · · · · · Introduction Features Architectural Overview Configuration Overview In-system Flash Memory Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information · · Module 2: Functional Description Bitstream Sizes Detailed Descriptions by Mode · Self-contained In ... | Original |
108 pages, |
DS557 FGG400 FGG484 SPARTAN-3an SRL16 UG331 UG332 UG333 UG334 XAPP480 XC3S1400AN XC3S50AN XC3S700AN FGG676 SPARTAN 3an datasheet abstract |
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| Abstract: 0 Spartan-3A FPGA Family: Data Sheet DS529 DS529 August 19, 2010 0 0 Product Specification Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS529-1 DS529-1 (v2.0) August 19, 2010 DS529-3 DS529-3 (v2.0) August 19, 2010 · · · · · · · · Introduction Features Architectural and Configuration Overview General I/O Capabilities Production Status Supported Packages and Package Marking Ordering Information · Module 2: Spartan-3A F ... | Original |
132 pages, |
XC3S700A SRL16 UG331 UG332 DS529 XC3S50A UG334 XC3S400A FT256 XC3S1400A DS529 abstract |
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| Abstract: 0 Spartan-3A FPGA Family: Data Sheet R DS529 DS529 March 6, 2009 0 0 Product Specification Module 1: Introduction and Ordering Information - DS529-1 DS529-1 (v1.8) March 6, 2009 · · · · · · · Introduction Features Architectural and Configuration Overview General I/O Capabilities Production Status Supported Packages and Package Marking Ordering Information · Module 2: Functional Description Module 3: DC and Switching Characteristics DS529-2 DS529-2 (v1.8) Marc ... | Original |
132 pages, |
Xilinx spartan xc3s400a spartan hdmi SRL16 t25 4 l9 UG331 UG332 UG334 XC3S50A XC3SD3400A DS529 spartan 3a datasheet abstract |
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| Abstract: 1 Spartan-3A DSP FPGA Family Data Sheet DS610 DS610 October 4, 2010 Product Specification Module 1: Introduction and Ordering Information DS610 DS610 (v3.0) October 4, 2010 · · · · · · · · Introduction Features Architectural Overview Configuration Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information - · Module 2: Functional Description The functionality of the Spartan®-3A DSP FPGA family is described in the following documen ... | Original |
101 pages, |
DS610 DSP48 DSP48A MultiBoot SRL16 ttl to mini-lvds UG331 UG332 XC3SD3400A DS610 abstract |
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| Abstract: 0 Spartan-3A DSP FPGA Family: Data Sheet R DS610 DS610 July 16, 2007 0 Product Specification 0 Module 1: Introduction and Ordering Information · DS610-1 DS610-1 (v2.0) July 16, 2007 · · · · · · · Introduction Features Architectural Overview Configuration Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information Module 2: Functional Description DS610-2 DS610-2 (v2.0) July 16, 2007 The functionality of the SpartanTM-3A DSP FPGA famil ... | Original |
98 pages, |
xc3sd3400a UG332 UG331 SRL16 DSP48A DS610 xc3s1800a datasheet abstract |
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| Abstract: 0 Spartan-3A DSP FPGA Family: Data Sheet R DS610 DS610 March 11, 2009 0 Product Specification 0 Module 1: Introduction and Ordering Information · DS610-1 DS610-1 (v2.2) March 11, 2009 · · · · · · · Introduction Features Architectural Overview Configuration Overview General I/O Capabilities Supported Packages and Package Marking Ordering Information Module 2: Functional Description DS610-2 DS610-2 (v2.2) March 11, 2009 UG332 UG332: Spartan-3 Generation Configuration User ... | Original |
102 pages, |
ttl to mini-lvds xc3s1800a UG332 UG331 DS610 SRL16 fg676 DSP48A CS484 xc3sd3400a datasheet abstract |
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| Abstract: HDM 240GS16-1 240GS16-1 2.8" 240 X 160 Dots Graphic Dimensional Drawing Dimension tolerance: +/-0.3mm Features or EL STN or FSTN (B/W) Normal/Extended Temperature Bottom/Top Viewing Analog Touch Panel Built-in Physical Data Module Size. ... | Original |
1 pages, |
LP324 2SC1815 lcd 3310 240GS16-1 240GS16-1 abstract |
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| Abstract: 05118 PSD03 PSD03 thru PSD36C PSD36C STANDARD CAPACITANCE TVS ARRAY APPLICATIONS · · · · Laptop Computers Cellular Phones Digital Cameras Personal Digital Assistant (PDA) IEC COMPATIBILITY (EN61000-4 EN61000-4) · 61000-4-2 (ESD): Air - 15kV, Contact - 8kV · 61000-4-4 (EFT): 40A - 5/50ns · 61000-4-5 (Surge): 24A, 8/20s - Level 2(Line-Gnd) & Level 3(Line-Line) SOD-323 FEATURES · · · · · · · · · Unidirectional: 500 Watts Peak Pulse Power per Line (tp = 8/20s) BidirectionalL 400 ... | Original |
4 pages, |
PSD36C PSD12 PSD08C PSD08 PSD05C PSD05 PSD03C PSD03 PSD03 abstract |
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| Abstract: A Light pipes for SMDs 6,2 1,5 12,1 19,5 way of fixation by alignment pins diameter of lense Ø 3 mm 6,2 2,54 way of fixation by press-in pins 6,2 Ø 1,25 2,5 art. no. LL 35 HVS 8,5 20,6 3 G 5,5 2,5 Ø3 Ø1,09 F 1,5 12,1 18,7 4,17 2,54 way of fixation by alignment pins H 9,07 diameter of lense Ø 3 mm Ø 0,97 art. no. LL 30 HRP 4,12 1,5 4,17 12,1 18,7 diameter of lense rectangle 5.5x3 mm ... | Original |
5 pages, |
datasheet abstract |
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| Abstract: Speed Monitor KHU8-DW-1.D Technical description The KHU8-DW-1.D is a device used to indicate and monitor periodic signals which occur in almost all areas of automation and process engineering, i.e. frequencies in general and rotational speeds in particular. The input signals are evaluated using the cycle method, i.e. by measuring the duration of a period, and then converted by a very fast u-controller to frequency, or rotational speed. The frequently occuring special case of rotational ... | Original |
4 pages, |
PROCESS CONTROL TIMER using relay circuit diagram of delay timer on off datasheet abstract |
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| Abstract: 05118 Only One Name Means ProTek'TionTM PSD03 PSD03 - PSD36C PSD36C high powered TVS ARRAY Description The PSDxx and PSDxxC Series are transient voltage suppressor arrays designed for ESD protection of SMART phones, laptop computers and other portable electronics. These silicon based diodes offer superior clamping voltage and performance compared to other technologies such as MLVs. The PSDxx and PSDxxC Series can be utilized as a single line protector in either a unidirectional or bidirectional con ... | Original |
8 pages, |
PSD03 PSD36C PSD03 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| | | | | | sys_data_i[9] (L18N_Y) | INPUT | C15 | SSTL2_I _data_i[8]) | B15 | | | L18N_Y (sys_data_i[9 www.datasheetarchive.com/download/82125193-995910ZC/xapp200.zip (top_par.pad) |
Xilinx | 08/09/2000 | 1688.56 Kb | ZIP | xapp200.zip |
| | | | | | sys_data_i[9] (L18N_Y) | INPUT | C15 | SSTL2_I _data_i[8]) | B15 | | | L18N_Y (sys_data_i[9 tar:gzip:tar:gwww.datasheetarchive.com/files/xilinx/files/appnotes/xapp200.tar.gz!/xapp200.tar!/vhdl/xapp200_vhdl.tar.gz!/xapp200_vhdl.tar!/2.5/par/top_par.pad |
Xilinx | 08/09/2000 | 1595.91 Kb | GZ | xapp200.tar.gz |
| | | | | | sys_data_i[9] (L18N_Y) | INPUT | C15 | SSTL2_I _data_i[8]) | B15 | | | L18N_Y (sys_data_i[9 tar:gzip:tar:gwww.datasheetarchive.com/files/xilinx/files/appnotes/xapp200.tar.gz!/xapp200.tar!/verilog/xapp200_verilog.tar.gz!/xapp200_verilog.tar!/2.5/par/top_par.pad |
Xilinx | 08/09/2000 | 1595.91 Kb | GZ | xapp200.tar.gz |
| | | | | | sys_data_i[9] (L18N_Y) | INPUT | C15 | SSTL2_I _data_i[8]) | B15 | | | L18N_Y (sys_data_i[9 www.datasheetarchive.com/download/82125193-995910ZC/xapp200.zip (top_par.pad) |
Xilinx | 08/09/2000 | 1688.56 Kb | ZIP | xapp200.zip |
| | | | KEEPER | | DH (L18N) | BIDIR | C15 | LVCMOS2 | | | L18N (DH) | C15 | | | L18P (DH www.datasheetarchive.com/download/75288683-995942ZC/xapp246.zip (top_60x.pad) |
Xilinx | 16/12/2000 | 285.35 Kb | ZIP | xapp246.zip |
| MGA-83563 MGA-83563 MGA-83563 MGA-83563 3V/L=1.2nH 3V/L=18n www.datasheetarchive.com/files/agilent/files/sparameters.htm |
Agilent | 24/10/2003 | 129.33 Kb | HTM | sparameters.htm |
| ! MGA-83563 MGA-83563 MGA-83563 MGA-83563 S PARAMETERS ! Vd = 3 V L=18 nH LAST UPDATED 10-15-97 # ghz s ma r 50 0.6 0.59 -48 15.61 43 0.005 105 0.09 150 0.8 0.33 -57 16.96 6 0.011 102 0.15 -130 1.0 0.16 -27 16.02 -25 0.017 87 0.31 -146 1.2 0.22 16 14.15 -49 0.021 75 0.43 -165 1.4 0.31 22 12.22 -68 0.023 66 0.51 177 1.6 0.38 20 10.49 -84 0.025 59 0.57 163 1.8 0.43 17 9.03 -97 0.026 54 0.61 150 2.0 0.46 14 7.79 -109 0.027 51 0.63 139 2.2 0.49 11 6.74 -120 0.028 48 0.65 129 2.4 0.50 8 5.85 -130 0.029 46 0.67 121 2.6 0 www.datasheetarchive.com/files/agilent/files/s-params/mga-83563 2nd sp3v l=18nh.html |
Agilent | 25/09/2003 | 1.18 Kb | HTML | mga-83563 2nd sp3v l=18nh.html |
| ! MGA-83563 MGA-83563 MGA-83563 MGA-83563 S PARAMETERS ! Vd = 3 V L=18 nH LAST UPDATED 10-15-97 # ghz s ma r 50 0.6 0.59 -48 15.61 43 0.005 105 0.09 150 0.8 0.33 -57 16.96 6 0.011 102 0.15 -130 1.0 0.16 -27 16.02 -25 0.017 87 0.31 -146 1.2 0.22 16 14.15 -49 0.021 75 0.43 -165 1.4 0.31 22 12.22 -68 0.023 66 0.51 177 1.6 0.38 20 10.49 -84 0.025 59 0.57 163 1.8 0.43 17 9.03 -97 0.026 54 0.61 150 2.0 0.46 14 7.79 -109 0.027 51 0.63 139 2.2 0.49 11 6.74 -120 0.028 48 0.65 129 2.4 0.50 8 5.85 -130 0.029 46 0.67 121 2.6 0 www.datasheetarchive.com/files/spicemodels/misc/s_parameter_cd/hp/ics/mga/m83563a3.s2p |
Spice Models | 29/07/2012 | 1.18 Kb | S2P | m83563a3.s2p |
| - GND - P45 - - VCCINT - P46 - - I/O, L18N_YY 5 P47 All - I/O, L18P_YY 5 P48 All - I/O, VREF Bank 5 5 P P129 - - VCCO - P130 - - GND - P131 - - I/O (IRDY), L18N_YY 2 P132 All - I/O, L18P_YY 2 P133 All ), L18N_YY 1 A13 All - I/O, L17P 1 B13 XC2S50E XC2S50E XC2S50E XC2S50E, 100E, 200E, 300E, 400E XC2S200E XC2S200E XC2S200E XC2S200E, 300E, 400E I/O, L17 www.datasheetarchive.com/download/2732385-996081ZC/ds077.zip (ds077_4.pdf) |
Xilinx | 15/07/2003 | 562.89 Kb | ZIP | ds077.zip |
| | | | L18N_Y | C15 | | | L18P tar:gzip:tar:gwww.datasheetarchive.com/files/xilinx/files/appnotes/xapp200_16.tar.gz!/xapp200_16.tar!/verilog/xapp200_16_verilog.tar.gz!/xapp200_16_verilog.tar!/2.5/par/top_par.pad |
Xilinx | 08/09/2000 | 946.31 Kb | GZ | xapp200_16.tar.gz |