NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: input 6 uPD78F9801 uPD78F9801 2. BLOCK DIAGRAM KR00-KR07 Key return 0 8-bit timer 00 Port 0 , 36 P16 P40/KR00 8 35 P17 RESET 9 34 VSS1 X2 10 33 VDD1 X1 , 30 REGC 26 X2 9 25 RESET P15 10 24 P40/KR00 P14 11 23 12 13 14 , the VSS0 pin. INTP0 : Interrupt from peripherals KR00 - KR07 : Key return SO10 : Serial , specified by software. I/O Port 4 INTP0/TI01/TO01 INTP0/TI01/TO01 Input KR00 - KR07 8-bit input/output ... | Original |
36 pages, |
uPD78F9801GB-3BS-MTX KR-06 KR00 kr07 nec 44-pin QFP P24P2 PD789800 smd transistor p17 SO10 package uPD789014 uPD789026 uPD789407 uPD78F9801 uPD78F9801CU PD78F9801 PD78F9801 abstract |
| Abstract: REGC 9 25 RESET P15 10 24 P40/KR00 P14 11 23 12 13 14 15 16 17 18 19 20 21 , VSS0 or VSS1 pin. INTP0 : Interrupt from peripherals KR00 - KR07 : Key return SO10 : Serial , : Serial data input Z78F9801 Z78F9801 2. BLOCK DIAGRAM KR00/P40-KR07/P47 KEY RETURN0 8-bit TIMER00 TIMER00 , /TI01/TO01 /TI01/TO01 Input KR00 - KR07 8-bit input/output port Input or output is specifiable bit by bit. , KR00 - KR07 Input Input for detecting key return signals Input P40-P47 P40-P47 REGC - - ... | Original |
43 pages, |
Z78F9801GB-8ES Z78F9801GB-3BS-MTX U11047E SO10 package Z78F9801 Z78F9801 abstract |
| Abstract: : Crystal REGC : Voltage regulator for USB function 8 uPD789800 uPD789800 2. BLOCK DIAGRAM KR00-KR07 , /KR00-P47/KR07 pins. Specify whether to detect the key return signals at the P40/KR00-P47/KR07 pins by , detection for the P40/KR00-P43/KR03 pins 0 No detection 1 Detection (detecting the falling edges of the P40/KR00-P43/KR03 signals) Cautions 1. Be sure to set 0 in bits 1 to 3. 2. When KRM00 KRM00 is , 36 P16 P40/KR00 8 35 P17 RESET 9 34 VSS1 X2 10 33 VDD1 X1 ... | Original |
48 pages, |
uPD78F9801 uPD789800GB- uPD789800CU- uPD789046 uPD789026 U11047E KR04 PD789800 PD789800 abstract |
| Abstract: /KR00-P47/KR07 pins. Specify whether to detect the key return signals at the P40/KR00-P47/KR07 pins by , detection for the P40/KR00-P43/KR03 pins 0 No detection 1 Detection (detecting the falling edges of the P40/KR00-P43/KR03 signals) Cautions 1. Be sure to set 0 in bits 1 to 3. 2. When KRM00 KRM00 is , 26 X2 P16 9 25 RESET P15 10 24 P40/KR00 P14 11 23 12 13 14 15 16 , : Internally connected : Serial data input INTP0 : Interrupt from peripherals KR00 - KR07 : Key return ... | Original |
48 pages, |
nec p4n kr04 "USB Token" 1997 PD789800 PD789800 abstract |
| Abstract: BLOCK DIAGRAM KR00-KR07 KEY RETURN0 8-bit TIMER00 TIMER00 PORT 0 PORT 1 8-bit TIMER/ EVENT , signals input to the P40/KR00-P47/KR07 pins. Specify whether to detect the key return signals at the P40/KR00-P47/KR07 pins by means of key return mode register 00 (KRM00 KRM00). Inhibit interrupts before setting , ) KRM000 KRM000 Selection of key return signal detection for the P40/KR00-P43/KR03 pins 0 No detection 1 Detection (detecting the falling edges of the P40/KR00-P43/KR03 signals) Cautions 1. Be sure ... | Original |
48 pages, |
uPD78F9801 uPD789800GB- uPD789800CU- uPD789046 uPD789026 U11047E PD789800 PD789800 abstract |
| Abstract: P15 10 24 P40/KR00 P14 11 23 12 13 14 15 16 17 18 19 20 21 22 P41/KR01 P41/KR01 Caution , : Interrupt from peripherals KR00 - KR07 : Key return SO10 : Serial data output NC : No , KR00/P40-KR07/P47 KEY RETURN0 8-bit TIMER00 TIMER00 PORT 0 PORT 1 8-bit TIMER/ EVENT COUNTER01 COUNTER01 , /TI01/TO01 /TI01/TO01 Input KR00 - KR07 8-bit input/output port Input or output is specifiable bit by bit. , (rising and/or falling edges) can be specified Input P26/TI01/TO01 P26/TI01/TO01 KR00 - KR07 Input Input ... | Original |
44 pages, |
uPD78F9801GB-8ES uPD78F9801GB-3BS-MTX uPD78F9801 uPD789046 uPD789026 U11047E PD789800 PD78F9801 PD78F9801 abstract |
| Abstract: P41/KR01 P41/KR01 10 24 P25/INTP1 P25/INTP1 P40/KR00 11 23 12 13 14 15 16 17 18 19 20 21 22 P26/INTP2 P26/INTP2 , from Peripherals KR00 to KR07: Key Return TI80: P00 to P07: Port 0 TO80, TO90: Timer , INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40 to KR07/P47 KR07/P47 SIO20 SIO20 RAM System control Interrupt , pull-up resistor can be specified by means of software. 8 Data Sheet U13380EJ1V2DS U13380EJ1V2DS KR00 to KR07 , specified After Reset Alternate Function P24 Input P25 INTP2 P26/CPT90 P26/CPT90 KR00 to KR07 ... | Original |
51 pages, |
uPD78F9046 uPD789217AY uPD789046GB- uPD789046 uPD789026 uPD789014 U11047E datasheet abstract |
| Abstract: 9 25 P24/INTP0 P24/INTP0 P41/KR01 P41/KR01 10 24 P25/INTP1 P25/INTP1 P40/KR00 11 23 12 13 14 15 16 17 , SS20: Chip Select Input KR00 to KR07: Key Return TI80: Timer Input P00 to P07 , /P22 SS20/P23 SS20/P23 INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40 to KR07/P47 KR07/P47 SIO20 SIO20 RAM System , KR00 to KR07 uPD789046 uPD789046 3.2 Non-Port Pins Pin Name INTP0 I/O Input INTP1 Function , KR00 to KR07 Input SI20 Input Serial interface serial data input Input P22/RxD20 ... | Original |
48 pages, |
uPD78F9046 uPD789217AY uPD789046GB- uPD789046 uPD789026 uPD789014 U11047E PD789197AY PD789124A PD789046 PD789046 abstract |
| Abstract: 9 25 P24/INTP0 P24/INTP0 P41/KR01 P41/KR01 10 24 P25/INTP1 P25/INTP1 P40/KR00 11 23 P26/INTP2/CPT90 P26/INTP2/CPT90 , : Interrupt from Peripherals SS20: Chip Select Input KR00 to KR07: TI80: Timer Input Key , INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40 to KR07/P47 KR07/P47 SERIAL INTERFACE20 INTERFACE20 RAM SYSTEM , 8 Data Sheet U13546EJ1V1DS U13546EJ1V1DS KR00 to KR07 uPD78F9046 uPD78F9046 3.2 Non-Port Pins Pin Name , specified. INTP1 P25 INTP2 P26/CPT90 P26/CPT90 KR00 to KR07 Input Key return signal detection ... | Original |
49 pages, |
uPD78F9046GB-8ES-A uPD78F9046GB-8ES uPD78F9046 uPD789046 uPD789026 uPD789014 U11047E datasheet abstract |
| Abstract: P42/KR02 P42/KR02 9 25 P24/INTP0 P24/INTP0 P41/KR01 P41/KR01 10 24 P25/INTP1 P25/INTP1 P40/KR00 11 23 P26 , INTP0 to INTP2: Interrupt from Peripherals SS20: Chip Select Input KR00 to KR07: Key Return , /P22 SS20/P23 SS20/P23 INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40 to KR07/P47 KR07/P47 SERIAL INTERFACE20 INTERFACE20 , of software. Input Data Sheet U13546EJ1V0DS00 U13546EJ1V0DS00 TO90 BZO90 BZO90 KR00 to KR07 uPD78F9046 uPD78F9046 , specified. After Reset Alternate Function Input P24 P25 INTP2 P26/CPT90 P26/CPT90 KR00 to KR07 ... | Original |
48 pages, |
PD78F9046 PD78F9046 abstract |
| Abstract: P41/KR01 P41/KR01 10 24 P25/INTP1 P25/INTP1 P40/KR00 11 23 12 13 14 15 16 17 18 19 20 21 22 P26 , /RxD20/P22 SS20/P23 SS20/P23 INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40-KR07/P47 SERIAL INTERFACE20 INTERFACE20 ... | Original |
46 pages, |
uPD78F9046GB-8ES-A FL-PR3 U11622J uPD789014 uPD789026 uPD789046 uPD78F9046 uPD78F9046GB-8ES FA-44GB-8ES PD789134A PD789124A datasheet abstract |
| Abstract: P40/KR00 11 23 12 13 14 15 16 17 18 19 20 21 22 P26/INTP2/CPT90 P26/INTP2/CPT90 P27/TI80/TO80 P27/TI80/TO80 RESET , INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40-KR07/P47 SIO20 SIO20 RAM INTERRUPT CONTROL VDD0 ... | Original |
50 pages, |
uPD78F9046 uPD789217AY uPD789046GB- uPD789046 uPD789026 uPD789014 datasheet abstract |
| Abstract: P40/KR00 11 23 12 13 14 15 16 17 18 19 20 21 22 P26/INTP2/CPT90 P26/INTP2/CPT90 P27/TI80/TO80 P27/TI80/TO80 RESET , INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/CPT90/P26 INTP2/CPT90/P26 KR00/P40-KR07/P47 SIO20 SIO20 RAM INTERRUPT CONTROL VDD0 ... | Original |
48 pages, |
uPD78F9046 uPD789217AY uPD789046GB- uPD789046 uPD789026 uPD789014 PD789167 PD789124A PD789046 PD78904678K/0S PD789046 abstract |
| Abstract: /SS20 /SS20 P42/KR02 P42/KR02 9 25 P24/INTP0 P24/INTP0 P41/KR01 P41/KR01 10 24 P25/INTP1 P25/INTP1 P40/KR00 11 23 12 , KR00/P40-KR07/P47 SERIAL INTERFACE20 INTERFACE20 RAM INTERRUPT CONTROL VDD0 VSS0 VDD1 VSS1 ... | Original |
44 pages, |
uPD78F9046GB-8ES-A uPD78F9046GB-8ES uPD78F9046 uPD789046 uPD789026 uPD789014 flashpro PD78F9046 PD78F904678K/0S PD789046 PD789046ROM PD78F9046 abstract |
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| begin 755 chkinit.Z M'YV0 B $0%! A "!,J7*BPQ8B$@!(" U !("#_C A#' 0H8"-B!)20$B M',.2&]&11)5P $(#S!C"E!ESX4R%%1$7#)#022"5$ (%"!"\*?1Q/"NP@ M*0$8"1.Q0=C"(D, $0$$2 @BAPP:-6:T@'$C2$(8.5SWCH"#?0Z0Y M?.$Z\DCW/Y]!9Z-+ '8QY_P/"'Y\X'P754,$0A>0I ",!V&"1$X ##& 7 M@Q'VEQ H"F[GV #P9$4#- !PZ"&(")W'2H8@($%2"5!82 www.datasheetarchive.com/download/58453005-960440ZC/chkinith.uue |
Xilinx | 05/09/1996 | 306.71 Kb | UUE | chkinith.uue |
| begin 644 4kefixhp.tar.Z M'YV0- F%'&A9@Y9 H7,BPH0 M*5N%3-^"!A!W]-S1=4'?[1Q KVJ^JOVJ!JQ: www.datasheetarchive.com/download/32843250-960428ZC/4kefixhp.uue |
Xilinx | 05/09/1996 | 1743.89 Kb | UUE | 4kefixhp.uue |
| begin 666 XSI_verilog.tar.Z M'YV06*8D^6*GC)PT;-Z0&@H3+@P#)LP www.datasheetarchive.com/download/43392718-960537ZC/ver_ex.uu |
Xilinx | 05/09/1996 | 4001.98 Kb | UU | ver_ex.uu |
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Xilinx | 08/07/1996 | 4001.98 Kb | UU | ver_ex.uu |