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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: RN -17 1-E K-DS RN-171-EK RN-171-EK Evaluation Board Features · · · · · · · · · · · · Ultra-low , sensor interfaces; configurable sensor power outputs 0 to 3.3-V DC Real-time clock for wakeup and time , power the board using two AAA batteries (the input voltage can go down to 2.0 V DC when using the , clock, and supports the FTP client, DHCP, DNS, and HTML client protocols. The module supports ad hoc and , www.rovingnetworks.com Version 1.0 9/18/2012 1 RN -17 1-E K-DS OVERVIEW · · · · · · · · · Host data ... | Original |
8 pages, |
sensor based home automation iphone battery iphone 4 ipad wifi Humidity Sensor analog 30 pin connector iphone microprocessor Uart WiFi KDS 40 Mhz clock apple iphone 5 RN-171-EK RN-171-EK abstract |
| Abstract: Maxim > App Notes > AUDIO CIRCUITS HIGH-SPEED INTERCONNECT CLOCK GENERATION AND DISTRIBUTION Keywords: Audio clock generator, MPEG2, AC-3, fractional-N PLL, VCXO, crystal power level, crystal model, VCXO power level, I2C programming Mar 20, 2006 APPLICATION NOTE 3736 How to Test the Crystal's Power Level in the MAX9485 MAX9485 Abstract: MAX9485 MAX9485 is a versatile, programmable, audio clock generator. It , , multiple-output audio clock generator for MPEG-2 or AC-3 audio systems such as DVD players, a DVD drive for ... | Original |
7 pages, |
KDS CRYSTAL 12Mhz crystal oscillator MAX9485 MAX9489 MAX9491 12mhz crystal QUARTZ OSCILLATOR 27MHZ CRYSTAL 20 mhZ KDS 27mhz kds 1 MHz crystal KDS crystal clock ic KDS 20 Mhz clock DSX530GA datasheet abstract |
| Abstract: 27 MHz 12 8 2.0 50 1000 KDS SMD-49 SMD-49 D138CyC 13.824 MHz 12 11.2 2.6 , Clock Option Table 2. 20-Pin TSSOP 2.5V Clock Option. Pin # CLK Name VSSL Pin VDDL Pin , Reference Clock (Input) 30 MHz fREFD Description 10 External Reference Clock (Input , DSX530GA DSX530GA 27 MHz 12.6 11.8 3.1 40 300 KDS 5x3.2mm DSX530GA DSX530GA 27 MHz 10.7 11.9 3.1 40 300 RIVER 5x3.2mm FCX-03 FCX-03 27 MHz 12 7.1 2.0 50 500 ... | Original |
6 pages, |
KDS 50 Mhz crystal oscillator CY22389 CY22388 SMD-49 SMD-49 KDS KDS 70 Crystals KDS 8 MHZ crystal KDS 20 Mhz clock 20 MHz crystal KDS KDS 12 MHZ crystal KDS 16 MHZ crystal SMD-49 oscillator KDS 40 Mhz clock CY22388 abstract |
| Abstract: H H L L H H Clock Output Frequency (MHz) S2 (Pin 14) L H L H L H L H CLK1 , Description The AK8131S AK8131S is a member of AKEMD's low power multi clock generator family designed for a feature , vary by �0 ppm for synchronizing to the external clock system. Both circuitries of VCXO and PLL in AK8131S AK8131S are derived from AKEMD's long-term-experienced clock device technology, and enable clock output , a 16-pin SSOP package. 27MHz Crystal Input Four Frequency-Selectable Clock Outputs One ... | Original |
8 pages, |
KDS 12 MHZ crystal 4 pin KDS CRYSTAL KDS 50 Mhz crystal oscillator 4 MHz crystal KDS AK8130 crystal oscillator KDS 27mhz kds CRYSTAL 20 mhZ KDS KDS oscillator KDS 20 Mhz clock datasheet 27.000mhz KDS 40 Mhz clock datasheet AK8131S AK8131S abstract |
| Abstract: Development of Ultra Miniature Crystal Clock Oscillator, DSO211AR DSO211AR April 22, 2008 DAISHINKU , oscillator, its size is 2.0*1.6*0.72mm (0.8mm max.). The oscillator is ceramic-packaged with an adopted , supply voltage range between +1.6V to +3.6V with KDS' original design of oscillator circuit. The , miniature: 2016size (2.0*1.6mm), height 0.72mm (0.8mm max.) Output frequency range: 1MHz to 80MHz Supply , ] Supply Output Frequency Range Voltage Item (MHz) Legend Spec. Condition typ. ... | Original |
3 pages, |
KDS -5a KDS 30 Mhz crystal oscillator KDS 25 MHZ crystal daishinku KDS 24 MHZ oscillator KDS 10 MHz oscillator KDS 1MHz crystal KDS oscillator KDS 50 Mhz crystal oscillator KDS 1mhz oscillator DSO211AR DSO211AR abstract |
| Abstract: Symbol Description Clk Min Max Unit Count Com Mil Clock frequency - 25 20 MHz t, KCLK cycle , 3) 0.5 0 - - ns *14 KÄS width asserted (Note 3) 2.0 -5 - - ns tl4A KDS width asserted (write , , , VADOR ... | OCR Scan |
67 pages, |
VMEbus CA91 DMA24 KAS 21 KDS -5a kds 4.000 A328A application note MD500 VAM-05 VAM-03 KDS 8.000 SR 7231 VAM03 datasheet abstract |
| Abstract: bus timeout Reset and clock generation Four general purpose clocks 14ms DRAM refresh clock 2.4615 MHz , Bus P8 VECTEN Interrupt L2 KDS Local Bus P9 BITRIG Reset, Clock & Mode L3 KADDR 01 Local Bus P10 , output C14US C14US H1 O 14 microsecond clock output C8MHZ J1 o 8 MHz clock output C32MHZ C32MHZ Q10 I 32 megahertz , clock; any frequency up to 25 MHz is valid. 2. C14US C14US changes are synchronized by ACC to falling edge of , high-z from KDS high (Note 7) 3.3 8 16 22 ns »18 KDATA high-z from ACCSEL high (Note 7) 2.9 7 14 20 ns ... | OCR Scan |
53 pages, |
CA91 C014 CA91C014 CA91C014 abstract |
| Abstract: 24.576 MHz ±20 ppm ±25 ppm Parallel Resonant 4 pF max. Load Capacitance 15 pF Drive Level 1.5 , with layout parasitics, can cause errors in the clock rate of the circuit. If too large, these errors , These external passive components operate with the internal inverter to produce the data pump clock , variables. C1=C2 TO 2 (C2) XTAL The clock frequency is divided down to produce the baud rate for the , , respectively, to achieve this oscillation. Figure 1 illustrates the circuit. Alternately, a complete clock ... | Original |
4 pages, |
Z02922 20PF CRYSTAL KDS KDS 25 MHZ crystal Z02201 20 MHz crystal KDS kds 2 pin crystal oscillator 4 MHz KDS 2F 4 mhz crystal oscillator by kds P744 Z02201/Z02922 Z02201/Z02922 abstract |
| Abstract: Reset and clock generation • Four general purpose clocks 14jis DRAM refresh clock 2.4615 MHz baud clock , L2 KDS Local Bus P9 BITRIG Reset, Clock & Mode L3 KADDR 01 Local Bus P10 LBRQ1 Local Bus L13 , 8 MHz dock output C32MHZ C32MHZ 010 32 megahertz clock input ENDOG B8 1 Enable watchdog control pin , same as the CPU clock; any frequency up to 25 MHz is valid. , 2. C14US C14US changes are synchronized by ACC , separated into seven distinct modules: • Reset, Clock, and Bl-mode"1 Module • Local Bus Requester/Arbiter ... | OCR Scan |
53 pages, |
MD500 CA91C014 CA91C014 abstract |
| Abstract: Compliant with Bluetooth specification V1.2. Support UART and USB 2.0 interfaces. PCM audio CODEC , multiple reference clock frequencies for GSM/GPRS and CDMA cellular applications. 2005/01/25 Crystal or Reference Clock Page 1 of 14 apm8562 Bluetooth Class2 Full Module Data Sheet TABLE OF , CLOCK. 10 4-4 POWER SUPPLY , Descriptions 19 EXT_WAKE 21 20 HOST_WAKEUP VCC_OUT PWR_REG_EN/PIO_8 23 VBATT_ANA 24 ... | Original |
14 pages, |
apm85 bluetooth chip DST520 KDS 8 MHZ crystal lock system using bluetooth Si2312DS TK11233CM bluetooth transmitter receiver audio TK11233CMCL datasheet abstract |
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| the pointer, see Figure 14. 9/20 M41T56 M41T56 M41T56 M41T56 CLOCK OPERATION The eight byte clock register (see PULSE FOR ACKNOWLEDGEMENT 1 2 8 9 MSB LSB M41T56 M41T56 M41T56 M41T56 10/20 CLOCK CALIBRATION The M41T56 M41T56 M41T56 M41T56 is 26/01/2001 20 Raw Text Format 1/20 March 2000 M41T56 M41T56 M41T56 M41T56 512 bit (64b , MINUTES, HOURS, DAY, DATE, MONTH, YEARS and CENTURY n YEAR 2000 COMPLIANT n SOFTWARE CLOCK / Output SCL Serial Clock V BAT Battery Supply Voltage V CC Supply Voltage V SS Ground www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6104-v3.htm |
STMicroelectronics | 31/01/2001 | 29.23 Kb | HTM | 6104-v3.htm |
| n 2.0V to 5.5V SUPPLY VOLTAGE n COUNTERS for SECONDS, MINUTES, HOURS, DAY, DATE, MONTH, YEARS and CENTURY n YEAR 2000 COMPLIANT n SOFTWARE CLOCK CALIBRATION n AUTOMATIC SWITCH-OVER and / Output SCL Serial Clock V BAT Battery Supply Voltage V CC Supply Voltage V SS Ground 8 1 SO8 are used for the clock/calendar function and are configured in binary coded decimal (BCD) format register is incremented automatically after each write or read data byte. The M41T11 M41T11 M41T11 M41T11 clock has a www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6103.htm |
STMicroelectronics | 20/10/2000 | 29.5 Kb | HTM | 6103.htm |
| CENTURY n YEAR 2000 COMPLIANT n SOFTWARE CLOCK CALIBRATION n AUTOMATIC POWER-FAIL DETECT and SWITCH Serial Clock V BAT Battery Supply Voltage V CC Supply Voltage V SS Ground 8 1 SO8 (M) 150mil RAM are used for the clock/calendar function and are con- figured in binary coded decimal (BCD -in address register is incremented automatically after each write or read data byte. The M41T56 M41T56 M41T56 M41T56 clock the battery supply during power failures. The energy needed to sustain the RAM and clock www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6104.htm |
STMicroelectronics | 20/10/2000 | 29.46 Kb | HTM | 6104.htm |
| 13. Clock Calibration 11/15 M41T00 M41T00 M41T00 M41T00 AI00999 AI00999 AI00999 AI00999 -160 0 10 20 30 40 50 60 70 Frequency (ppm) Temperature [ March 1999 1/15 2.0V to 5.5V SUPPLY VOLTAGE COUNTERS for SECONDS, MINUTES, HOURS, DAY, DATE, MONTH, YEARS and CENTURY YEAR 2000 COMPLIANT SOFTWARE CLOCK CALIBRATION AUTOMATIC SWITCH-OVER and DESELECT (external crystal controlled). Eigth bytes of the RAM are used for the clock/calendar function and are Address Input / Output SCL Serial Clock V BAT Battery Supply Voltage V CC Supply Voltage V SS Ground Table www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6100-v2.htm |
STMicroelectronics | 14/06/1999 | 22.57 Kb | HTM | 6100-v2.htm |
| . Clock Calibration For example, a reading of 512.01024 Hz would indicate a +20 ppm oscillator frequency Format M41T11 M41T11 M41T11 M41T11 512 bit (64b x8) Serial Access TIMEKEEPER [ SRAM March 1999 1/15 2.0V to 5.5V SUPPLY SOFTWARE CLOCK CALIBRATION AUTOMATIC SWITCH-OVER and DESELECT CIRCUITRY I 2 C BUS COMPATIBLE 56 BYTES of for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and / Output Driver SDA Serial Data Address Input / Output SCL Serial Clock V BAT Battery Supply Voltage V CC www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6103-v2.htm |
STMicroelectronics | 14/06/1999 | 22.71 Kb | HTM | 6103-v2.htm |
| . Clock Calibration For example, a reading of 512.01024 Hz would indicate a +20 ppm oscillator frequency Format M41T11 M41T11 M41T11 M41T11 512 bit (64b x8) Serial Access TIMEKEEPER [ SRAM March 1999 1/15 2.0V to 5.5V SUPPLY SOFTWARE CLOCK CALIBRATION AUTOMATIC SWITCH-OVER and DESELECT CIRCUITRY I 2 C BUS COMPATIBLE 56 BYTES of for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and / Output Driver SDA Serial Data Address Input / Output SCL Serial Clock V BAT Battery Supply Voltage V CC www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6103-v1.htm |
STMicroelectronics | 02/04/1999 | 22.75 Kb | HTM | 6103-v1.htm |
| 13. Clock Calibration 11/15 M41T00 M41T00 M41T00 M41T00 AI00999 AI00999 AI00999 AI00999 -160 0 10 20 30 40 50 60 70 Frequency (ppm) Temperature [ March 1999 1/15 2.0V to 5.5V SUPPLY VOLTAGE COUNTERS for SECONDS, MINUTES, HOURS, DAY, DATE, MONTH, YEARS and CENTURY YEAR 2000 COMPLIANT SOFTWARE CLOCK CALIBRATION AUTOMATIC SWITCH-OVER and DESELECT (external crystal controlled). Eigth bytes of the RAM are used for the clock/calendar function and are / Output SCL Serial Clock V BAT Battery Supply Voltage V CC Supply Voltage V SS Ground Table 1. Signal www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6100-v1.htm |
STMicroelectronics | 02/04/1999 | 22.6 Kb | HTM | 6100-v1.htm |
| 2000 M41T00 M41T00 M41T00 M41T00 Serial Access TIMEKEEPER [ n 2.0V to 5.5V SUPPLY VOLTAGE n COUNTERS for SECONDS, MINUTES, HOURS, DAY, DATE, MONTH, YEARS and CENTURY n YEAR 2000 COMPLIANT n SOFTWARE CLOCK crystal controlled). Eight bytes of the RAM are used for the clock/calendar function and are configured SCL Serial Clock V BAT Battery Supply Voltage V CC Supply Voltage V SS Ground M41T00 M41T00 M41T00 M41T00 2 Input or Output Voltages -0.3 to 7 V V CC Supply Voltage -0.3 to 7 V I O Output Current 20 mA P www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6100.htm |
STMicroelectronics | 20/10/2000 | 25.49 Kb | HTM | 6100.htm |
| 13. Clock Calibration 11/15 M41T56 M41T56 M41T56 M41T56 AI00999 AI00999 AI00999 AI00999 -160 0 10 20 30 40 50 60 70 Frequency (ppm) Temperature SOFTWARE CLOCK CALIBRATION AUTOMATIC POWER-FAIL DETECT and SWITCH CIRCUITRY I 2 C BUS COMPATIBLE 56 BYTES for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and / Output Driver (Open Drain) SDA Serial Data Address Input / Output SCL Serial Clock V BAT Battery Supply 7 V I O Output Current 20 mA P D Power Dissipation 0.25 W Note: Stresses greater than those www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6104-v2.htm |
STMicroelectronics | 14/06/1999 | 22.79 Kb | HTM | 6104-v2.htm |
| 13. Clock Calibration 11/15 M41T56 M41T56 M41T56 M41T56 AI00999 AI00999 AI00999 AI00999 -160 0 10 20 30 40 50 60 70 Frequency (ppm) Temperature SOFTWARE CLOCK CALIBRATION AUTOMATIC POWER-FAIL DETECT and SWITCH CIRCUITRY I 2 C BUS COMPATIBLE 56 BYTES for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and / Output Driver SDA Serial Data Address Input / Output SCL Serial Clock V BAT Battery Supply Voltage V CC V I O Output Current 20 mA P D Power Dissipation 0.25 W Note: Stresses greater than those listed www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6104-v1.htm |
STMicroelectronics | 02/04/1999 | 22.81 Kb | HTM | 6104-v1.htm |