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JP24

Catalog Datasheet MFG & Type PDF Document Tags

jp16

Abstract: JP15 CS6X 34 25 JP25 D0 183 121 JP24 D1 184 122 JP24 D10 193 131 JP24 © Fujitsu Microelectronics Europe GmbH - 11 - UG-910004-11 STARTERKITMB91360-ADA160 , Number MB91360 Starter Kit Pin D11 194 132 JP24 D12 195 133 JP24 D13 196 134 JP24 D14 107 135 JP24 D15 200 136 JP24 D16 201 139 JP24 D17 202 140 JP24 D18 203 141 JP24 D19 204 142 JP24 D2
Fujitsu
Original
NQPACK160SB jp16 JP15 JP24 d0183 d1184 MB2197-01 MB2197-10 MB2197-120 MB91FV360G MB2197-127 MB91F362G

JP24

Abstract: APEX 20ke development board sram pin assignments _0 AP13 JP24-32 GND N.C. JP24-3 I/OB_2 AP14 JP24-33 I/OB_41 AR14 JP24-4 , JP24-6 I/OB_3 AL20 JP24-36 GND N.C. JP24-7 I/OB_5 AL21 JP24-37 I/OB_47 AR16 JP24-8 GND N.C. JP24-38 I/OB_48 AN16 JP24-9 I/OB_7 AL22 JP24-39 I , _12 AP22 JP24-44 GND N.C. JP24-15 I/OB_16 AP24 JP24-45 I/OB_59 AR23 JP24-16 , JP24-18 I/OB_18 AM16 JP24-48 GND N.C. JP24-19 I/OB_22 AP26 JP24-49 I/OB
Altera
Original
EPC16 APEX 20ke development board sram pin assignments EP20K200EBC652-1X ob35 E22/6/BC237/238/239/EPC16/TL7660IDGKRG4-datasheet JP24-12 EP20K200E EP20K200E-1X 40-MH 125-MH RS-232 800-EPLD

oB41

Abstract: JP24 _2 AP14 JP24-33 I/OB_41 AR14 JP24-4 GND N.C. JP24-34 I/OB_42 AN14 JP24-5 , . JP24-7 I/OB_5 AL21 JP24-37 I/OB_47 AR16 JP24-8 GND N.C. JP24-38 I/OB_48 AN16 JP24-9 I/OB_7 AL22 JP24-39 I/OB_50 AR20 JP24-10 I/OB_6 AP16 JP24-40 , _16 AP24 JP24-45 I/OB_59 AR23 JP24-16 GND N.C. JP24-46 I/OB_60 AN23 JP24-17 , . JP24-19 I/OB_22 AP26 JP24-49 I/OB_65 AR25 JP24-20 GND N.C. JP24-50 I/OB
Altera
Original
oB41 PFR20100 JP1-43 JP23-39 OT58 OT31 EP20K1500E-1X DSP-BOARD/A15E 65-MH

MB91F362

Abstract: JP24 33 JP25 CS6X 34 JP25 D0 183 JP24 D1 184 JP24 D10 193 JP24 D11 194 JP24 D12 195 JP24 D13 196 JP24 D14 107 JP24 D15 200 JP24 D16 201 JP24 D17 202 JP24 D18 203 JP24 D19 204 JP24 D2 185 JP24 D20 205 JP24 D21 206 JP24 D22 207 JP24 D23 208 JP24 D24 1 JP24 D25 2 JP24 D26 3 JP24 D27 4 JP24 D28 5 JP24
Fujitsu
Original
STARTERKITMB91360-ADA120 MB91F369G MB91F362 MB91360G MB91F365 MB91F369 MB90F360 UG-910002-15 MB91F365G/F366G FR360-PROBE-120 MB91F365G/366G/367G/368G/376G FR360-PROBE-160

PSIA-2722

Abstract: JP24 JP24 J3 Audio Precision PCM PCM JP24 PCM PSIA-2722 LM49370 / 4 PSIA-2722 2 I , 1 MCLK MCLK JP23 1 5 JP11 LM49370 2 IS JP24 10 12 GPIO1 GPIO2 LM49370 LM49370
National Semiconductor
Original
AN-1609 PSIA2722 1609 2000/NT/XP CSP-9-111C2 CSP-9-111S2

JP24

Abstract: EPA-201DA-05 header also drive headers JP20, JP21, and JP24. Similarly, the Stratix pins that drive the JP7 header , also connected to JP7. Similarly, the Stratix pins which drive JP8 also drive JP20, JP21, and JP24. , ) Altera Expansion Prototype Connector (JP20, JP21, JP24) 14-bit, 165 MHz D/A Converters (U21 , , JP24 FPDP Footprint Expansion J4 Prototyping area Expansion N/A Description The , 59 - - CLK_EVALIO_IN44 P25 (CLK1p) Digital I/O Headers (JP20, JP21, JP24, JP8) Table 27
Altera
Original
DSP-BOARD/S25 EPM7064 EPA-201DA-05 201DA0 TID14 - 45 PROTO24 EP1S25 165-MH 80-MH

RCA 945

Abstract: AK4114SW2 MCLK XTL DIR EXT JP22 4114_MCKI JP18 BICK_SEL DIR 4040 JP24 SDTI_SEL DIR JP19 , ] JP15 MCLK XTL DIR EXT JP19 PHASE THR INV JP21 LRCK_SEL DIR 4040 JP24 , ] JP15 MCLK XTL DIR EXT JP19 PHASE THR INV JP21 LRCK_SEL DIR 4040 JP24 , JP21 LRCK_SEL INV DIR 4040 JP24 SDTI_SEL DIR JP31 XTE ADC JP106 SDTO , INV DIR JP31 XTE JP24 SDTI_SEL DIR 4040 ADC JP106 SDTO SDTO1 SDTO2
Asahi Kasei Microdevices
Original
AKD4691-A AK4114 AKD4691 RCA 945 AK4114SW2 TP137 AK4691R AKD469116 AK4691

Automotive HSD Connector

Abstract: H2959CT-ND . - PDB - SSC[2:0] - OS[2:0] JP24 and VR3 ID[x] J3 and JP23 I2C Interface , Outputs Connect JP24 to VSS to have the default device PHY address (h'DC). Connect JP24 to VR3; then , ,JP17, JP18,JP19,JP20,JP21,JP22, JP24 11 1 J2 mini USB 5pin 12 1 J3 IDC1X4 13
National Semiconductor
Original
MHC20K-ND N2520-6002RB J658-ND 67-1879-1-ND LTST-C191KGKT Automotive HSD Connector H2959CT-ND SMD resistors 10k ohm 0402 C1005X5R1E104K N2520-6002-RB DS99R124Q-EVK RGB666 AEC-Q100 610NM 1/16W 1/10W

7_seven segment

Abstract: TID14 - 45 headers JP20, JP21, and JP24. Similarly, the Stratix pins that drive the JP7 header also drive headers , JP7. Similarly, the Stratix pins which drive JP8 also drive JP20, JP21, and JP24. See Table 28 and , ) SMA Connector Output from D/A 1 (J2) Altera Expansion Prototype Connector (JP20, JP21, JP24 , Altera Expansion Prototype Header Expansion JP20, JP21, JP24 FPDP Footprint Expansion J4 , Interfaces Digital I/O Headers (JP20, JP21, JP24, JP8) Table 29 lists the pin-outs for digital I/O
Altera
Original
7_seven segment circuit diagram for seven segment display in fpga EP1S80B956C6 mictor connector board data Seven Segment Display texas instruments IOU21 EP1S80 DSP-BOARD/S80

Automotive HSD Connector

Abstract: ERJ2GEJ0R00X for detail information. Connect JP24 to VSS to have the default device PHY address (h'DC). Connect JP24 to VR3; then adjust VR3 value to select desired device PHY address. See datasheet for detail information. JP24 and VR3 ID[x] J3 and JP23 I2C Interface Connect JP23 if the I2C power is not , ,JP19,JP20,JP21,JP22, JP24 11 1 J2 mini USB 5pin 12 1 J3 IDC1X4 13 2 J4 , JP24 1 2 3 VR3 IDx VSS C4 0.1uF 0 ohm_open RIN+ R24 0201 0 ohm_open RINR25 0201
National Semiconductor
Original
ERJ2GEJ0R00X smd capacitor 1uf 50v 0402 ERJ-2GEJ0R00X SVR100K ROSENBERGER hsd ROSENBERGER* HSD DS90UR908Q-EVK RGB888

94HBB08RAT

Abstract: JP24 J44 CS J42, J43 SDA, SDC JP18, JP19 VOD_CRL JP24, JP25, JP26 SD / LOCK /EN , JP19, Sets external resistor = 12K ohm for VO = 2000mVpp Connect JP24 and JP26 to enable D3 Connect , header JP18, JP19, JP24, JP25, JP26 5 1X2 pin header JP21,JP22,JP42,JP43,JP44 4 1X3 pin , LTST-C155KGJSKT K2 YELLOW A2 K1 D3 JP24 1 JP25 1 JP26 1 2 O O 2 O O 2 O O SD LOCK 220
National Semiconductor
Original
DS34RT5110-EVKH LP3965 94HBB08RAT PCA9517D power jack Jack 5V DC Power Cable HDMI TO VGA 48 24 DS34RT5110 4RT5110-EVKH

vga to hdmi adapter

Abstract: JP24 J44 CS J42, J43 SDA, SDC JP18, JP19 VOD_CRL JP24, JP25, JP26 SD / LOCK /EN , resistor = 12K ohm for VO = 2000mVpp Connect JP24 and JP26 to enable D3 Connect JP25 to disable the , 1 DC Power Jack 1.8 mm J22, J23 2 1 pin header JP18, JP19, JP24, JP25, JP26 5 , A2 K1 D3 JP24 1 JP25 1 JP26 1 O O O O O O SD LOCK 2 2 2 220 R25 EN
National Semiconductor
Original
DS22EV5110-EVKH vga to hdmi adapter HDMI to VGA Cable LP3965 3.3V 1500mA DS22EV5110SQ DS22EV5110

usb optical mouse hp

Abstract: HP 4371 be set to the following. JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP24 SDTI_SEL JP19 , LRCK_SEL JP24 SDTI_SEL JP19 PHASE JP22 4114_MCKI DIR EXT DIR 4040 DIR 4040 , be set as the following. JP14 EXT JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP24 , JP18 BICK_SEL JP21 LRCK_SEL JP24 SDTI_SEL JP19 PHASE DIR EXT DIR 4040 DIR , JP21 LRCK_SEL JP24 SDTI_SEL JP19 PHASE JP22 4114_MCKI DIR EXT DIR 4040 DIR
Asahi Kasei Microdevices
Original
AKD4673-A AK4673 AKD4673 usb optical mouse hp HP 4371 DATASHEET OF pll 4040 KM086000 74AVC8T245 74LVC07
Abstract: J23 GND GND J44 CS J42, J43 SDA, SDC JP18, JP19 VOD_CRL JP24, JP25, JP26 , JP19, Sets external resistor = 12K ohm for VO = 2000mVpp Connect JP24 and JP26 to enable D3 Connect , pin header JP18, JP19, JP24, JP25, JP26 5 1X2 pin header JP21,JP42,JP43,JP44 4 1X3 , Green A1 2 1 LOCK SD LTST-C155KGJSKT K2 YELLOW A2 K1 D3 JP24 1 JP25 1 JP26 Texas Instruments
Original

12pin HEADER

Abstract: TP127 BICK_SEL DIR 4040 JP24 SDTI_SEL DIR JP19 PHASE THR INV JP21 LRCK_SEL DIR , LRCK_SEL DIR 4040 JP24 SDTI_SEL DIR JP31 XTE ADC JP106 SDTO SDTO1 SDTO2 * When , DIR 4040 JP24 SDTI_SEL DIR JP31 XTE ADC JP106 SDTO SDTO1 SDTO2 * When SDTO2 , 4040 JP24 SDTI_SEL DIR JP31 XTE ADC JP106 SDTO SDTO1 SDTO2 * When SDTO2 data is , 4040 JP24 SDTI_SEL DIR JP31 XTE ADC JP106 SDTO SDTO1 SDTO2 * When SDTO2 data is
Asahi Kasei Microdevices
Original
12pin HEADER TP127 CN101 tp132 CN103 mrf 945 KM089100 4114-SDTO

AK4953

Abstract: AKD4953-A JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 , JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 , THR INV JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR 4040 ADC *When a termination (51 , INV JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR 4040 ADC Supplied Master Clock (MCKI , EXT DIR 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR
Asahi Kasei Microdevices
Original
AKD4953-A AK4953 4953b r38104 mas 6 rca AK4118 AK4118A KM101802

68 pin fujitsu microcontroller

Abstract: lm317 JP21a JP21c JP22a JP22c JP23 JP24 JP25 JP26 JP27a JP27c JP28a JP28c JP29 JP30 JP31 JP32 , JP12 JP13 JP14 JP15 JP16 JP17 JP18 JP19 JP20 JP21a JP21c JP22a JP22c JP23 JP24 JP25 , JP23 JP24 JP25 JP26 JP27a JP27c JP28a JP28c JP29 JP30 JP31 JP32 JP33 JP34 JP35 JP36 , JP14 JP15 JP16 JP17 JP18 JP19 JP20 JP21a JP21c JP22a JP22c JP23 JP24 JP25 JP26 JP27a , . JP7 This jumper selects whether a 5V or 3V3 system reset is required. JP24 open this jumper
Fujitsu
Original
MC-16LX FLASH-CAN-100P-340 MB90800 MB90945 68 pin fujitsu microcontroller lm317 PHU regulator JP28a JP36 MB90F34x FMEMCU-UG-900003-21 UG-900003-21
Abstract: CONFIG Configuration select. See datasheet for detail information. Connect JP24 to VSS to have the default device PHY address (hâ'™DC). Connect JP24 to VR3; then adjust VR3 value to select desired device PHY address. See datasheet for detail information. JP24 and VR3 ID[x] J3 and JP23 I2C , ,JP10,JP12, JP13,JP14,JP15,JP16,JP17, JP18,JP19,JP20,JP21,JP22, JP24 11 1 J2 mini USB 5pin , : component side (TOP) 1 2 JP24 1 2 3 VR3 IDx VSS C4 0.1uF 0 ohm_open RIN+ R24 0201 0 Texas Instruments
Original
Abstract: INV JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR 4040 JP22 4114_MCKI ADC , JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR 4040 ADC Supplied Master Clock (MCKI) from J11 , 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR 4040 ADC , 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 SDTI_SEL DIR DIR 4040 ADC , JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 Asahi Kasei Microdevices
Original
Abstract: . JP name JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 MCLK JP21 , (4114LRCK_SEL) JP24 MCLK JP21 BICK State Short Open Open Open JP name JP32(BICK_SEL) JP33 , JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 MCLK JP21 BICK , the following. JP name JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 , ) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 MCLK DIR EXT JP21 BICK DIR Asahi Kasei Microdevices
Original
AKD4647-A AK4647 AKD4647 KM098600 TA48033F 74LVC541
Abstract: be set to the following. JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP24 SDTI_SEL JP19 , LRCK_SEL JP24 SDTI_SEL JP19 PHASE JP22 4114_MCKI DIR EXT DIR 4040 DIR 4040 , be set as the following. JP14 EXT JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP24 , JP18 BICK_SEL JP21 LRCK_SEL JP24 SDTI_SEL JP19 PHASE DIR EXT DIR 4040 DIR , JP21 LRCK_SEL JP24 SDTI_SEL JP19 PHASE JP22 4114_MCKI DIR EXT DIR 4040 DIR austriamicrosystems AG
Original
AS5040 AS5245 AS5245-AB- AS5145

KB910Q

Abstract: FW82801FBM ) Altera Expansion Prototype Connector (JP20, JP21, JP24) 14-bit, 165 MHz D/A Converters (U21 , header also drive headers JP20, JP21, and JP24. Similarly, the Stratix pins that drive the JP7 header , , JP24 FPDP Footprint Expansion J4 Prototyping area Expansion N/A Description The , also connected to JP7. Similarly, the Stratix pins which drive JP8 also drive JP20, JP21, and JP24 , 59 - - CLK_EVALIO_IN44 P25 (CLK1p) Digital I/O Headers (JP20, JP21, JP24, JP8) Table 27
-
Original
LA-2601 SP093MX0000 ML1220T10 KB910Q FW82801FBM KB910Q B4 FBM-L11-160808-800LMT BO001 BO002 BO003 BO004 BO005 451336BO001

DMC1500

Abstract: bldc motor control source code for TMS320 Jumper 2 pol closed H 21 JP24 RESET Jumper 2 pol closed J 23 JP25 CAN A (TXD , selects whether the DTR/RTS line from UART"A" or UART"B" will generate a system-reset. JP24 open , / RTS "B") JP24 (Main Reset) JP35 (Polarity) Setting Description 1-2 DTR of UART0 is , inversion for the DTR/RTS signal 2-3 Polarity inversion for the DTR/RTS signal Default: JP24 = , can be used for non-maskable interrupt JP23: One Button can be used for break JP24: One
Spectrum Digital
Original
DMC1500 bldc motor control source code for TMS320 motor control use TMS320LF2407 24vdc pwm brushless motor driver schematics tms320f240 ezdsp igbt reference schematics

VG64

Abstract: MB91F364 JP6 JP8 JP9 JP10 JP11 JP12 JP13 JP14 JP15 JP16 JP17 JP18 JP20 JP21 JP22 JP23 JP24 , . JP24 open this jumper if no external Reset shall be generated. In this case only the internal reset , ) JP5 (DTR / RTS "B") JP24 (Main Reset) JP35 (Polarity) Setting Description 1-2 DTR of , signal Default: JP24 = closed, JP4, JP5 and JP35 are not set By default, the external Reset , ) JP24: One Button can be used for manually reset Jumper JP12 (INT10) JP14 (INT11) JP16 (TIN1
Fujitsu
Original
MB91F364 VG64 PJ 67 B6 B2769 B1044 c2979 FMEMCU-UG-910001-11 MB91364 UG-910001-11 STARTERKITMB91364 FR360-PROBE-364

B-28

Abstract: J23 GND GND J44 CS J42, J43 SDA, SDC JP18, JP19 VOD_CRL JP24, JP25, JP26 , JP19, Sets external resistor = 12K ohm for VO = 2000mVpp Connect JP24 and JP26 to enable D3 Connect , pin header JP18, JP19, JP24, JP25, JP26 5 1X2 pin header JP21,JP42,JP43,JP44 4 1X3 , Green A1 2 1 LOCK SD LTST-C155KGJSKT K2 YELLOW A2 K1 D3 JP24 1 JP25 1 JP26
Fujitsu
Original
B-28 FMEMCU-UG-900005-12 FLASH-CAN-64P-350 UG-900005-12 MB90350 MB2147-01 MB2147-20

23K18

Abstract: MB91V460 JP23 SW ADTG Jumper 2 pol closed H 21 JP24 RESET Jumper 2 pol closed J 23 , " will generate a system-reset. JP24 open this jumper if no external Reset shall be generated. In , JP3 (DTR / RTS "A") JP4 (UART"A"/"B") JP24 (Main Reset) JP35 (Polarity) Setting , signal 2-3 Polarity inversion for the DTR/RTS signal Default: JP24 = closed (JP3, JP4 and JP35 , ) JP24: One Button can be used for manually reset Jumper JP12 (INT4) JP14 (INT5) JP16 (TIN0
Fujitsu
Original
MB91460 23K18 MB91V460 UG 9C jumper 2 pin FR60 LQFP120 FMEMCU-UG-910026-13 SK-91465K-120PMT SJ/T11363-2006

90F387

Abstract: female PCB connector 9pin d-sub (U10) is as follows. JP23 BICKB JP24 LRCKB (open) (open) JP21 SDTIB_SEL DIR GND (GND) Figure 25. JP23 (BICKB), JP24 (LRCKB), JP21 (SDTIB_SEL) 7-1-3. Setting of DIP switch SW2 , of interface signal of PORTB: AK4114 (U10) is as follows. JP23 BICKB JP24 LRCKB (open) (open) JP21 SDTIB_SEL DIR GND (GND) Figure 28. JP23 (BICKB), JP24 (LRCKB), JP21 (SDTIB_SEL , : AK4114 (U10) is as follows. JP23 BICKB JP24 LRCKB (open) (open) JP21 SDTIB_SEL DIR
Fujitsu
Original
90F387 female PCB connector 9pin d-sub 4-8P27 RS232-transceiver P30-33 MB90V495 FMEMCU-UG-900002-12 FLASH-CAN-48P UG-900002-12 FLASH-CAN-48P-M26 MB2132-466 FPT-48P-M26

MINI Jack 4PIN

Abstract: da0221 J44 CS J42, J43 SDA, SDC JP18, JP19 VOD_CRL JP24, JP25, JP26 SD / LOCK /EN , JP19, Sets external resistor = 12K ohm for VO = 2000mVpp Connect JP24 and JP26 to enable D3 Connect , header JP18, JP19, JP24, JP25, JP26 5 1X2 pin header JP21,JP22,JP42,JP43,JP44 4 1X3 pin , LTST-C155KGJSKT K2 YELLOW A2 K1 D3 JP24 1 JP25 1 JP26 1 2 O O 2 O O 2 O O SD LOCK 220
Asahi Kasei Microsystems
Original
AKD4683-A AK4683 AK4589 MINI Jack 4PIN da0221 for 74hc04 optical input to rca 5.1 output circuit 40Hz40kHz JP13 2000/XP 95/98/ME 74VHC04
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