NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 39A104 JEDEC standard JESD8-5 compatible. For best practices recommendations, refer to the Cypress application ... | Original |
33 pages, |
JESD85 CY7C1482BV33-200BZI AN1064 CY7C1480BV33 CY7C1482BV33 CY7C1486BV33 36/4M 18/1M CY7C1480BV33 abstract |
|
|||
| Abstract: CY7C1440AV33-250BZXC +2.5 or +3.3V supply. All inputs and outputs are JEDEC-standard JESD8-5-compatible. Selection Guide ... | Original |
30 pages, |
CY7C1446AV33 CY7C1442AV33 CY7C1440AV33 36/2M 18/512K CY7C1440AV33 abstract |
|
|||
| Abstract: either a +2.5V or +3.3V supply. All inputs and outputs are JEDEC-standard JESD8-5-compatible ... | Original |
16 pages, |
CY7C1329H-166AXC CY7C1329H CY7C1329H abstract |
|
|||
| Abstract: JEDEC-standard JESD8-5-compatible. Logic Block Diagram ADDRESS REGISTER A0, A1, A A[1:0] MODE BURST ... | Original |
17 pages, |
CY7C1338G CY7C1338G abstract |
|
|||
| Abstract: JESD8-5-compatible. Selection Guide Description 133 MHz 100 MHz Unit Maximum Access Time 6.5 8.5 ... | Original |
30 pages, |
CY7C1383F CY7C1381F CY7C1381D AN1064 CY7C1381D/CY7C1381F CY7C1383D/CY7C1383F 36/1M CY7C1381D/CY7C1381F abstract |
|
|||
| Abstract: All inputs and outputs are JEDEC standard JESD8-5 compatible. Selection Guide 250 MHz 200 MHz ... | Original |
31 pages, |
CY7C1486V33 CY7C1482V33 CY7C1480V33 AN1064 36/4M 18/1M CY7C1480V33 abstract |
|
|||
| Abstract: inputs and outputs are JEDEC-standard JESD8-5-compatible. Selection Guide Description 133 MHz ... | Original |
31 pages, |
CY7C1447AV33 CY7C1443AV33 CY7C1441AV33 36/2M 18/512K CY7C1441AV33 abstract |
|
|||
| Abstract: +2.5 or +3.3V power supply. All inputs and outputs are JEDEC-standard and JESD8-5-compatible ... | Original |
32 pages, |
CY7C1382F CY7C1382D CY7C1380F CY7C1380D AN1064 36/1M CY7C1380D abstract |
|
|||
| Abstract: JESD8-5-compatible. ยท Available in lead-free 100-Pin TQFP package, lead-free and non-lead-free 119-Ball BGA ... | Original |
17 pages, |
CY7C1339G CY7C1339G abstract |
|
|||
| Abstract: a +2.5 or +3.3V supply. All inputs and outputs are JEDEC-standard JESD8-5-compatible. Selection ... | Original |
20 pages, |
CY7C1368C CY7C1368C abstract |
|
|||
| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
|||||
| 74LVC1G386 74LVC1G386 74LVC1G386 74LVC1G386_1 Product information page 74LVC1G386 74LVC1G386 74LVC1G386 74LVC1G386; 3-input EXCLUSIVE-OR gate General info The 74LVC1G386 74LVC1G386 74LVC1G386 74LVC1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature a www.datasheetarchive.com/files/philips/pip/74lvc1g386_1.html |
Philips | 06/06/2005 | 4.33 Kb | HTML | 74lvc1g386_1.html |
| 74LVC2G126 74LVC2G126 74LVC2G126 74LVC2G126_4 Product information page 74LVC2G126 74LVC2G126 74LVC2G126 74LVC2G126; Dual bus buffer/line driver; 3-state General info The 74LVC2G126 74LVC2G126 74LVC2G126 74LVC2G126 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. T www.datasheetarchive.com/files/philips/pip/74lvc2g126_4.html |
Philips | 06/06/2005 | 4.07 Kb | HTML | 74lvc2g126_4.html |
| 74LVC1G17 74LVC1G17 74LVC1G17 74LVC1G17_4 Product information page 74LVC1G17 74LVC1G17 74LVC1G17 74LVC1G17; Single Schmitt-trigger buffer General info The 74LVC1G17 74LVC1G17 74LVC1G17 74LVC1G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This featur www.datasheetarchive.com/files/philips/pip/74lvc1g17_4.html |
Philips | 06/06/2005 | 3.66 Kb | HTML | 74lvc1g17_4.html |
| 74LVC1G08 74LVC1G08 74LVC1G08 74LVC1G08_5 Product information page 74LVC1G08 74LVC1G08 74LVC1G08 74LVC1G08; Single 2-input AND gate General info The 74LVC1G08 74LVC1G08 74LVC1G08 74LVC1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features allow www.datasheetarchive.com/files/philips/pip/74lvc1g08_5.html |
Philips | 06/06/2005 | 4.09 Kb | HTML | 74lvc1g08_5.html |
| 74ALVC04 74ALVC04 74ALVC04 74ALVC04_2 Product information page 74ALVC04 74ALVC04 74ALVC04 74ALVC04; Hex inverter General info The 74ALVC04 74ALVC04 74ALVC04 74ALVC04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise www.datasheetarchive.com/files/philips/pip/74alvc04_2.html |
Philips | 15/06/2005 | 6.89 Kb | HTML | 74alvc04_2.html |
| 74LVC2G34 74LVC2G34 74LVC2G34 74LVC2G34_2 Product information page 74LVC2G34 74LVC2G34 74LVC2G34 74LVC2G34; Dual buffer gate General info The 74LVC2G34 74LVC2G34 74LVC2G34 74LVC2G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the www.datasheetarchive.com/files/philips/pip/74lvc2g34_2.html |
Philips | 06/06/2005 | 4 Kb | HTML | 74lvc2g34_2.html |
| 74LVC3G07 74LVC3G07 74LVC3G07 74LVC3G07_3 Product information page 74LVC3G07 74LVC3G07 74LVC3G07 74LVC3G07; Triple buffer with open-drain output General info The 74LVC3G07 74LVC3G07 74LVC3G07 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. This feat www.datasheetarchive.com/files/philips/pip/74lvc3g07_3.html |
Philips | 06/06/2005 | 3.87 Kb | HTML | 74lvc3g07_3.html |
| 74LVC1G19 74LVC1G19 74LVC1G19 74LVC1G19_2 Product information page 74LVC1G19 74LVC1G19 74LVC1G19 74LVC1G19; 1-of-2 decoder/demultiplexer General info The 74LVC1G19 74LVC1G19 74LVC1G19 74LVC1G19 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features a www.datasheetarchive.com/files/philips/pip/74lvc1g19_2.html |
Philips | 06/06/2005 | 4.22 Kb | HTML | 74lvc1g19_2.html |
| 74ALVC541 74ALVC541 74ALVC541 74ALVC541_1 Product information page 74ALVC541 74ALVC541 74ALVC541 74ALVC541; Octal buffer/line driver; 3-state General info The 74ALVC541 74ALVC541 74ALVC541 74ALVC541 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC541 74ALVC541 74ALVC541 74ALVC541 is an octal non-inverting buffer/line driver www.datasheetarchive.com/files/philips/pip/74alvc541_1-v1.html |
Philips | 15/06/2005 | 7.18 Kb | HTML | 74alvc541_1-v1.html |
| 74LVC2G86 74LVC2G86 74LVC2G86 74LVC2G86_3 Product information page 74LVC2G86 74LVC2G86 74LVC2G86 74LVC2G86; Dual 2-input exclusive-OR gate General info The 74LVC2G86 74LVC2G86 74LVC2G86 74LVC2G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature a www.datasheetarchive.com/files/philips/pip/74lvc2g86_3.html |
Philips | 06/06/2005 | 3.75 Kb | HTML | 74lvc2g86_3.html |