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J941

Catalog Datasheet MFG & Type PDF Document Tags

USART 8251

Abstract: 8251 pin diagram test circuit is the dynamic load of a Teradyne J941. 3-36 Powered by ICminer.com Electronic-Library , Teradyne J941 tester. Measurement of typical signals generated by the J941 showed tR = tF = 5 ns. 5
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USART 8251 8251 pin diagram 8251 microprocessor block diagram block diagram 8251 J941 8251 8251/A APX86 WF006490 TC003851

5962-8754801

Abstract: Rise and Fall times are controlled by the Teradyne J-941 tester. Measurement of typical signals generated by the J-941 showed tp = tp = 5 ns. 4. Test condition: C l = 100 pF ± 20 pF, guaranteed by Teradyne J941 DIB. 5. This recovery time is for Mode Initialization only. Write Data is allowed only
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5962-8754801 WF006190 TC002031
Abstract: TC003851 This test circuit is the dynamic load of a Teradyne J941. 3-36 over operating range (for , Rise and Fall times are controlled by the Teradyne J941 tester. Measurement of typical signals generated by the J941 tR = tp = 5 ns. Sampling pulse is internal and not tested; guaranteed by design -
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8086 minimum mode and maximum mode

Abstract: timing diagram of 8086 maximum mode to T2 state (8 ns into T3). Not tested; these specs are controlled by the Teradyne J941 tester. V cc , controlled by the Teradyne J941 tester. VCC = 4.5 V, 5.5 V VjH - 2.4 V V| l " -45 V V|HC " V V ilc - -25 V V0 , to T2 state (8 ns into T3). Not tested; these specs are controlled by the Teradyne J941 tester. Vcc , J941 tester. V cc * 4.5 V, 5.5 V V|H - 2.4 V V|L - .45 V V|HC 4.3 V V ilc - -25 V V o h - 1.6 V Vol "
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8086 minimum mode and maximum mode timing diagram of 8086 maximum mode 8086 microprocessor architecture diagram timing diagram of 8086 minimum mode max and min mode 8086 8086 microprocessor APPLICATIONS

8251 IC FUNCTION

Abstract: block diagram 8251 Teradyne J941. 3-36 8251/Am9551 SWITCHING CHARACTERISTICS over operating range (for APL Products , order. 4. Clock Rise and Fall times are controlled by the Teradyne J941 tester. Measurement of typical signals generated by the J941 showed tp - tF - 5 ns. 5. Sampling pulse is internal and not tested
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8251 IC FUNCTION IC 8251 block diagram Block Diagram of 8251 usart ic 8251 processor 8251 IC Applications 8251 usart

8251 microprocessor block diagram

Abstract: operation of 8251 microprocessor the Teradyne J-941 tester. Measurement of typical signals generated by the J-941 showed tR = tp = 5 ns. 4. Test condition: Cl = 100 pF ± 20 pF, guaranteed by Teradyne J941 DIB. 5. This recovery time is
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operation of 8251 microprocessor 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER 8251 microprocessor applications

8251A programmable communication interface

Abstract: 8251 microprocessor block diagram are controlled by the Teradyne J-941 tester. Measurement of typical signals generated by the j-»4i snowed ir = tp = 5 ns. Test condition: CL= 100 pF ± 20 pF, guaranteed by Teradyne J941 DIB This
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8251A programmable communication interface block diagram 8251A microprocessor 8251 applications 8251 usart applications AMD 8251 teradyne tester test system

internal block diagram of 8088

Abstract: 8088 microprocessor circuit diagram T3). Not tested; these specs are controlled by the Teradyne J941 tester. V cc 4.5 V, 5.5 V Vjh - 2.4 , T3). Not tested; these specs are controlled by the Teradyne J941 tester. VCC - 4.5 V, 5.5 V V|H - 2.4 , T3). Not tested; these specs are controlled by the Teradyne J941 tester. V c c " 4.5 V, 5.5 V V(h -
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internal block diagram of 8088 8088 microprocessor circuit diagram 8088 bus structure 8088 structure 8088 microprocessor 16 bit 16 bit 8088 structure

Transistor J550

Abstract: J965 49.9 Zsource W 5.14 - j9.41 7.59 - j9.88 8.90 - j9.65 Zload W 1.56 - j5.24 1.58 - j5.37 1.57 - j5 , Vdc, IDQA = 550 mA f MHz 1880 1900 1920 Max Eff. (1) % 65.1 64.6 64.6 Zsource W 5.14 - j9.41 7.59 - j9 , Level f (MHz) 1880 1900 1920 P1dB P1dB P1dB Zsource 5.14 - j9.41 7.59 - j9.88 8.90 - j9.65 Zload 1.65
Freescale Semiconductor
Original
Transistor J550 J965 CW12010T0050G CW12010T0050GBK ATC600F1R1BT250XT MRF8P20160H MRF8P20160HSR3 465H-02 NI-780S-4
Abstract: 98 49.9 5.14 - j9.41 1.56 - j5.24 1900 98 49.9 7.59 - j9.88 1.58 - j5 , Eff. (1) % Zsource ) Zload ) 1880 65.1 5.14 - j9.41 3.04 - j3.65 1900 , Level f (MHz) Zsource ) Zload ) 1880 P1dB 5.14 - j9.41 1.65 - j5.46 1900 Freescale Semiconductor
Original
MRF8P2160H MRF8P20160HR3 465M-01 NI-780-4

CW12010T0050GBK

Abstract: J965 1880 98 49.9 5.14 - j9.41 1.56 - j5.24 1900 98 49.9 7.59 - j9.88 1.58 - , MHz Max Eff. (1) % Zsource Zload 1880 65.1 5.14 - j9.41 3.04 - j3 , Compression Level f (MHz) Zsource Zload 1880 P1dB 5.14 - j9.41 1.65 - j5.46 1900
Freescale Semiconductor
Original
J546 mrf8p GCS351-HYB1900 ATC600F0R3BT250XT ATC600F2R4BT250XT RO4350B rogers

8253 amd

Abstract: 82C54-12/BJA , guaranteed by Teradyne J941 test equipment. 3-53
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82C54-2 8253 amd 82C54-12/BJA 8254 counter intel 8253 timer 82C54 10-MH 82C54-12 BD006111

ic 8255A

Abstract: 8255A programmable peripheral interface test circuit is the dynamic load of a Teradyne J941. SWITCHING TEST WAVEFORM XIÃ H. - TEST _
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ic 8255A 8255A programmable peripheral interface SMDID 8255A-5 5962-8757001 825SA

82C54

Abstract: J941 times are tested at 5 ns, guaranteed by Teradyne J941 test equipment. 3-53 Powered by ICminer.com
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8086 interval timer 8253 timer 8254 circuit Teradyne

5962-8757001

Abstract: 8255A programmable peripheral interface circuit is the dynamic load of a Teradyne J941. SWITCHING TEST WAVEFORM - TEST -PO INTS' AC testing
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BD003600

ta 8751h

Abstract: 8751H Time 20 ns *Not tested; these specs are controlled by the Teradyne J941, J983 tester
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8751H 8753H ta 8751h Z1P21 4kx8 eprom variable oscillator 8751H/8753H 8053AH LCL-185 CLCL-65

AMD 8051AH

Abstract: ns *Not tested; these specs are controlled by the Teradyne J941, J983 tester. 4-17 8751H
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AMD 8051AH 8051AH 12-MH 12ICLCL CLCL-133
Abstract: and fall times are tested at 5 ns, guaranteed by Teradyne J941 test equipment. 3-53 -
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CD026

Abstract: rip smd the dynamic load of a Teradyne J941. SWITCHING TEST INPUT/OUTPUT WAVEFORM DC See Section 6 of
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CD026 rip smd AM9519A 33c3 9519A

8751H

Abstract: 8753H Time 20 ns â'¢Not tested; these specs are controlled by the Teradyne J941, J983 tester
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CLCL-75 ICLCL-65 LCL-133

220uF 16V Electrolytic Capacitor smd

Abstract: 98 49.9 5.14 - j9.41 1.56 - j5.24 1900 98 49.9 7.59 - j9.88 1.58 - j5 , Eff. (1) % Zsource ) Zload ) 1880 65.1 5.14 - j9.41 3.04 - j3.65 1900 , Level f (MHz) Zsource ) Zload ) 1880 P1dB 5.14 - j9.41 1.65 - j5.46 1900
Nichicon
Original
220uF 16V Electrolytic Capacitor smd 2002/95/EC PCS1A330MCL1GS PCS1A560MCL9GS PCS1A680MCL1GS PCS1A121MCL1GS PCS1A151MCL9GS
Abstract: Teradyne J941 tester. 6. Vcc " 4.5 V, 5.5 V V|H - 2.4 V V|L - .45 V V|Hc - 4.3 V Vilc - 25 V V0H -1.6V Vol -
Original
PCK0E391MCO1GS PCK0E561MCO1GS PCK0E681MCO1GS PCK0E122MCO1GS PCK0E222MCO1GS PCK0G331MCO1GS

8086 interrupt vector table

Abstract: microprocessor 8086 Program relocation circuit is the dynamic load of a Teradyne J941. SWITCHING TEST WAVEFORM - TEST -PO INTS' AC testing
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8086 interrupt vector table microprocessor 8086 Program relocation 8086 manual 8086 timing diagram 8282/8283 latch used for 8086 tc 8066
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