ISL54406 TB363 AN1368 ISL54406EVAL1Z FN6578 1-888-INTERSIL ISL54406IRUZ-T - Datasheet Archive

 

Features The Intersil ISL54406 is a Dual SPST (Single Pole/Single Throw) switch that provides a very low distortion audio path

 

ISL54406 ISL54406 Features The Intersil ISL54406 ISL54406 is a Dual SPST (Single Pole/Single Throw) switch that provides a very low distortion audio path for a stereo headphone or high impedance line-in load. This path can be interrupted to provide >110dB of off-isolation for signal muting purposes into 32 or high impedance loads such as consumer entertainment system line-inputs, MP3 docking systems for powered speaker or automotive entertainment system in-line or cassette interfaces. Recovery from muting is instant even with very large DC blocking capacitors. · Single Supply Operation (VDD) . . . . +2.7V to +5.0V · Negative Signal Swing Capability . . . . . . . . . . . -1.5V · Low THD - THD+N at 1mW into 32 Load. . . . . . . . . 60dB · Audio Muting . . . . . . . . . . . . . . . . . . . . . . >110dB · Low Power Consumption. . . . . . 21µW with 3V supply · Low Power Shutdown Mode · 1.8V Logic Compatible The ISL54406 ISL54406 also has comprehensive Click and Pop elimination measures to prevent these artifacts from occurring in the load due to system power-up/powerdown, codec enable/disable, headphone hot plug in, and audio muting on/off situations. The Click and Pop elimination is effective into low and high impedance loads and requires no external timing components to deal with DC blocking capacitors placed between the single supply codec and the load. · Available in 10 Ld TDFN (3mmx3mm) or tiny 10 Ld (1.8mmx1.4mm) µTQFN Package · Pb-Free (RoHS Compliant) Applications · Consumer Entertainment Systems · MP3 and other Personal Media Players · Cellular/Mobile Phones The ISL54406 ISL54406 is available in a 10 Ld TDFN (3mmx3mm) or a tiny 10 Ld µTQFN (1.8mmx1.4mm) ultra-thin package. It operates over a temperature range of -40 to +85°C. · PDA's · Audio Switching and Muting Related Literature*(see page 14) · Technical Brief TB363 TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)". · Application Note AN1368 AN1368 "ISL54406EVAL1Z ISL54406EVAL1Z Evaluation Board User's Manual" Application Block Diagram 3.3V 0.1µF µCONTROLLER VDD LOGIC CONTROL LOUT CLICK AND POP CIRCUITRY ISL54406 ISL54406 1 SEL2 LIN ROUT July 14, 2010 FN6578 FN6578.1 SEL1 AUDIO CODEC RIN GND CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL54406 ISL54406 Stereo Click and Pop Eliminator with Audio Muting ISL54406 ISL54406 Pin Configurations (Note 1) ISL54406 ISL54406 (10 Ld 1.8x1.4 µTQFN) TOP VIEW ISL54406 ISL54406 (10 Ld 3x3 TDFN) TOP VIEW N.C. VDD 1 SEL2 2 LOUT ROUT 4 GND LSHUNT CLICK AND POP N.C. 8 8 3 N.C. N.C. SEL1 9 7 LIN VDD 10 6 5 6 SEL1 9 LOGIC CONTROL LIN 7 10 PD RSHUNT 5 LSHUNT 1 RIN CLICK AND POP SEL2 4 GND 3 LOGIC CONTROL RIN ROUT RSHUNT 2 LOUT NOTE: 1. ISL54406 ISL54406 Switches Shown for SEL1 = Logic "1" and SEL2 = Logic "1". Truth Table Pin Descriptions ISL54406 ISL54406 ISL54406 ISL54406 SEL2 SEL1 LIN/ RIN LSHUNT/ RSHUNT CLICK AND POP 0 0 OFF OFF Inactive 0 1 OFF ON Active TDFN µTQFN NAME MODE 1 10 VDD Power Supply FUNCTION Shutdow n 2 1 SEL2 Logic Control 2 3 2 LOUT Audio Left Output Click and Pop 4 3 ROUT Audio Right Output 5 4 GND IC Ground Connection 1 0 OFF ON Inactive Mute 6 5 RIN Audio Right Input 1 1 ON OFF Inactive Audio 7 6 LIN Audio Left Input 8, 9 7, 8 N.C. No Connection 10 9 SEL1 Logic Control 1 PD - PD SEL1 and SEL2: Logic "0" when 0.5V, Logic "1" when 1.4V 2 Thermal Pad. Tie to Ground or Float FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. # ISL54406IRUZ-T ISL54406IRUZ-T (Notes 2, 3) 6 -40 to +85 10 Ld 1.8x1.4 µTQFN L10.1.8x1.4A ISL54406IRTZ ISL54406IRTZ (Note 4) 4406 -40 to +85 10 Ld 3x3 TDFN L10.3x3A ISL54406IRTZ-T ISL54406IRTZ-T (Notes 2, 4) 4406 -40 to +85 10 Ld 3x3 TDFN L10.3x3A ISL54406EVAL1Z ISL54406EVAL1Z Evaluation Board NOTES: 2. Please refer to TB347 TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 STD-020. 4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 STD-020. 5. For Moisture Sensitivity Level (MSL), please see device information page for ISL54406 ISL54406. For more information on MSL please see techbrief TB363 TB363. 3 FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Absolute Maximum Ratings Thermal Information VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 5.5V Input Voltages LIN, RIN (Note 6). . . . . . . . . . . . . . -2V to (VDD) + 0.3V) SEL1 (Note 6) . . . . . . . . . . . . . . . -0.3V to (VDD) + 0.3V) SEL2 (Note 6) . . . . . . . . . . . . . . . -0.3 to (VDD) + 0.3V) Output Voltages LOUT, ROUT (Note 6) . . . . . . . . . . . -2V to (VDD) + 0.3V) Continuous Current . . . . . . . . . . . . . . . . . . . . . . ±150mA Peak Current (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . ±300mA ESD Rating: Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . >5kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . >300V Charged Device Model . . . . . . . . . . . . . . . . . . . . . >1.5kV Latch-up Tested per JEDEC; Class II Level A . . . . . at +85°C Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 10 Ld µTQFN (Note 7, 8) . . . . . . . . 160 105 10 Ld TDFN (Notes 9, 10) . . . . . . . 55 18 Maximum Junction Temperature (Plastic Package). . +150°C Maximum Storage Temperature Range. . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 6. Signals on LIN, RIN, LOUT, ROUT, SEL1, and SEL2 exceeding VDD or GND by specified amount are clamped. Limit current to maximum current ratings. 7. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 TB379 for details. 8. For JC, the "case temp" location is taken at the package top center. 9. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379 TB379. 10. For JC, the "case temp" location is the center of the exposed metal pad on the package underside. Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VSELx_H = 1.4V, VSELx_L= 0.5V, (Notes 11), Unless Otherwise Specified Boldface limits apply over the operating temperature range, -40°C to +85°C. PARAMETER TEST CONDITIONS TEMP MIN MAX (°C) (Notes 12, 13) TYP (Notes 12, 13) UNITS ANALOG SWITCH CHARACTERISTICS Analog Input Signal Range, VANALOG VDD = 3.3V, VSEL2 = 1.4V, VSEL1 = 1.4V Full -1.5 - 1.5 V ON-Resistance, rON VDD = 3.0V, VSEL2 = 1.4V, VSEL1 = 1.4V IXOUT = 40mA, VLIN or VRIN = -0.85V to 0.85V, (See Figure 2, Note 16) +25 - 2.5 2.8 Full - - 4.0 VDD = 3.0V, VSEL2 = 1.4V, VSEL1 = 1.4V IXOUT = 40mA, VLIN or VRIN = -0.85V to 0.85V, (Notes 14, 16) +25 - 2 - m Full - - rON Matching Between Channels, rON VDD = 3.0V, VSEL2 = 1.4V, VSEL1 = 1.4V IXOUT = 40mA, VLIN or VRIN = Voltage at max rON over signal range of -0.85V to 0.85V, (Note 15, 16) +25 - 0.09 0.25 Full - - 0.35 Discharge Pull-Down Resistance, RL, RR VDD = 3.6V, VSEL2 = 1.4V, VSEL1= 1.4V , VROUT or VLOUT = -0.85V, 0.85V. Measure current through the discharge pull down resistor and calculate resistance value. +25 - 240 - k Click and Pop Discharge Resistance VDD = 3.0V, VSEL2 = 0V, VSEL1= 1.4V, VINL or V INR = -0.85V, 0.85V. Measure current through the Click and Pop discharge resistance and calculate resistance value. +25 - 35 - rON Flatness, rFLAT(ON) 4 m FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VSELx_H = 1.4V, VSELx_L= 0.5V, (Notes 11), Unless Otherwise Specified (Continued) Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEST CONDITIONS TEMP MIN MAX (°C) (Notes 12, 13) TYP (Notes 12, 13) UNITS DYNAMIC CHARACTERISTICS Turn-ON Time, tON VDD = 2.7V, VSEL1= 2.7V, RL = 50, CL = 10pF, (See Figure 1) +25 - 5 - µs Turn-OFF Time, tOFF VDD = 2.7V, VSEL1= 2.7V, RL = 50, CL = 10pF, (See Figure 1) +25 - 45 - ns OFF-Isolation, Mute Mode VDD = 3.0V, VSEL2 = 0V, VSEL1= 3.0V, VLIN or VRIN = 0.707VRMS 707VRMS, RL = 32, f = 20Hz to 20kHz, (See Figure 3). +25 - 110 - dB VDD = 3.0V, VSEL2 = 0V, VSEL1= 3.0V, VLIN or VRIN = 0.707VRMS 707VRMS, RL = 20k, f = 20Hz to 20kHz, (See Figure 3). +25 - 110 - dB Crosstalk RIN to LOUT, LIN to ROUT VDD = 3.0V, VSEL2 = 3.0V, VSEL1= 3.0V, RL = 32, f = 20Hz to 20kHz, VLIN or VRIN = 0.707VRMS 707VRMS (2VP-P), (See Figure 4) +25 - -90 - dB Total Harmonic Distortion VDD = 3.0V, f = 20Hz to 20kHz, VSEL2 = 3.0V, VSEL1 = 3.0V, VLIN or VRIN = 0.36VRMS 36VRMS (1VP-P), RL = 32 +25 - 0.03 - % VDD = 3.0V, f = 20Hz to 20kHz, VSEL2 = 3.0V, VSEL1 = 3.0V, VLIN or VRIN = 0.707VRMS 707VRMS (2VP-P), RL = 32 +25 - 0.06 - % VDD = 3.0V, VSEL1= 3.0V, VSEL2 = 0V to 3.0V DC step, RL = 20k, VINL or VINR = 0VDC to 1.5VDC step (see Figure 6) +25 - >60 - dB VDD = 3.0V, VSEL1= 3.0V, VSEL2 = 0V to 3.0V DC step, RL = 32, VINL or VINR = 0VDC to 1.5VDC step (see Figure 6) +25 - >70 - dB Power Supply Range, VDD Full 2.7 3.6 V Positive Supply Current, IDD VDD = 3.6V, VSEL2 = 1.4V, VSEL1 = 1.4V +25 - 7 10 µA Full - - 15 µA 25 - - 50 nA Click and Pop Reduction (Note 17) POWER SUPPLY CHARACTERISTICS Shutdown Current, ISHDN VDD = 3.6V, VSEL2 = Float, VSEL1 = Float DIGITAL INPUT CHARACTERISTICS SELx Voltage Low, VSELx_L VDD = 2.7V to 3.6V Full - - 0.5 V SELx Voltage High, VSELx_H VDD = 2.7V to 3.6V Full 1.4 - - V Input Low Current, ISEL2L, ISEL1L VDD = 3.6V, VSEL2 = 0V or Float, VSEL1 = 0V or Float Full -20 2 20 nA 5 FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VSELx_H = 1.4V, VSELx_L= 0.5V, (Notes 11), Unless Otherwise Specified (Continued) Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEMP MIN MAX (°C) (Notes 12, 13) TYP (Notes 12, 13) UNITS TEST CONDITIONS Input High Current, ISEL2H, ISEL1H VDD = 3.6V, VSEL2 = 3.6V, VSEL1 = 3.6V Full -2 1 2 µA SEL1 Pull-Down Resistor, RSEL1 VDD = 3.6V, VSEL2 = 3.6V, VSEL1 = 0V Full - 4 - M SEL2 Pull-Down Resistor, RSEL2 VDD = 3.6V, VSEL2 = 0V, VSEL1 = 3.6V Full - 4 - M NOTES: 11. VSELx = Input voltage to perform proper function. 12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 14. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range. 15. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value. 16. Limits established by characterization and are not production tested. 17. Click and Pop Reduction specifications are limited by test equipment. Test Circuits and Waveforms VDD VSEL2H LOGIC INPUT VSEL2L tr < 20ns tf < 20ns 50% VLIN/RIN SWITCH INPUT tOFF SEL1 VLOUT/ROUT IN OUT SEL2 SWITCH INPUT VINPUT VOUT 90% SWITCH OUTPUT 0.1µF 90% VSEL2 GND RL 50 CL 10pF 0V tON Repeat test for all switches. CL includes fixture and stray capacitance. RL -V OUT = V (INPUT) R + r L ON FIGURE 1A. MEASUREMENT POINTS FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES 6 FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Test Circuits and Waveforms (Continued) VDD VDD 0.1µF Repeat test for all switches. rON = V1/40mA SEL2 SIGNAL GENERATOR SEL1 LIN OR RIN 0.1µF LOUT OR ROUT LIN OR RIN ANALYZER VDD VIN RL SEL1 SEL2 V1 40mA 0V OR FLOAT LOUT OR ROUT GND GND FIGURE 2. rON TEST CIRCUIT FIGURE 3. OFF ISOLATION CIRCUIT VDD 0.1µF SEL1 SIGNAL GENERATOR LOUT OR ROUT LIN OR RIN 32 SEL2 VDD ROUT OR LOUT RIN OR LIN ANALYZER GND 0 RL FIGURE 4. CROSSTALK TEST CIRCUIT 3.0V 0.1µF 0VDC TO 3VDC STEP 1Hz VDD SEL1 SEL2 LOUT CLICK AND POP ROUT 20k LIN RIN 220µF VINL VINR 220µF 32 GND 0V TO 1.5V DC STEP OR 1.5V TO 0V DC STEP 1Hz SEL2 Waveform: Rising Edge @ 100ms after 0V to 1.5V DC Step Falling Edge @ 100ms before 1.5V to 0V DC Step *See Figures 18 and 19 FIGURE 5. CLICK AND POP TEST CIRCUIT #1 7 FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Test Circuits and Waveforms (Continued) FLOAT FLOAT SEL1 SEL2 0V TO 3.0V DC STEP OR 3.0V TO 0V DC STEP 1Hz VDD LOUT LIN CLICK AND POP ROUT 20k 220µF RIN 220µF 20k 1.5V GND Power Supply Turn-On/Turn-Off Click and Pop Transient Test *See Figure 17 FIGURE 6. CLICK AND POP TEST CIRCUIT #2 8 FN6578 FN6578.1 July 14, 2010 ISL54406 ISL54406 Application Block Diagram 3.3V 0.1µF VDD SEL1 LOGIC CONTROL 4M LSHUNT 220k RIGHT SPEAKER 4M 6 LOUT LEFT SPEAKER LIN CLICK AND POP CIRCUITRY ROUT µCONTROLLER SEL2 220µF 220µF AUDIO CODEC RIN 220k 6 RSHUNT GND Detailed Description The ISL54406 ISL54406 device is a dual single pole-single throw (SPST) analog switch that operates from a single DC power supply in the range of +2.7V to +5V. It was designed to function as a transient suppressor to eliminate Click and Pop noise on headphones. It comes in a 10 Ld (3mmx3mm) TDFN or a tiny 10 Ld (1.8mmx1.4mm) µTQFN package for use in MP3 players, PDAs, cellphones, and other personal media players. The part consist of a pair of 2.5 audio switches. The audio switches can accept signals that swing below ground by as much as -1.5V. They were designed to pass audio left and right stereo signals that are ground referenced with minimal distortion. The ISL54406 ISL54406 was specifically designed for MP3 players, personal media players and cellphone applications that require but do not have Click and Pop elimination. See "Application Block Diagram" on page 9. The ISL54406 ISL54406 contains logic control pins SEL1 and SEL2 that will determine the state of the switch. See the "Truth Table" on page 2 for a description of each state. A detailed description of the audio switches are provided in the section that follows. Audio Switches The two 2.5 audio switches (L, R) are designed to pass signals that swing 1.5V above and below ground. Crosstalk between the audio switches is -90dB over the audio band. These switches have excellent off-isolation of 110dB over the audio bandwidth with a 32 load. Over a signal range of ±1V (0.707VRMS 707VRMS) with VDD > 2.7V, these switches have an extremely low rON resistance variation (0.03). They can pass ground referenced audio signals with very low distortion (