NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Microsoft Windows CE OS Pre-OS ® PSM Intel StrataFlash® ® 1Gb Intel StrataFlash , CE OS Installable File System /: Pre-OS · Intel StrataFlash® · , Intel StrataFlash® Pre-OS / / ® 298011 3 Volt Intel StrataFlash® Memory J3 1.8 Volt Intel StrataFlash® Wireless Memory Datasheet 290667 251902 1.8V Intel StrataFlash® L18/L30 L18/L30 3V Intel StrataFlash® J3 251890 298044 ® PSM ... | Original |
2 pages, |
Intel StrataFlash Memory j3 INTEL STRATAFLASH datasheet abstract |
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| Abstract: Intel StrataFlash® Intel StrataFlash® P30 P30 Intel StrataFlash® 130nm NOR P30 2 / 4 Intel StrataFlash® P30 P30 64Mb 1Gb P30 P30 40MHz 85ns Intel StrataFlash® 64Mb 1Gb ® QUAD+ TSOP , / ® · Intel StrataFlash Embedded Memory P30 Product Brief · AP-793 AP-793 Using Asynchronous Page and Synchronous Burst Read Modes with Intel® Flash Memory · Intel StrataFlash® Embedded Memory P30 ... | Original |
2 pages, |
AP-825 AP-793 512MB NOR FLASH 256MB nor flash INTEL AP- intel design guide Intel SCSP Intel Small Outline Package Guide INTEL STRATAFLASH 1.8V AP-812 130nm AP-813 "NOR Flash" intel datasheet abstract |
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| Abstract: StrataFlash memory interfaces to Intel® StrongARM* microprocessor. This document was written with preliminary information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be , document use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is ... | Original |
10 pages, |
W6/W9 StrataFlash INTEL STRATAFLASH 28F640J3A 28F320J3A 28F128J3A SA-1110 38F3 SA-1110 abstract |
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| Abstract: preliminary information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be , document use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is , Intel StrataFlash memory, bit 16 of the read control register must be set to enable page-mode timings. ... | Original |
10 pages, |
SH7708 AP-646 28F640J3A 28F320J3A 28F128J3A INTEL STRATAFLASH INTEL application notes SH7708 abstract |
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| Abstract: devices. This application note will cover the 3 Volt Intel StrataFlash memory's interface to the Philips , Volt Intel StrataFlash memory. Any changes in those specifications may not be reflected in this , following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power supply. 2.7 V , several 3 Volt Intel StrataFlash memory components without additional decoding. For all designs in this , Volt Intel StrataFlash memory, the device is deselected and power consumption is reduced to standby ... | Original |
12 pages, |
R3000 PR31700 PR31500 AP-709 28F640J3A 28F320J3A 28F128J3A INTEL application notes PR31700 abstract |
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| Abstract: preliminary information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be , document use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is , Intel StrataFlash memory, bit 16 of the read control register must be set to enable page-mode timings. ... | Original |
12 pages, |
MPC603E MPC603 INTEL STRATAFLASH CPU11 28F640J3A 28F320J3A 28F128J3A INTEL application notes datasheet abstract |
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| Abstract: information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be reflected , use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is , Intel StrataFlash memory, bit 16 of the read control register must be set to enable page-mode timings. ... | Original |
12 pages, |
28F640J3A 28F128J3A INTEL application notes ap 701 all 28F320J3a SA-110 SA-110 abstract |
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| Abstract: information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be reflected , use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is , Intel StrataFlash memory, bit 16 of the read control register must be set to enable page-mode timings. ... | Original |
12 pages, |
number of pins of ARM7TDMI instruction cycle for arm7tdmi ARM7tdmi pin configuration AP-646 298130 28F640J3A 28F320J3A 28F128J3A INTEL application notes datasheet abstract |
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| Abstract: StrataFlash memory's interface to the Intel® i960® HA/HD/HT processors. This document was written with preliminary information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be , document use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is ... | Original |
12 pages, |
Intel i960 architecture INTEL application notes FF000000 298130 28F640J3A 28F320J3A 28F128J3A INTEL STRATAFLASH AP-646 datasheet abstract |
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| Abstract: information about 3 Volt Intel StrataFlash memory. Any changes in those specifications may not be reflected , use the following signals generated by the 3 Volt Intel StrataFlash memory: VCC: Device power , switching between several 3 Volt Intel StrataFlash memory components without additional decoding. For all , pins disable the 3 Volt Intel StrataFlash memory, the device is deselected and power consumption is , Intel StrataFlash memory, bit 16 of the read control register must be set to enable page-mode timings. ... | Original |
12 pages, |
MC68LC060 28F320J3A 28F640J3A 28F128J3A CPU60 MC68060 MC68EC060 INTEL application notes 28F640J3 CPU18 cpu11 MC68060 abstract |
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| INTEL STRATAFLASH n CONCLUSIONS INTRODUCTION The M58LW064 M58LW064 M58LW064 M58LW064 is the first in a new family of possible for flexible manufacturing systems. BENCHMARKING AGAINST INTEL STRATAFLASH Intel also offer . Benchmarking against Intel StrataFlash Parameter/Function M58LW064A/B M58LW064A/B M58LW064A/B M58LW064A/B M58LW128A/B M58LW128A/B M58LW128A/B M58LW128A/B 28F640J3A 28F640J3A 28F640J3A 28F640J3A 28F128J3A 28F128J3A 28F128J3A 28F128J3A M58 connecting the Intel StrataFlash. Both parts use Write Enable and Output Enable control signals; Chip Select StrataFlash Family Intel StrataFlash Family AN1265 AN1265 AN1265 AN1265 - APPLICATION NOTE 12/12 If you have any www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7185.htm |
STMicroelectronics | 20/10/2000 | 28.34 Kb | HTM | 7185.htm |
| -WRITE - BLOCK PROTECTION - NOR TECHNOLOGY n BENCHMARKING AGAINST INTEL STRATAFLASH n CONCLUSIONS . BENCHMARKING AGAINST INTEL STRATAFLASH Intel also offer Multi-bit Flash Technology in their StrataFlash each of the features of each memory. Table 2. Benchmarking against Intel StrataFlash Parameter /12 Connecting the M58LWxxx family to CPUs is similar to connecting the Intel StrataFlash. Both parts use Write DQ4 DQ9 A24 WE# OE# DQ8 DQ0 DQ1 A0 A23 CE2 BYTE# Intel StrataFlash Family www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7185-v1.htm |
STMicroelectronics | 16/06/2000 | 27.6 Kb | HTM | 7185-v1.htm |
| */ /*- * FLASH organization for Intel Strataflash */ #define CFG_FLASH_16BIT 16BIT 16BIT 16BIT 1 /* 16-bit wide flash memory _OR0_PRELIM 0xFFF80D42 #define CFG_BR0_PRELIM 0xFFF00401 /* * BR1 and OR1 (Intel 8M StrataFLASH www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (QS860T.h) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| an Intel Strataflash implementation. * * References * JEDEC Standard JESD68 JESD68 JESD68 JESD68 - Common Flash Interface (CFI) * JEDEC Standard JEP137-A JEP137-A JEP137-A JEP137-A Common Flash Interface (CFI) ID Codes * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets * Intel 290667-008 3 Volt Intel StrataFlash Memory _OFFSET_PROTECT 0x02 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 ?"protect":"unprotect") = 0) { info->protect[sector] = prot; /* Intel's unprotect unprotects all locking */ if www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (strataflash.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| to calculate the address for access CFI data structures. * It has been tested on an Intel Strataflash implementation. * * References * JEDEC Standard JESD68 JESD68 JESD68 JESD68 - Common Flash Interface (CFI) * JEDEC Standard JEP137-A JEP137-A JEP137-A JEP137-A Common Flash Interface (CFI) ID Codes * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet * * TODO _OFFSET_PROTECT 0x02 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (strataflash.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| to calculate the address for access CFI data structures. * It has been tested on an Intel Strataflash implementation. * * References * JEDEC Standard JESD68 JESD68 JESD68 JESD68 - Common Flash Interface (CFI) * JEDEC Standard JEP137-A JEP137-A JEP137-A JEP137-A Common Flash Interface (CFI) ID Codes * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet * * TODO _OFFSET_PROTECT 0x02 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (strataflash.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| Intel StrataFlash 28F128J3 28F128J3 28F128J3 28F128J3 16 bit data bus CoolRunner-II Implementation I/O Space interface Analog Register The common memory interfaces to an Intel StrataFlash 28F128J3 28F128J3 28F128J3 28F128J3 Flash type memory. Most of this and contains the Attribute Memory including the CIS. Common Memory is implemented using the Intel Strataflash. The I/O Space consists of an Analog Devices DSP which controls its own additional function, such www.datasheetarchive.com/files/xilinx/files/cpld _modules/compact_flash.pps |
Xilinx | 30/01/2004 | 420 Kb | PPS | compact_flash.pps |
| */ /*- * TODO flash parameters * FLASH organization for Intel Strataflash */ #undef CFG_FLASH_16BIT 16BIT 16BIT 16BIT /* 32 www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (QS823.h) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| */ /*- * TODO flash parameters * FLASH organization for Intel Strataflash */ #undef CFG_FLASH_16BIT 16BIT 16BIT 16BIT /* 32 www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (QS850.h) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| tested on an Intel Strataflash implementation and AMD 29F016D 29F016D 29F016D 29F016D. * * References * JEDEC Standard JESD68 JESD68 JESD68 JESD68 - Common Flash Interface (CFI) * JEDEC Standard JEP137-A JEP137-A JEP137-A JEP137-A Common Flash Interface (CFI) ID Codes * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets * Intel 290667-008 3 Volt Intel StrataFlash _OFFSET_ERASE_REGIONS 0x2D #define FLASH_OFFSET_PROTECT 0x02 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 #define FLASH_MAN_CFI 0x01000000 #define CFI_CMDSET_NONE 0 #define CFI_CMDSET_INTEL www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (cfi_flash.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |