NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
IN2432N IN2432D IN24LC32N IN24LC32D 24A32 MS-001BA MS-012A IN24AA CL100 MS-012AA - Datasheet Archive
32K(4Kx8) EEPROM with I2C Interface . DESCRIPTION The IN2432N, IN2432D, IN24LC32N, IN24LC32D are a 32K(4Kx8) nonvolatile
IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D 32K(4Kx8) EEPROM with I2C Interface . DESCRIPTION The IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D are a 32K(4Kx8) nonvolatile Electrically Erasable PROM with I2C Interface . The ICs is purposed for reading & writing in byte or page (32byte) modes and long time nonvolatile data storage in electronic units with I2Cinterface. The ICs are functionally and pin compatible to 24A32 24A32 (Microchip) IN2432N IN2432N, IN24LC32N IN24LC32N are realized in DIP-8 (MS-001BA MS-001BA) package. IN2432D IN2432D, IN24LC32D IN24LC32D are realized in SO-8 (MS-012A MS-012A) package. FEATURES - Data capacity, QINF: - Supply voltage range , UCC for IN2432N IN2432N, IN2432D IN2432D for IN24LC32N IN24LC32N, IN24LC32D IN24LC32D - Maximum clock frequency, fC: for 2,5 V UCC 5,5 V for 1,8 V UCC 5,5 V - Maximum stand-by current, ICC - Maximum read current, IOCCR - Maximum write current, IOCCW - Endurance NE/W, - Operating temperature range N SUFFIX DIP 32768 bit, 1,8 .5,5 V; 2,5 .5,5 V; 8 D SUFFIX SOIC 1 400 kHz; 100 kHz; 1,0 uA; 0,4 mA; 3,0 mA; 1000000 cycles; -40 . +85°C. 8 1 IN2432N IN2432N, IN24LC32N IN24LC32N are realized in DIP-8 (MS-001BA MS-001BA) package. IN2432D IN2432D, IN24LC32D IN24LC32D are realized in SO-8 (MS-012A MS-012A) package. 08 Vcc WP 05 SCL A0-A2 HV-generator 3 07 SDA 01-03 06 Input filter I 2 C bus control logic Rows Decoder Storage unit 4096 x 8 Page Register Columns decoder Read/write control unit 04 GND Fig.2 Block Diagram 1 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D Table 1 Pin description Pin number Pin Name 01 A0 Address input 02 A1 Address input 03 A2 Address input 04 GND Common pin 05 SDA Serial Data I/O pin 06 SCL Clock Input 07 WP 08 VCC Function Write disable input (UWP = GND for write enable mode, UWP = UCC for write disable mode) Power supply pin Table 2 Recommended Operation Conditions & Maximum Ratings* Parameter, unit Supply voltage,V IN2432N IN2432N, IN2432D IN2432D IN24LC32N IN24LC32N, IN24LC32D IN24LC32D Symbol Ucc Recommended Operation Conditions Min Max Low level input voltage, V 2,5 V Ucc 5,5 V Min Max 0 6,5 Ucc + 1,0 1,8 5,5 2,5 5,5 0,7Ucc - 0,3UCC 0,2UCC - 0,3 - High level input voltage, V UIH Maximum Ratings 1,8 V Ucc < 2,5 V (IN2432N IN2432N, IN2432D IN2432D) Low level output current UIL - IOL 2,1 - Load capacity,pF CL - 100 - - 2 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D Table 3 Electric Parameters Parameter, unit Low level output voltage, V Symbol UOL Mode UCC = 2,5 V, IOL = 2,1 mA Min Max 0,4 UCC = 4,5 V, IOL = 3,0 mA 0,4 -1,0 1,0 -1,0 Low level input leakage current, uA High level input leakage current, uA IILL IILH UCC = 5,5 V, UIL = 0,1V UCC = 5,5 V, UIL = 5,5 V Low level output leakage current, uA High level output leakage current, uA Consumption current, uA IOLL UCC = 5,5 V, UO = 0,1V IOLH UCC = 5,5 V, U0 = 5,5 V Consumption current (Operating Read), mA Consumption current (Operating Write), mA SCL, SDA pins noise signal duration, ns ICC IOCC R Ucc = 5,5 V, fC = 400 kHz IOCC W Ucc = 5,5 V, fC = 400 kHz Switch-on transition time (measured on UIHmin & UILmax levels), ns tCY 1,0 1,0 0,4 3,0 50 tSP tOF Write/Erase cycle duration (byte, page modes), ms - TA, ° 25 ± 10; -45; 85 1,8 V UCC < 2,5 V, IOL=3,0 mA, CL100 CL100 pF (for IN2432N IN2432N, IN2432D IN2432D) 2,5V U 5,5V IOL=3,0 mA, CL100 CL100 pF UCC = 4,5 V fC = 1 MHz 250 20+0,1CL SCL, SDA, pins hysteresis voltage, V UHYS 0,05Ucc Program/erase cycles per byte NE/W 1000000 3 250 5 - Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D Table 4 I2C bus parameters (-40 ° Ta 85 °) Parameter, unit Symbol 1,8 V UCC < 2,5 V* 2,5 V UCC 5,5V Min. Max. Min. Max. fC - 100 - 400 tBUF 4,7 - 1,3 - tHD.STA 4,0 - 0,6 - tLOW 4,7 - 1,3 - tHIGH 4,0 - 0,6 - tSU.STA 4,7 - 0,6 - tHD.DAT 0 - 0 - tSU.DAT 250 - 100 - tAA - 3,5 - 0,9 SDA, SCL rise time, us tr - 1,0 - 0,3 SDA, SCL fall time, us «Stop » condition setup time , us tf - 300 - 300 tSU.STO 4,0 - 0,6 - tHD.WP 4,7 - 1,3 - tSU.WP 4,0 - 0,6 - Clock frequency, kHz Time the bus to be free before generation of «Start» condition, us «Start» condition hold time , us SCL pin low level duration , us SCL pin high level duration , us «Start» condition setup time , us Data hold time for slave transmitter, ns Data setup time, ns Data access time on SCL signal, us Data hold time for write disable mode, us Data setup time for write disable mode, us Note Being transmitter, IC has to provide internal delay not less 300 ns, to exept random generation of «Start » & «Stop » conditions _ * I2C bus parameters for supply voltage range 1,8 V UCC < 2,5 V are indicated for IN2432N IN2432N, IN2432D IN2432D only 4 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D ST SP 0.9 SDA IN Data Data Data 0.1 t BUF t SU.STA t SU.DAT t t HD.STA t HD.DAT t t SU.WP HD.WP t SU.STO HIGH 0.9 SCL 1 0.1 t LOW 8 9 tf tr t AA t AA SDA out Bus is "Start", free condition Start of transmission Transfer of data with confirmation bit "Stop" Bus is condition free End of transmission Fig. 3 I2 bus operation time diagramm 5 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D Tab. 5 Control words format Symbol Bit number 9th bit (confirmation bit) Function 1 2 3 4 5 6 7 8 CS/WR 1 0 1 0 A2 A1 A0 0 "0", from chip Chip select word for write operation CS/RD 1 0 1 0 A2 A1 A0 1 "0", from chip Chip select word for read out operation "0", from chip Word address WA Low address byte (1 WA1) X7 X6 X5 X4 X3 X2 X1 X0 (2 WA2) 0 0 0 0 X11 X10 X9 X8 High address byte DE D7 D6 D5 D4 D3 D2 D1 D0 "0", from chip Input data DA D7 D6 D5 D4 D3 D2 D1 D0 "0" or "1", from "Master" Reading data * "Master" device that control data transmission through bus , (MPU, MCU) Chip select word consist of few parts: - 1-4th bits are fixed combination saved inside chip. These bits is used for indentification of chip type; - 5-7th bits have to correspond to state of address inputs A0-A2. These bits allow to increase data capacity by means of connecting up to 8 ICs to one bus; - 8th bit indicates direction of data transfer ("0" write data to IC, "1" read-out data from IC). Tab. 6 Main states of I2C-bus Symbol Purpose ST "Start" condition. Transition of SDA bus from high to low while SCL is high. SP "Stop" condition. Transition of SDA bus from low to high while SCL is high. PROG As Am Active programming cycle Confirmation bit from IC AS = 0 IC received input data Confirmation bit from "Master" Am = 0 autoincremrnt , Am = 1 - before "Stop" condition X0-X7 Address bits of a byte D0-D7 Data bits A2 A0 Bits of data capacity increasing on I2-bus. These bits have to correspond to state of address inputs A0-A2 6 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D n bytes ST CS/WR As WA2 WA1 As As ST CS/RD As Last byte DA Am DA Am Address word autoincrement Fig. 4 Protocol of I2C bus for mode "Read defined address word" ST CS/RD As DA n bytes Am DA Last byte Am SP Autoincrement of address of read-out word Fig. 5 Protocol of I2C bus for mode "Read random address" ST CS/WR As WA2 As WA1 As DE As SP PROG Autoincrement of word address Fig. 6 Protocol of I2C bus for mode " Write/Erase Byte " 1- ST CS/WR As WA2 As WA1 As DE 2- As DE 32- As DE As SP PROG Autoincrement of word address Fig. 7 Protocol of I2C bus for mode " Write/Erase Page " 7 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 SP IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D N SUFFIX PLASTIC DIP (MS-001BA MS-001BA) D 8 5 E1 1 4 b2 A E C A1 Seating plane e b 0,25 (0,0 10 ) M c L C D E1 A b min 9.02 6.07 0.36 1.14 max 10.16 7.11 5.33 0.56 e 1.78 L E c A1 0° b2 2.93 7.62 0.20 0.38 15° 3.81 8.26 0.36 0° 0.115 0.300 0.008 0.015 15° 0.150 0.325 0.014 mm 2.54 inches min 0.355 0.240 max 0.400 0.280 0.210 0.022 0.070 0.1 0.014 0.045 8 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D D SUFFIX PLASTIC SOP (MS-012AA MS-012AA) D 8 5 E1 1 H 4 hx45 C e L Seating plane b 0,25 (0,010) M c A1 C D E1 H b min 4.80 3.80 5.80 5.00 4.00 6.20 0.51 A A1 c L h 0° 1.35 0.10 0.19 0.41 0.25 8° 0.33 max e 1.75 0.25 0.25 1.27 0.50 mm 1.27 inches min max 0.1968 0.1574 0.2440 0.020 0° 0.1890 0.1497 0.2284 0.013 0.100 9 0.0532 0.0040 0.0075 0.016 0.0099 8° 0.0688 0.0090 0.0098 0.050 0.0196 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248 IN2432N IN2432N, IN2432D IN2432D, IN24LC32N IN24LC32N, IN24LC32D IN24LC32D Die dimension & contact pad location Die thickness 0,46±0,02 mm. Pad location table Pad number Coordinates (left bottom corner), mm Y 01 02 03 04 05 06 07 08 1,504 1,797 1,873 1,701 0,151 0,164 0,231 0,453 0,154 0,154 2,468 2,546 2,541 2,178 0,154 0,154 Note: Contact pad coordinates and dimensions 0,092 0,092 mm are indicated according passivation layer 10 Ver.00/13.10.2008 IN24AA IN24AA(LC)32-TSe.doc 949248