ILX531A S5149 S5150 E97X25-PS 3200K CM-500S 2854K S5145 S5146 S5147 S5148 F/16V - Datasheet Archive

 

5150-pixel CCD Linear Sensor (B/W) Description The ILX531A is a reduction type CCD linear sensor developed for high resolution

 

ILX531A ILX531A 5150-pixel CCD Linear Sensor (B/W) Description The ILX531A ILX531A is a reduction type CCD linear sensor developed for high resolution copiers. This sensor reads A3-size documents at a density of 400 DPI, and A4-size documents at a density of 600 DPI at high speed. VOUT-ODD 5 18 VOUT-EVEN VGG 6 17 VDD 15 14 13 1-EVEN 12 VDD VDD 10 ROG 11 5150 ROG VDD GND LH-ODD 2-ODD 1-ODD 11 14 3 8 10 9 ROG pulse generator CCD analog shift register Read out gate CCD analog shift register Read out gate 12 13 15 17 19 20 VDD GND 5 8 9 VDD 2-EVEN 1-EVEN NC 2-EVEN VOUT-ODD 1-ODD 16 7 VGG 6 2-ODD VOUT-EVEN 18 GND RS-ODD VDD CLP-ODD 19 GND 4 2 GND 1 20 LH-EVEN 4 LH-ODD 3 Output amplifier 21 RS-EVEN Output amplifier 2 22 CLP-EVEN 21 RS-ODD 1 22 1 CLP-EVEN RS-EVEN LH-EVEN VDD CLP-ODD D25 D26 Pin Configuration (Top View) V °C °C D74 S1 S2 15 ­10 to +60 ­30 to +80 S5149 S5149 S5150 S5150 D75 Absolute Maximum Ratings · Supply voltage VDD · Operating temperature · Storage temperature Block Diagram D94 Features · Number of effective pixels: 5150 pixels · Pixel size: 7µm × 7µm (7µm pitch) · Clamp circuit are on-chip · Signal output phase of two-output simultaneous-output (alternate-output is available) · Ultra high sensitivity/Ultra low lag · Maximum data rate: 40MHz · Single 12V power supply · Input clock pulse: CMOS 5V drive · Package: 22 pin DIP (400mil) 22 pin DIP (Cer-DIP) Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. ­1­ E97X25-PS E97X25-PS ILX531A ILX531A Pin Description Pin No. Symbol Description Pin No. Symbol Description 1 CLP-ODD Clock pulse input (odd pixel) 12 VDD 12V power supply 2 RS-ODD Clock pulse input (odd pixel) 13 1-EVEN Clock pulse input (even pixel) 3 LH-ODD Clock pulse input (odd pixel) 14 GND GND 4 GND GND 15 2-EVEN Clock pulse input (even pixel) 5 VOUT-ODD Signal out (odd pixel) 16 NC NC 6 VGG Output circuit gate bias 17 VDD 12V power supply 7 GND GND 18 VOUT-EVEN Signal out (even pixel) 8 2-ODD Clock pulse input (odd pixel) 19 VDD 12V power supply 9 1-ODD Clock pulse input (odd pixel) 20 LH-EVEN Clock pulse input (even pixel) 10 VDD 12 V power supply 21 RS-EVEN Clock pulse input (even pixel) 11 ROG Readout gate clock pulse input 22 CLP-EVEN Clock pulse input (even pixel) Recommended Supply Voltage Item Min. Typ. Max. Unit VDD 11.4 12 12.6 V Clock Characteristics Item Symbol Min. Typ. Max. Unit C1, C2 - 400 - pF CLH - 10 - pF CRS - 10 - pF Input capacity of CLP1 CCLP - 10 - pF Input capacity of ROG CROG - 10 - pF Input capacity of 11, 21 Input capacity of LH1 Input capacity of RS1 1 It indicates that 1-ODD, 1-EVEN as 1, 2-ODD, 2-EVEN as 2, LH-ODD, LH-EVEN as LH, RS-ODD, RS-EVEN as RS, CLP-ODD, CLP-EVEN as CLP. Clock Frequency Item Symbol Min. Typ. Max. Unit 1, 2, LH, RS, CLP f1, f2, fLH, fRS, fCLP - 1 20 MHz Data rate - 2 40 MHz Min. Typ. Max. Unit High level 4.75 5.0 5.25 V Low level - 0 0.1 V fR Input Clock Pulse Voltage Condition Item 1, 2, LH, RS, CLP, ROG pulse voltage ­2­ ILX531A ILX531A Electrooptical Characteristics (Note 1) (Ta = 25°C, VDD = 12V, fR = 2MHz, Input clock = 5Vp-p, Light source = 3200K 3200K, IR cut filter CM-500S CM-500S (t = 1.0mm) Item Symbol Min. Typ. Max. Unit Remarks Sensitivity1 R1 8.2 11 13.8 V/(lx · s) Note 2 Sensitivity2 R2 - 25.1 - V/(lx · s) Note 3 Sensitivity nonuniformity PRNU - 4 10 % Note 4 Saturation output voltage VSAT 1.8 2.5 - V Note 5 Saturation exposure SE 0.13 0.23 - lx · s Note 6 Register imbalance RI - 1 7 % Note 7 Dark voltage average VDRK - 0.3 2.0 mV Note 8 Dark signal nonuniformity DSNU - 0.6 5.0 mV Note 9 Image lag IL - 0.02 - % Note 10 Supply current IVDD - 30 60 mA - Total transfer efficiency TTE 92 98 - % - Output impedance ZO - 150 - - Offset level VOS - 6.5 - V Note 11 Notes 1) In accordance with the given electrooptical characteristics, the even black level is defined as the average value of D6, D8, to D24. The odd black level is defined as the average value of D5, D7, to D23. 2) For the sensitivity test light is applied with a uniform intensity of illumination. 3) W lamp (2854K 2854K) 4) PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2. VOUT = 500mV (Typ.) PRNU = (VMAX ­ VMIN) /2 VAVE × 100 [%] Where the 5150 pixels are divided into blocks of even and odd pixels, respectively. The maximum output of each block is set to VMAX, the minimum output to VMIN and the average output to VAVE. 5) Use below the minimum value of the saturation output voltage. 6) Saturation exposure is defined as follows. SE = VSAT/R1 7) RI is defined as indicated bellow. VOUT = 500mV (Typ.) RI = | VODD-AVE ­ VEVEN-AVE | × 100 [%] VODD-AVE + VEVEN-AVE 2 ( ) Where average of odd pixels output is set to VODD-AVE, even pixels to VEVEN-AVE. 8) Optical signal accumulated time int stands at 10ms. 9) The difference between the maximum and average values of the dark output voltage is calculated for even and odd respectively. The larger value is defined as the dark signal nonuniformity. Optical signal accumulated time int stands at 10ms. ­3­ ILX531A ILX531A 10) VOUT = 500 mV (Typ.) 11) VOS is defined as indicated bellow. VOUT VOS GND ­4­ ­5­ VOUT-EVEN VOUT-ODD CLP-ODD CLP-EVEN 0 D71 D69 D70 D27 D28 D25 D26 D23 D24 D5 D6 D3 D4 D1 D2 1-line output period (5244 pixels) Note) The transfer pulses (1, 2, LH) must have more than 2622 cycles. Dummy signal (74 pixels) Optical black (48 pixels) D72 5 D73 D74 0 S1 S2 5 S3 S4 RS-ODD RS-EVEN S5145 S5145 S5146 S5146 0 S5147 S5147 S5148 S5148 5 S5149 S5149 S5150 S5150 2-ODD 2-EVEN D75 D76 0 D77 D78 5 D79 D80 1-ODD 1-EVEN LH-ODD LH-EVEN D82 0 D81 1 D84 5 D83 2 D94 ROG D93 3 Clock Timing Chart 1 (simultaneous output) ILX531A ILX531A 2622 ILX531A ILX531A Clock Timing Chart 2 t5 t4 ROG t2 t6 1 LH t7 t3 t1 2 Clock Timing Chart 3 t7 t6 1 LH 2 t10 t11 t9 RS t8 t14 t15 t13 CLP t12 t16 t17 VOUT Clock timing of 1, 2, LH, RS, CLP and VOUT at odd or even are the same as timing chart 3 in the case of alternate output. ­6­ ILX531A ILX531A Clock Timing Chart 4 Cross point 1 and 2 1 5V 1.5V (Min.) 1.5V (Min.) 2.0V (Min.) 0.5V (Min.) 2 0V Cross point LH and 2 2 5V LH 0V ­7­ 0 5 0 5 ­8­ 0 0 5 5 0 5 0 5 0 5 D72 D73 D70 D71 D69 D28 D26 D27 D24 D25 D23 S5148 S5148 S5146 S5146 S5147 S5147 S5145 S5145 S4 S2 S3 D74 S1 1-line output period (5244 pixels) Optical black (48 pixels) Dummy signal (74 pixels) D93 D84 D82 D83 D80 D81 D78 D79 D76 D77 S5150 S5150 D75 S5149 S5149 1 D3 D2 D1 Note) The transfer pulses (1, 2, LH) must have more than 2622 cycles. Alternate output is available by making 1-EVEN, 2-EVEN, LH-EVEN, RS-EVEN, CLP-EVEN delayed to 1-ODD, 2-ODD, LH-ODD, RS-ODD, CLP-ODD for half a cycle. VOUT-EVEN CLP-EVEN RS-EVEN VOUT-ODD CLP-ODD RS-ODD 2-EVEN 5 1-EVEN LH-EVEN 0 2-ODD 1-ODD LH-ODD D4 0 2 D5 5 3 D6 ROG 2622 D94 Clock Timing Chart 5 (alternate output) ILX531A ILX531A ILX531A ILX531A Clock Pulse Recommended Timing Item Symbol Min. Typ. Max. Unit ROG, 1 pulse timing t1 50 100 - ns ROG pulse high level period t2 600 1000 - ns ROG, 1 pulse timing t3 400 1000 - ns ROG pulse rise time t4 0 5 10 ns ROG pulse fall time t5 0 5 10 ns 1 pulse rise time/2 pulse fall time t6 0 20 60 ns 1 pulse fall time/2 pulse rise time t7 0 20 60 ns RS pulse high level period t8 10 - ns RS, CLP pulse timing t9 10 2001 2001 - ns RS pulse rise time t10 0 10 30 ns RS pulse fall time t11 0 10 30 ns CLP pulse high level period t12 10 - ns CLP, LH pulse timing t13 5 2001 501 - ns CLP pulse rise time t14 0 10 30 ns CLP pulse fall time t15 0 10 30 ns t16 - 8 - ns t17 - 15 - ns Signal output delay time 1 These timing is the recommended condition under f1 = 1MHz. ­9­ ­ 10 ­ RS 100 Data rate fR = 2MHz. CLP 100 LH 100 2 CLP-EVEN CLP-ODD 1 GND GND 5 5.1k 6 VOUT-ODD Tr1 7 VGG 2 2 1 9 10 ROG 11 IC1 47µF/16V F/16V IC1 : 74AC04 74AC04 Tr1 : 2SC2785 2SC2785 0.1µF 12V Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. VOUT-ODD IC1 4 100 RS-EVEN RS-ODD 0.1µF 20 LH-EVEN LH-ODD 8 19 VDD 3 VOUT-EVEN 21 2 12 13 14 15 16 VDD 22 2-ODD NC 17 VOUT-EVEN GND 1-ODD VDD Tr1 1-EVEN 2-EVEN 18 100 5.1k VDD ROG Application Circuit (simultaneous output) ILX531A ILX531A ILX531A ILX531A Example of Representative Characteristics Spectral sensitivity characteristics (Standard characteristics) 1.0 Relative sensitivity 0.8 0.6 0.4 0.2 0 400 500 600 700 800 Wavelength [nm] Dark signal output temperature characteristics (Standard characteristics) 900 1000 Integration time output voltage characteristics (Standard characteristics) 10 Output voltage rate Output voltage rate 5 1 0.5 0.1 0 10 20 30 40 50 Ta ­ Ambient temperature [°C] 1 0.5 0.1 60 Offset level vs. VDD characteristics (Standard characteristics) 1 VOS Ta Ta = 25°C VOS ­ Offset level [V] VOS ­ Offset level [V] 10 8 6 4 ­2mV/°C 8 6 4 0.6 2 0 11.4 10 Offset level vs. Temperature characteristics (Standard characteristics) 10 VOS VDD 5 int ­ integration time [ms] 2 12.0 VDD [V] 0 12.6 ­ 11 ­ 0 10 20 30 40 50 Ta ­ Ambient temperature [°C] 60 ILX531A ILX531A Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) Notes on Handling CCD Cer-DIP Packages The following points should be observed when handling and installing Cer-DIP packages. a) Remain within the following limits when applying static load to the ceramic portion of the package: (1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. Upper ceramic layer 39N Lower ceramic layer (1) 29N Low-melting glass 29N (2) (3) 0.9Nm (4) c) Be aware that any of the following can cause the glass to crack: because the upper and lower ceramic layers are shielded by low-melting glass, (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. (4) Rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. ­ 12 ­ ILX531A ILX531A 3) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. 4) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks. ­ 13 ­ 5.0 ± 0.5 ­ 14 ­ V H 11.12 ± 0.5 Cer-DIP TIN PLATING 42 ALLOY 7.1g LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT 2.54 PACKAGE MATERIAL 1 55.7 ± 0.5 54.2 11 12 0.51 22pin DIP (400mil) 36.05 (7µm × 5150Pixels) No.1 Pixel 22 Unit: mm PACKAGE STRUCTURE 4.0 ± 0.5 0.3 M 9.0 10.0 ± 0.5 3.58 4.28 ± 0.5 0° to 9° (AT STAND OFF) 10.16 2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5. 1. The height from the bottom to the sensor surface is 2.38 ± 0.3mm. 0.25 Package Outline ILX531A ILX531A