IDT74LVCH16541A 16-BIT MIL-STD-883 LVCH16541A DSC-4731/1 SO48-2 SO48-3

3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUFFER/ DRIVER WITH

IDT74LVCH16541A IDT74LVCH16541A 3.3V CMOS 16-BIT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT 16-BIT BUFFER/ DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION FEATURES: IDT74LVCH16541A IDT74LVCH16541A Typical tSK(0) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883 MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP and 0.40mm pitch TVSOP packages Extended commercial range of -40°C to +85°C VCC = 3.3V ±0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range CMOS power levels (0.4µ W typ. static) All inputs, outputs and I/O are 5 Volt tolerant Supports hot insertion This 16-bit buffer/driver is built using advanced dual metal CMOS technology. This high-speed, low power device is a noninverting 16-bit buffer composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable ( 1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state. All pins of this 16-bit buffer/driver can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. Drive Features for LVCH16541A LVCH16541A High Output Drivers: ±24mA Reduced system switching noise The LVCH16541A LVCH16541A has been designed with a ±24mA output driver. The driver is capable of driving a moderate to heavy load while maintaining speed performance. APPLICATIONS: The LVCH16541A LVCH16541A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. · 5V and 3.3V mixed voltage systems · Data communication and telecommunication systems Functional Block Diagram 1 OE 1 1 OE 2 1A 1 1 2 OE 1 48 47 2 OE 2 2 1Y 1 2A 1 TO SEVEN OTHER CHANN ELS 24 25 36 13 2Y 1 TO SEVEN OTHER CHANN ELS EXTENDED COMMERCIAL TEMPERATURE RANGE MARCH 1999 1 c 1999 Integrated Device Technology, Inc. DSC-4731/1 DSC-4731/1 IDT74LVCH16541A IDT74LVCH16541A 3.3V CMOS 16-BIT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Symbol VTERM(2) Description Terminal Voltage with Respect to GND (1) Max. 0.5 to +6.5 Unit V 1 OE 1 1 48 VTERM(3) Terminal Voltage with Respect to GND 0.5 to +6.5 V 1Y 1 2 47 1A 1 TSTG Storage Temperature 65 to +150 °C 1Y 2 3 46 1A 2 IOUT DC Output Current 50 to +50 mA GND 4 45 GND 44 1A 3 ±100 mA 1Y 4 6 Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through mA 1Y 3 IIK IOK ICC 50 5 43 1A 4 ISS each VCC or GND V CC 7 42 V CC 1Y 5 8 41 1A 5 1Y 6 9 40 GND 10 39 GND 1Y 7 11 38 1A 7 1Y 8 12 2Y 1 1 OE 2 LVC Link NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. 1A 6 13 SO 48-1 SO 48-2 37 SO 48-3 36 2A 1 2Y 2 14 35 2A 2 GND 15 34 GND 1A 8 2Y 3 16 33 2Y 4 17 32 V CC 18 2Y 5 CAPACITANCE (TA = +25OC, f = 1.0MHz) 2A 3 2A 4 Symbol CIN Parameter(1) Input Capacitance Conditions VIN = 0V Typ. 4.5 Max. 6 Unit pF 31 V CC COUT 6.5 8 pF 30 2A 5 2Y 6 20 29 2A 6 Output Capacitance I/O Port Capacitance VOUT = 0V 19 VIN = 0V 6.5 8 pF GND 21 28 GND 2Y 7 22 27 2A 7 2Y 8 23 26 2A 8 2 OE 1 24 25 2 OE 2 CI/O LVC Link NOTE: 1. As applicable to the device type. FUNCTION TABLE (each 8-bit section) (1) SSOP/ TSSOP/ TVSOP TOP VIEW OE1 Pin Names xOE xAx L L L L H H H 3-State Outputs X X Z X Data Inputs(1) xYx Outputs xYx L Description 3State Output Enable Inputs (Active LOW) xAx L PIN DESCRIPTION Inputs OE2 H X Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance NOTE: 1. These pins have "Bus-hold". All other pins are standard inputs, outputs, or I/Os. 2 IDT74LVCH16541A IDT74LVCH16541A 3.3V CMOS 16-BIT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = 40OC to +85OC Typ.(1) - Max. - 2 - - VCC = 2.3V to 2.7V - - 0.7 VCC = 2.7V to 3.6V VIL VCC = 2.3V to 2.7V Parameter Input HIGH Voltage Level Min. 1.7 VCC = 2.7V to 3.6V Symbol VIH - - 0.8 Test Conditions Input LOW Voltage Level Unit V V IIH IIL IOZH Input Leakage Current VCC = 3.6V VI = 0 to 5.5V - - ±5 µA High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V - - ±10 µA IOZL (3-State Output pins) IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO 5.5V - - ±50 µA VIK Clamp Diode Voltage VCC = 2.3V, IIN = 18mA - 0.7 1.2 V VH Input Hysteresis VCC = 3.3V ICCL ICCH ICCZ Quiescent Power Supply Current VCC = 3.6V ICC Quiescent Power Supply Current Variation - 100 - mV VIN = GND or VCC - - 10 µA 3.6 VIN 5.5V(2) - - 10 - - 500 One input at VCC - 0.6V other inputs at VCC or GND µA LVC Link NOTES: 1. Typical values are at VCC = 3.3V, +25°C ambient. 2. This applies in the disabled state only. BUS-HOLD CHARACTERISTICS Symbol IBHH Parameter(1) Bus-Hold Input Sustain Current Min. 75 Typ.(2) - Max. - VI = 0.8V VCC = 3.0V Test Conditions VI = 2.0V 75 - - IBHL IBHH Bus-Hold Input Sustain Current VCC = 2.3V VI = 1.7V IBHHO Bus-Hold Input Overdrive Current - - - - - VI = 0 to 3.6V VCC = 3.6V - VI = 0.7V IBHL - - ± 500 Unit µA µA µA IBHLO LVC Link NOTES: 1. Pins with Bus-hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3 IDT74LVCH16541A IDT74LVCH16541A 3.3V CMOS 16-BIT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOH Parameter Output HIGH Voltage VCC Test Conditions(1) = 2.3V to 3.6V IOH = 0.1mA Min. VCC 0.2 Max. - VCC = 2.3V IOH = 6mA 2 - VCC = 2.3V IOH = 12mA 1.7 - VCC = 2.7V 2.2 - VCC = 3.0V 2.4 - 2.2 - VCC = 3.0V VCC = 2.3V to 3.6V IOL = 0.1mA - 0.2 IOL = 6mA - 0.4 IOL = 12mA - 0.7 VCC = 2.7V IOL = 12mA - 0.4 VCC = 3.0V Output LOW Voltage IOH = 24mA VCC = 2.3V VOL Unit V IOL = 24mA - 0.55 V LVC Link NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = 40°C to +85°C. OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C Symbol CPD Parameter Power Dissipation Capacitance per buffer/driver Outputs enabled CPD Power Dissipation Capacitance per buffer/driver Outputs disabled SWITCHING CHARACTERISTICS Test Conditions CL = 0pF, f = 10Mhz Parameter Propagation Delay xAx to xYx Output Enable Time xOEx to xYx Output Disable Time xOEx to xYx Output Skew(2) Unit pF 4 pF Unit ns (1) VCC = 2.7V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Typical 35 VCC = 3.3V±0.3V Min. Max. 5 Min. 1.1 Max. 4.2 6.9 1.5 5.6 7.4 1.9 6.8 500 NOTES: 1. See test circuits and waveforms. TA = 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 4 ns ns ps IDT74LVCH16541A IDT74LVCH16541A 3.3V CMOS 16-BIT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS PROPAGATION DELAY Symbol VLOAD VCC(1)= 3.3V ±0.3V VCC(1) = 2.7V VCC(2)= 2.5V ±0.2V Unit 2 x Vcc V 6 6 VIH 2.7 2.7 Vcc V SAME PHAS E IN P U T T R A N S IT IO N VT 1.5 1.5 VCC / 2 V OUTPUT VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF V IH VT 0V t P LH tP H L t P LH tP H L VOH VT VOL V IH VT 0V O P P O S IT E P H A S E IN P U T T R A N S IT IO N LVC Link ENABLE AND DISABLE TIMES TEST CIRCUITS FOR ALL OUTPUTS P ulse (1, 2) G en erato r V IN V OUT OUTPUT SW IT C H N O R M A LLY C L O SE D LO W tP Z H O U T P U T SW IT C H N O R M A LLY OPEN H IG H 500 CL DEFINITIONS: LVC Lin k CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 0V t P LZ V LO A D /2 V LO A D /2 VT V LZ VOL tP H Z VT V OH VHZ 0V 0V LVC Lin k NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate 10MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns. SET-UP, HOLD, AND RELEASE TIMES SWITCH POSITION Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests VT tP Z L GND D .U .T . RT V IH C O N TR O L IN P U T O pen 500 D IS A B LE E N A B LE V LO A D VCC LV C Link D A TA IN P U T Switch VLOAD tS U V IH VT 0V V IH VT 0V V IH VT 0V V IH VT 0V tH T IM IN G IN P U T GND Open SYNCHRONOUS C O N TR O L tR E M ASYNCHRONOUS C O N TR O L tS U tH LVC Link LV C Link OUTPUT SKEW - tsk (x) PULSE WIDTH V IH IN P U T VT 0V t P H L1 t P LH 1 LO W -H IG H -LO W P U LS E VOH VT OUTPUT 1 t S K (x) t S K (x) tW V OL H IG H -LO W -H IG H P U LS E VOH t P LH 2 t P H L2 t S K (x) = t P LH 2 - t P LH 1 o r t P H L2 - t P H L1 LV C NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. VT LV C Link VT V OL OUTPUT 2 VT Link 5 IDT74LVCH16541A IDT74LVCH16541A 3.3V CMOS 16-BIT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX LVC Tem p. Range X XX XXXX XX Bus-Hold Fam ily Device Type Package PV PA PF Shrink Sm all Outline Package (SO 48-1) Thin Shrink Sm all Outline Package (SO48-2 SO48-2) Thin Very Sm all O utline Package (SO48-3 SO48-3) 541A 16-Bit Buffer/Driver with 3 State O utputs and 5 Volt Tolerant I/O 16 Double-Density with Resistors, ±24m A H Bus-hold 74 -40°C to +85°C CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo is a registered trademark of Integrated Device Technology, Inc. 6