IDT74ALVCH32244 32-BIT MIL-STD-883 ALVCH32244 DSC-4906/- DSC-123456 BF96-1

3.3V CMOS 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT BUFFER/DRIVER WITH

IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: IDT74ALVCH32244 IDT74ALVCH32244 0.5 MICRON CMOS Technology Typical tSK(o) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883 MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.8mm pitch LFBGA package, 96 balls Extended commercial range of -40°C to +85°C VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range VCC = 2.5V ± 0.2V CMOS power levels (0.4µ W typ. static) Rail-to-Rail output swing for increased noise margin This 32-bit buffer/driver is built using advanced dual metal CMOS technology. This high-speed, low power device offers bus/backplane interface capability with improved packing density. The device has a flowthrough organization for simplifying board layout. The three-state controls operate this device in a Quad-Nibble, Dual-Byte or single 16-bit word mode. All inputs are designed with hysteresis for improved noise margin. The ALVCH32244 ALVCH32244 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH32244 ALVCH32244 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. Drive Features for ALVCH32244 ALVCH32244: High Output Drivers: ±24mA Suitable for heavy loads APPLICATIONS: · 3.3V High Speed Systems · 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1 OE 1A 1 1A 2 1A 3 1A 4 2 OE 2A 1 A3 A5 A6 B5 B6 3 OE A2 A1 B2 B1 1Y 2 1Y 3 1Y 4 3A 2 4 OE C5 C6 C2 C1 D5 D2 2A 3 D6 D1 2Y 1 2Y 2 2Y 3 2Y 4 E5 E2 E6 E1 F2 3A 3 3A 4 4A 1 4A 2 F6 F1 3Y 1 5A 1 J5 J2 5Y 1 3Y 2 5A 2 J6 J1 5Y 2 K5 K2 3Y 3 5A 3 3Y 4 5A 4 H3 6 OE G5 G2 G6 G1 H6 H1 4A 3 4A 4 7 OE 5 OE F5 3A 1 A4 2A 2 2A 4 1Y 1 J3 H4 H5 H2 4Y 1 6A 1 4Y 2 K6 L5 L6 M5 L2 L1 M2 6A 4 M6 EXTENDED COMMERCIAL TEMPERATURE RANGE M1 6Y 1 6Y 2 6Y 3 6Y 4 N5 N2 N6 N1 P5 7A 1 P2 P6 P1 7A 2 7A 3 7A 4 8 OE 6A 3 4Y 4 5Y 4 J4 6A 2 4Y 3 K1 5Y 3 T4 R5 R2 R1 T6 T1 T5 T2 8A 2 8A 3 8A 4 7Y 2 7Y 3 7Y 4 T3 R6 8A 1 7Y 1 8Y 1 8Y 2 8Y 3 8Y 4 FEBRUARY 2000 1 c 1999 Integrated Device Technology, Inc. DSC-4906/- DSC-4906/- IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATION 6 1A 2 1A 4 2A 2 2A 4 3A 2 3A 4 4A2 4A3 5A2 5A4 6A 2 6A 4 7A 2 7A 4 8A 2 8A 3 5 1A 1 1A 3 2A 1 2A 3 3A1 3A 3 4A1 4A 4 5A 1 5A 3 6A 1 6A 3 7A 1 7A 3 8A1 8A 4 4 2 OE GND VCC GND GND V CC GND 3 OE 6 OE GND V CC GND GND V CC GND 7 OE 3 1 OE GND V CC GND GND V CC GND 4 OE 5 OE GND V CC GND GND V CC GND 8 OE 2 1Y1 1Y3 2Y 1 2Y 3 3Y 1 3Y 3 4Y1 4Y4 5Y 1 5Y 3 6Y 1 6Y 3 7Y1 7Y3 8Y 1 8Y4 1 1Y 2 1Y 4 2Y 2 2Y 4 3Y 2 3Y 4 4Y2 4Y 3 5Y 2 5Y 4 6Y 2 6Y 4 7Y 2 7Y 4 8Y2 8Y 3 B C D E F G H J A L K M N P R T 32244 LFBGA TOPVIEW 96 BALL LFBGA PACKAGE ATTRIBUTES 1 .5 m m M a x . 1 .4 m m N o m . 1 .3 m m M in . 0 .8 m m 6 5 4 TO P VIEW 3 2 1 A B C D E F G H J K L M N P R T A B C D E F G H J K L M N P R T 1 2 3 5 .5 m m 4 5 6 1 3 .5 m m 2 IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS ABSOLUTE MAXIMUM RATING Symbol VTERM(2) EXTENDED COMMERCIAL TEMPERATURE RANGE (1) CAPACITANCE (TA = +25oC, f = 1.0MHz) Max. 0.5 to + 4.6 Unit V 0.5 to VCC + 0.5 65 to + 150 V TSTG Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature °C IOUT DC Output Current 50 to + 50 mA VTERM(3) IIK ± 50 50 Continuous Current through each VCC or GND ±100 Conditions VIN = 0V Typ. 5 Max. 7 Unit pF Output Capacitance I/O Port Capacitance VOUT = 0V 7 9 pF VIN = 0V 7 9 pF CI/O NEW16link NOTE: 1. As applicable to the device type. mA ICC ISS Parameter(1) Input Capacitance COUT mA IOK Continuous Clamp Current, VI < 0 or VI > VCC Continuous Clamp Current, VO < 0 Symbol CIN mA NEW16link NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. FUNCTION TABLE (each 4-bit buffer) (1) xOE Inputs PIN DESCRIPTION xAx Outputs xYx Pin Names xOE Description 3State Output Enable Inputs (Active LOW) L H H L L L xAx Data Inputs(1) H X Z xYx 3-State Outputs NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance NOTE: 1. These pins have "Bus-Hold." All other pins are standard inputs, outputs, or I/Os. c 1998 Integrated Device Technology, Inc. 3 DSC-123456 DSC-123456 IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = 40°C to +85°C Parameter Input HIGH Voltage Level VCC = 2.3V to 2.7V Min. 1.7 Typ.(1) - Max. - VCC = 2.7V to 3.6V Symbol VIH 2 - - VCC = 2.3V to 2.7V - - 0.7 Test Conditions Unit V VIL Input LOW Voltage Level - - 0.8 IIH Input HIGH Current VCC = 3.6V VI = VCC - - ±5 IIL Input LOW Current VCC = 3.6V VI = GND - - ±5 IOZH High Impedance Output Current VCC = 3.6V VO = VCC - - ± 10 µA IOZL (3-State Output pins) VO = GND - - ± 10 µA VIK Clamp Diode Voltage VCC = 2.3V, IIN = 18mA - 0.7 1.2 V VH Input Hysteresis VCC = 3.3V - 100 - mV VCC = 3.6V VIN = GND or VCC - 0.1 40 µA Quiescent Power Supply Current Quiescent Power Supply Current Variation One input at VCC - 0.6V, other inputs at VCC or GND - - 750 µA VCC = 2.7V to 3.6V ICCL ICCH ICCZ ICC V µA NEW16link NOTE: 1. Typical values are at VCC = 3.3V, +25°C ambient. BUS-HOLD CHARACTERISTICS Symbol IBHH Parameter(1) Bus-Hold Input Sustain Current 75 - - 45 - - VI = 0.7V Bus-Hold Input Sustain Current 45 - - VI = 0 to 3.6V - - ± 500 VI = 1.7V VCC = 2.3V Bus-Hold Input Overdrive Current VCC = 3.6V IBHL IBHHO Max. - Min. 75 IBHL IBHH Typ.(2) - Test Conditions VI = 2.0V VI = 0.8V VCC = 3.0V Unit µA µA µA IBHLO NEW16link NOTES: 1. Pins with Bus-hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25°C ambient. 4 IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOH Parameter Output HIGH Voltage VCC Test Conditions(1) = 2.3V to 3.6V IOH = 0.1mA Min. VCC 0.2 Max. - VCC = 2.3V IOH = 6mA 2 - VCC = 2.3V IOH = 12mA 1.7 - 2.2 - VCC = 2.7V VCC = 3.0V Output LOW Voltage 2.4 - VCC = 3.0V VOL Unit V IOH = 24mA 2 - VCC = 2.3V to 3.6V IOL = 0.1mA - 0.2 VCC = 2.3V IOL = 6mA - 0.4 IOL = 12mA - 0.7 VCC = 2.7V IOL = 12mA - 0.4 VCC = 3.0V IOL = 24mA - V 0.55 NEW16link NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = 40°C to + 85°C. OPERATING CHARACTERISTICS, TA = 25oC VCC = 2.5V ± 0.2V Symbol CPD CPD Typical 32 Test Conditions CL = 0pF, f = 10Mhz Typical 38 8 Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled VCC = 3.3V ± 0.3V 10 Unit pF pF SWITCHING CHARACTERISTICS (1) VCC = 2.5V ± 0.2V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay xAx to xYx Output Enable Time xOE to xYx Output Disable Time xOE to xYx Output Skew(2) VCC = 2.7V VCC = 3.3V ± 0.3V Min. 1 Max. 3.7 Min. - Max. 3.6 Min. 1 Max. 3 1 5.7 - 5.4 1 4.4 1 5.2 - 4.6 1 4.1 - - - - - 500 NOTES: 1. See test circuits and waveforms. TA = 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 5 Unit ns ns ns ps IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS PROPAGATION DELAY Symbol VLOAD VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V 6 6 2 x Vcc Unit V VIH 2.7 2.7 Vcc V SAM E PHAS E INPUT TRANSITION VT 1.5 1.5 Vcc / 2 V OUTPUT VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 tPLH tPH L tPLH V IH VT 0V tPH L V OH VT V OL V IH VT 0V OPPOSITE PHASE INPUT TRANSITION pF NEW16link ALVC Link TEST CIRCUITS FOR ALL OUTPUTS ENABLE AND DISABLE TIMES V LOAD V CC 500 (1, 2) V IN CONTROL INPUT GND tPZL V OU T Pulse Generator D.U.T. OUTPUT SW ITCH NORM ALLY CLOSE D LOW tPZH OUTPUT SW ITCH NORM ALLY OPEN HIGH 500 RT DISABLE ENABLE Open CL ALVC Link DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 10MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns. V LOAD /2 V LOAD /2 VT V LZ V OL tPH Z V OH V HZ VT 0V 0V NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. SET-UP, HOLD, AND RELEASE TIMES DATA INPUT Switch VLOAD tS U tH tR EM ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL Open tS U tH NEW16link INPUT TSK ALV C Link (x) V IH VT 0V tPH L1 tPLH1 PULSE WIDTH V OH OUTPUT 1 tSK (x) V IH VT 0V V IH VT 0V V IH VT 0V V IH VT 0V TIMING INPUT GND OUTPUT SKEW - 0V ALVC Link SWITCH POSITION Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests tPLZ V IH VT LOW -HIGH-LOW PULSE VT V OL tSK (x) tW V OH VT V OL OUTPUT 2 VT HIGH-LOW -HIGH PULSE VT ALV C Link tPLH2 tPH L2 tSK (x) = t PLH2 - tP LH1 or tPH L2 - tP HL1 ALV C Link NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 6 IDT74ALVCH32244 IDT74ALVCH32244 3.3V CMOS 32-BIT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX ALVC Temp. Range X XX Bus-Hold Family XXXX XX Device Type Package BF 244 32-bit Buffer/Driver with 3-State Outputs 32 32-Bit Bus Density with Resistors, ±24mA H Bus-Hold 74 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 Low Profile Fine Pitch Ball Grid Array (BF96-1 BF96-1) -40°C to +85°C for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo is a registered trademark of Integrated Device Technology, Inc. 7