ICE2AS01 D-81541 ICE2AS01G PI-001-190101 PI-004-190101 PI-006-190101 - Datasheet Archive
a Da ta sheet, Version 2.1, F ebruary 2001 D ICE2AS01 re li m in ar y Off-Line SMPS Current Mode Controller P P o w e r M a n a g
at a Da ta sheet, Version 2.1, F ebruary 2001 D ICE2AS01 ICE2AS01 re li m in ar y Off-Line SMPS Current Mode Controller P P o w e r M a n a g em e n t & S u p p l y N e v e r s t o p t h i n k i n g . ICE2AS01 ICE2AS01 Revision History: 2001-02-28 Previous Version: First One Page Datasheet Subjects (major changes since last revision) For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com CoolMOSTM, CoolSETTM are trademarks of Infineon Technologies AG. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: email@example.com Edition 2001-02-28 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 D-81541 München © Infineon Technologies AG 1999. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. ICE2AS01 ICE2AS01 Preliminary Specification Off-Line SMPS Current Mode Controller Product Highlights P-DIP-8-4 · · · · High Sophisticated Protection Unit Very Accurate Current Limiting Auto Restart Mode Low Power Standby Mode P-DSO-8-3 Features Description · · · · · This stand alone controller provides several special enhancements to satisfy the needs for low power standby and protection features. In standby mode frequency reduction is used to lower the power consumption and support a stable output voltage in this mode. The frequency reduction is limited to 21 kHz to avoid audible noise. In case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in Auto Restart Mode which is controlled by the internal protection unit. By means of the internal precise peak current limitation the dimension of the transformer and the secondary diode can be lower which leads to more cost efficiency. · · · · · · · · Only few external Components required Input Undervoltage Lockout 100kHz Switching Frequency Max Duty Cycle 72% Low Power Standby Mode to support "Blue Angle" Norm Thermal Shut Down with Auto Restart Overload and Open Loop Protection Overvoltage Protection during Auto Restart Adjustable Peak Current Limitation via External Resistor Overall Tolerance of Current Limiting 140°C 4.8V 5.3V 4.0V 16.5V VCC G2 G1 fosc 100kHz 21.5kHz Q Q UFB Error-Latch R S Power-Up Reset Standby Unit G3 8.5V Power-Down Reset 13.5V x3.65 C5 PWM Comparator Soft-Start Comparator 6.5V 5.3V 4.8V 4.0V Improved Current Mode PWM OP 0.8V 0.3V Soft Start Voltage Reference Internal Bias Power Management Undervoltage Lockout Spike Blanking 5µs CVCC CLine G4 Current Limiting R S Vcsth Q Q PWM-Latch 0.72 Propagation-Delay Compensation Current-Limit Comparator 21.5-100kHz Clock Duty Cycle max Oscillator Leading Edge Blanking 200ns Gate Driver D1 10k RSense Optocoupler Isense Gate Snubber + Converter DC Output VOUT - 2 SoftS 85 . 270 VAC RStart-up ICE2AS01 ICE2AS01 Preliminary Specification Representative Blockdiagram Representative Blockdiagram Representative Blockdiagram February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description 3 Functional Description 3.1 Power Management 3.2 M ain L in e (1 00 V -3 80 V ) Improved Current Mode S o ft-S ta rt C o m p a ra to r R S tart-U p P rim ary W in ding P W M -L a tch FB C VC C R Q D rive r VCC P W M C o m p a ra to r Pow er M anagem ent S U n de rvolta g e Q In te rn a l L o ckou t B ias 0 .8V 1 3 .5V 8 .5 V P o w er-D ow n PW M OP 6.5 V R e set 5.3 V V o lta g e x3 .6 5 4.8 V R efe ren ce 4.0 V P o w er-U p Ise n se Im proved C urrent M ode R e se t R Q P W M -L atch Figure 4 6 .5 V S R Soft-Sta rt S o ftS Q Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal. E rro r-L a tch S o ft-S ta rt C om p ara tor C S oft-Start T1 Current Mode E rror-D ete ctio n A m p lified C u rren t S ig n al Figure 3 Power Management FB The Undervoltage Lockout monitors the external supply voltage VVCC. In case the IC is inactive the current consumption is max. 55µA. When the SMPS is plugged to the main line the current through RStart-up charges the external Capacitor CVCC. When VVCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After it the internal bandgap generates a reference voltage VREF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by reseting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero. Datasheet Preliminary Data 0 .8 V D rive r t T on t Figure 5 Pulse Width Modulation In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by reseting the PWM-Latch (see Figure 5). 7 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description The primary current is sensed by the series resistor RSense inserted in the source of the external Power Switch. By means of Current Mode the regulation of the secondary voltage is insensitive on line variations. Line variation causes varition of the increasing current slope which controls the duty cycle. The external RSense allows an individual adjustment of the maximum source current of the external Power Switch. V OSC m a x. D u ty C yc le V olta ge R a m p t S oft-S tart C o m p ara to r P W M C o m pa ra to r 0 .8 V FB FB 0 .3 V P W M -La tch O s cilla to r G a te D rive r 0.3V t C5 G a te D rive r V O SC 0.8V 1 0 k x3 .6 5 R1 T2 C1 V1 2 0p F t PW M OP Figure 7 3.2.1 V oltage Ram p Figure 6 PWM-OP The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin ISense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator. Improved Current Mode To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1 (see Figure 6, Figure 7). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start (see Figure 7). In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the C5 Comparator the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continously till 0% by decreasing VFB below that threshold. Datasheet Preliminary Data Light Load Conditions 3.2.2 PWM-Comparator The PWM-Comparator compares the sensed current signal of the external Power Switch with the feedback signal VFB (see Figure 8). VFB is created by an external optocoupler or external transistor in combination with the internal pullup resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the external Power Switch exceeds the signal VFB the PWM-Comparator switches off the Gate Driver. 8 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description pullup resistor RSoft-Start. The Soft-Start-Comparator compares the voltage at pin SoftS at the negative input with the ramp signal of the PWM-OP at the positive input. When Soft-Start voltage VSoftS is less than Feedback voltage VFB the Soft-Start-Comparator limits the pulse width by reseting the PWM-Latch (see Figure 9). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. By means of the above mentioned CSoft-Start the Soft-Start can be defined by the user. The Soft-Start is finished when VSoftS exceeds 5.3V. At that time the Protection Unit is activated by Comparator C4 and senses the FB by Comparator C3 wether the voltage is below 4.8V which means that the voltage on the secondary side of the SMPS is settled. The internal Zener Diode at SoftS with breaktrough voltage of 5.6V is to prevent the internal circuit from saturation (see Figure 10). 6 .5 V S o ft-S ta rt C o m p ara to r R FB FB P W M -L atch P W M C o m p a rato r 0 .8 V O p to co u p le r PW M OP Ise n se 6 .5 V x3 .65 R S o ft-S ta rt Im proved Current M ode 3.3 E rro r-L a tc h R C4 Q R G2 Q S S o ftS 6 .5 V 5 .3 V Figure 8 P o w e r-U p R e s e t 5 .6 V Q PWM Controlling 4 .8 V R FB Soft-Start FB C3 G a te D riv e r C lo c k V S oftS S Q P W M -L a tc h Figure 10 5 .6 V 5 .3 V The Start-Up time TStart-Up within the converter output voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 11). T S oft-S tart G a te D rive r Activation of Protection Unit C Soft - Start = t T Soft - Start R Soft - Start × 1, 69 By means of Soft-Start there is an effective minimization of current and voltage stresses on the external Power Switch, the clamp circuit and the output overshoot and prevents saturation of the transformer during Start-Up. t Figure 9 Soft-Start Phase The Soft-Start is realized by the internal pullup resistor RSoft-Start and the external Capacitor CSoft-Start (see Figure 2). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal Datasheet Preliminary Data 9 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description V S o ftS kHz 100 f OSC 5 .3 V T S oft-S ta rt V FB 65 21,5 0,9 t 1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 1,9 2 V V FB 4 .8 V Figure 12 3.5 V OUT T S ta rt-U p t Start Up Phase 3.4 Oscillator and Frequency Reduction 3.4.1 Oscillator 3.5.1 The oscillator generates a frequency fswitch = 100kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of Dmax=0.72. 3.4.2 Current Limiting There is a cycle by cycle current limiting realised by the Current-Limit Comparator to provide a overcurrent detection. The source current of the external Power Switch is sensed via an external sense resistor RSense . By means of RSense the source current is transformed to a sense voltage VSense. When the voltage VSense exceeds the internal threshold voltage Vcsth the Current-Limit-Comparator immediately turns off the gate drive. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immedeate shut down of the Power Switch in case of overcurrent. t V O UT Figure 11 Frequency Dependence Leading Edge Blanking V S en s e V c s th t L E B = 22 0 ns Frequency Reduction The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 12. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 21.5 kHz to avoid audible noise in any case. Datasheet Preliminary Data t Figure 13 Leading Edge Blanking Each time when the external Power Switch is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of tLEB = 220ns. During that time the output of the Current-Limit Comparator cannot switch off the gate drive. 10 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description 3.5.2 Propagation Delay Compensation V OSC In case of overcurrent detection the shut down of the external Power Switch is delayed due to the propagation delay of the circuit. This delay causes an overshoot of the peak current Ipeak which depends on the ratio of dI/dt of the peak current (see Figure 14). . S ig n a l2 S ig n a l1 t P ro pa ga tion D e la y I S e ns e I p ea k 2 I p ea k 1 I L im it V S en se I O v ers h oo t2 P ro p a g a tio n D e la y V csth I O v e rs ho ot1 S ign a l1 S ig n a l2 t t Figure 14 Figure 15 Current Limiting The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compensation is integrated to bound the tolerance of the internal current limiting at ± 5%. That means the propagation delay time between exceeding the current sense threshold Vcsth and the switch off of the external Power Switch is compensated over temperature within a range of at least . 0 RSense × dI peak dt Dynamic Voltage Threshold Vcsth with compensation without compensation V 1,3 1,25 VSense 1,2 1,15 1,1 1,05 ± 5 % T olera nce 1 dV 1 Sense dt 0,95 0,9 0 0,2 0,4 0,6 0,8 1 1,2 dVSense dt So current limiting is now capable in a very accurate way (see Figure 16). E.g. Ipeak = 0.5A with RSense = 2 . Without propagation delay compensation the current sense threshold is set to a static voltage level Vcsth=1V. A current ramp of dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a propagation delay time of i.e. tPropagation Delay =180ns leads then to an Ipeak overshoot of 12%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 15). The propagation delay compensation is done by means of an dynamic voltage threshold Vcsth (see Figure 15). In case of a steeper slope the switch off of the driver is earlier to compensate the delay. Figure 16 3.6 1,4 1,6 1,8 2 V µs Overcurrent Shutdown PWM-Latch The oscillator clock output applies a set pulse to the PWM-Latch when initiating the external Power Switch conduction. After setting the PWM-Latch can be reset by the PWM-OP, the Soft-Start-Comparator, the Current-Limit-Comparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of reseting the driver is shut down immediately. 3.7 Driver The driver is a fast totem pole gate drive, which is designed to avoid cross conduction currents and which is equipped with a Zener diode Z1 (see Figure 17) in order to improve the control of the gate attached power Datasheet Preliminary Data 11 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5µs and the external Power Switch is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode. transistors as well as to protect them against undesirable gate overvoltages. VCC P W M -La tch 3.8.1 1 Overload & Open loop with normal load G a te Z1 O verload & O pen loop/norm al load FB 5µ s B la n king 4 .8 V F a ilu re D e te ctio n Figure 17 Gate Driver t S o ftS At voltages below the undervoltage lockout threshold VVCCoff the gate drive is active low. The driver-stage is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the external Power Switch threshold. This is achieved by a slope control of the rising edge at the driver's output (see Figure 18). 5 .3 V S o ft-S ta rt P h a se D rive r t T B u rs t1 T R e s tart V G a te ca . t = 1 3 0 n s C L o ad = 1n F t VC C 5V 1 3 .5 V 8 .5 V t Figure 18 Gate Rising Slope t Figure 19 Thus the leading switch on spike is minimized. When the external Power Switch is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. 3.8 Auto Restart Mode Figure 19 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure20). Protection Unit (Auto Restart Mode) An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three Datasheet Preliminary Data 12 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description 3.8.2 Overvoltage due to open loop with no load 6.5 V P o w e r U p R e se t S o ftS R S oft-S tart O pen loop & no load conditio n FB 5 µs B la n kin g 4 .8V C S oft-S tart C4 5 .3 V E rro r-L a tch F ailure D ete ction G2 T1 4 .8V C3 FB S o ftS 5 .3V R FB 4 .0V 6 .5 V Figure 20 t S o ft-S ta rt P ha se O v erv olta g e D e te ction P ha se FB-Detection D rive r T R es ta rt The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage VFB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inactivates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VCC increases till VCCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor RStart-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pullup resistor RSoftStart . During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload. But the Soft-Start Phase must be finished within the Start Up Phase to force the voltage at pin FB below the failure detection threshold of 4.8V. Datasheet Preliminary Data t T B urs t2 O ve rvo ltag e D ete ctio n t VCC 1 6.5 V 1 3.5 V 8.5 V t Figure 21 Auto Restart Mode Figure 21 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 22). 13 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Functional Description VCC 6 .5 V C1 1 6 .5 V E rro r L a tch G1 R S o ft-S ta rt 4 .0 V C2 S o ftS C S o ft-S ta rt T1 Figure 22 P o w e r U p R e se t Overvoltage Detection The overvoltage detection is provided by Comparator C1 only in the first time during the Auto Restart Mode till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case TBurst2 is shorter than TSoftStart . By means of C2 the normal operation mode is prevented from overvoltage detection due to varying of VCC concerning the regulation of the converter output. When the voltage VSoftS is above 4.0V the overvoltage detection by C1 is deactivated. 3.8.3 Thermal Shut Down Thermal Shut Down is latched by the Error-Latch when junction temperature Tj of the pwm controller is exceeding an internal threshold of 140°C. In that case the IC switches in Auto Restart Mode. Note: All the values which are mentioned in the functional description are typical. Please look in Electrical Characteristics for min/max limit values. Datasheet Preliminary Data 14 February 2001 Preliminary Specification 4 Electrical Characteristics 4.1 ICE2AS01 ICE2AS01 Absolute Maximum Ratings Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit. Parameter Symbol Limit Values min. Unit Remarks max. VCC Supply Voltage VCC -0.3 21 V FB Voltage VFB -0.3 6.5 V SoftS Voltage VSoftS -0.3 6.5 V ISense ISense -0.3 3 V Junction Temperature Tj -40 150 °C Storage Temperature TS -50 150 °C Thermal Resistance Junction-Ambient RthJA - 90 K/W 4.2 Note: Controller & CoolMOS P-DIP-8-6 Operating Range Within the operating range the IC operates as described in the functional description. Parameter Symbol Limit Values min. Unit Remarks max. VCC Supply Voltage VCC VCCoff 21 V Junction Temperature of Controller TJCon -25 130 °C Ambient Temperature TA -25 100 °C Datasheet Preliminary Data 15 limited due to thermal shut down of controller February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Electrical Characteristics 4.3 Characteristics 4.3.1 Supply Section Note: The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and ambient temperature range TA from 25 °C to 100 °C.Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 14 V is assumed. Parameter Symbol Limit Values min. typ. Unit Test Condition max. Start Up Current IVCC1 - 27 55 µA VCC=VCCon -0.1V Supply Current with Inactiv Gate IVCC2 - 5.3 7 mA VSoftS = 0 IFB = 0 Supply Current with Activ Gate IVCC3 - 6.5 8 mA VSoftS = 5V IFB = 0 CGate = 1nF VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis VCCon VCCoff VCCHY 13 4.5 13.5 8.5 5 14 5.5 V V V 4.3.2 Internal Voltage Reference Parameter Symbol Limit Values min. Trimmed Reference Voltage 4.3.3 VREF typ. 6.50 6.63 Test Condition V measured at pin FB Unit Test Condition max. 6.37 Unit Control Section Parameter Symbol Limit Values min. typ. max. Oscillator Frequency fOSC1 93 100 107 kHz VFB = 4V Reduced Osc. Frequency fOSC2 - 21.5 - kHz VFB = 1V 4.5 4.65 4.9 Frequency Ratio fosc1/fosc2 Max Duty Cycle Dmax 0.67 0.72 0.77 Min Duty Cycle Dmin 0 - - PWM-OP Gain AV 3.45 3.65 3.85 Max. Level of Voltage Ramp VMax-Ramp - 0.85 - V VFB Operating Range Min Level VFBmin 0.3 - - V VFB Operating Range Max level VFBmax - - 4.6 V Feedback Resistance RFB 3.0 3.7 4.9 k Soft-Start Resistance RSoft-Start 42 50 62 k Datasheet Preliminary Data 16 VFB < 0V February 2001 Preliminary Specification 4.3.4 ICE2AS01 ICE2AS01 Protection Unit Parameter Symbol Limit Values min. typ. Unit Test Condition max. Over Load & Open Loop Detection Limit VFB2 4.65 4.8 4.95 V VSoftS > 5.5V Activation Limit of Overload & Open Loop Detection VSoftS1 5.15 5.3 5.46 V VFB > 5V Deactivation Limit of Overvoltage Detection VSoftS2 3.88 4.0 4.12 V VFB > 5V VCC > 17.5V Overvoltage Detection Limit VVCC1 16 16.5 17.2 V VSoftS < 3.8V VFB > 5V Latched Thermal Shutdown TjSD 130 140 150 °C guaranteed by design Spike Blanking tSpike - 5 - µs 4.3.5 Current Limiting Parameter Symbol Limit Values min. typ. Unit Test Condition max. Peak Current Limitation (incl. Propagation Delay Time) (see Figure 7) Vcsth 0.95 1.00 1.05 V Leading Edge Blanking tLEB - 220 - ns 4.3.6 Driver Section Parameter Symbol Limit Values Unit Test Condition min. 0.95 - V VVCC = 5 V IGate = 5 mA 1 - V VVCC = 5 V IGate = 20 mA 0.88 - V IGate = 0 A - 1.6 - V IGate = 50 mA - Datasheet Preliminary Data - - VGATE max. - GATE Low Voltage typ. 0.2 - V IGate = -50 mA 17 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Electrical Characteristics GATE High Voltage - V VVCC = 20V CL = 1 nF 10.5 - V VVCC = 12V CL = 1 nF 7.5 - V VVCC = VVCCoff + 0.2V CL = 1 nF - 80 - ns VGate = 2V .9V1) CL = 1 nF - tr 11.5 GATE Rise Time - VGATE 50 - ns VGate = 3V .6V1) CL = 1 nF GATE Fall Time tf - 20 - ns VGate = 9V .2V1) CL = 1 nF GATE Current, Peak, Rising Edge IGATE -0.5 - - A CL = 4.7nF2) GATE Current, Peak, Falling Edge IGATE - - 0.4 A CL = 4.7nF2) 1) Transient reference value 2) Design characteristics (not meant for production testing) Datasheet Preliminary Data 18 February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Typical Performance Characteristics Typical Performance Characteristics 13,58 VCC Turn-On Threshold VCCon [V] 40 36 34 32 PI-001-190101 PI-001-190101 Start Up Current IVCC1 [µA] 38 30 28 26 24 22 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 13,56 13,54 13,52 13,50 13,48 13,46 13,44 13,42 -25 -15 105 115 125 PI-004-190101 PI-004-190101 5 -5 5 Junction Temperature [°C] Start Up Current IVCC1 vs. Tj Figure 26 VCC Turn-Off Threshold VVCCoff [V] 5,7 5,4 5,1 4,8 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 75 85 95 105 115 125 8,61 8,58 8,55 8,52 8,49 8,46 8,43 8,40 -25 -15 -5 5 6,8 6,6 6,4 6,2 6,0 5,8 5,6 -5 5 15 25 35 45 55 65 75 85 25 35 45 55 65 75 85 95 105 115 125 95 105 115 125 VCC Turn-Off Threshold VVCCoff vs. Tj 5,10 5,07 5,04 5,01 4,98 4,95 4,92 4,89 4,86 4,83 -25 -15 Junction Temperature [°C] -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 28 Supply Current IVCC3 vs. Tj Datasheet Preliminary Data 15 PI-006-190101 PI-006-190101 VCC Turn-On/Off Hysteresis VCCHY [V] 7,0 PI-002-190101 PI-002-190101 Supply Current IVCC3 [mA] 65 8,64 Figure 27 Supply Current IVCC2 vs. Tj 7,2 Figure 25 55 Junction Temperature [°C] 7,4 5,4 -25 -15 45 VCC Turn-On Threshold VVCCon vs. Tj Junction Temperature [°C] Figure 24 35 8,67 PI-003-190101 PI-003-190101 Supply Current IVCC2 [mA] 6,0 4,5 -25 -15 25 PI-005-190101 PI-005-190101 Figure 23 15 Junction Temperature [°C] 19 VCC Turn-On/Off HysteresisVVCCHY vs. Tj February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Typical Performance Characteristics 4,68 6,53 6,52 6,51 6,50 6,49 6,48 6,47 6,46 6,45 -25 -15 -5 5 15 25 35 45 55 65 75 85 4,66 4,64 4,62 4,60 4,58 4,56 4,54 4,52 4,50 -25 -15 95 105 115 125 PI-010-190101 PI-010-190101 Frequency Ratio fOSC1/fOSC2 4,70 6,54 PI-007-190101 PI-007-190101 Trimmed Reference Voltage V REF [V] 6,55 -5 5 Junction Temperature [°C] Figure 29 Trimmed Reference VREF vs. Tj Figure 32 25 35 45 55 65 75 85 95 105 115 125 0,726 100,5 0,724 100,0 99,5 99,0 98,5 0,722 PI-011-190101 PI-011-190101 Max. Duty Cycle 0,728 101,0 Frequency Ratio fOSC1 / fOSC2 vs. Tj 0,730 101,5 PI-008-190101 PI-008-190101 Oscillator Frequency fOSC1 [kHz] 102,0 0,720 0,718 0,716 98,0 0,714 97,5 0,712 97,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 0,710 -25 -15 95 105 115 125 -5 5 Figure 30 15 25 35 45 55 65 75 85 95 105 115 125 85 95 105 115 125 Junction Temperature [°C] Junction Temperature [°C] Oscillator Frequency fOSC1 vs. Tj Figure 33 3,69 21,6 3,68 21,5 Max. Duty Cycle vs. Tj 3,70 21,7 3,67 PI-009-190101 PI-009-190101 21,4 21,3 21,2 21,1 3,66 PI-012-190101 PI-012-190101 PWM-OP Gain AV 21,8 Reduced Osc. Frequency f OSC2 [kHz] 15 Junction Temperature [°C] 3,65 3,64 3,63 21,0 3,62 20,9 3,61 20,8 -25 -15 -5 5 15 25 35 45 55 65 75 85 3,60 -25 -15 95 105 115 125 Junction Temperature [°C] Figure 31 5 15 25 35 45 55 65 75 Junction Temperature [°C] Reduced Osc. Frequency fOSC2 vs. Tj Datasheet Preliminary Data -5 Figure 34 20 PWM-OP Gain AV vs. Tj February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Typical Performance Characteristics 5,34 3,90 3,85 3,80 3,75 3,70 3,65 3,60 3,55 3,50 -25 -15 -5 5 15 25 35 45 55 65 75 85 5,33 5,32 5,31 5,30 5,29 5,28 5,27 5,26 5,25 -25 -15 95 105 115 125 PI-016-190101 PI-016-190101 Detection Limit VSoft-Start1 [V] 5,35 3,95 PI-013-190101 PI-013-190101 Feedback Resistance R FB [kOhm] 4,00 -5 5 Junction Temperature [°C] Feedback Resistance RFB vs. Tj Figure 38 35 45 55 65 75 85 95 105 115 125 Detection Limit VSoft-Start1 vs. Tj 4,04 52 50 48 46 44 42 40 -25 -15 -5 5 15 25 35 45 55 65 75 85 4,03 4,02 4,01 4,00 3,99 3,98 3,97 3,96 3,95 -25 -15 95 105 115 125 PI-017-190101 PI-017-190101 54 -5 5 Soft-Start Resistance RSoft-Start vs. Tj Figure 39 Overvoltage Detection Limit VVCC1 [V] 4,85 4,84 4,83 4,82 PI-015-190101 PI-015-190101 4,81 4,80 4,79 4,78 4,77 4,76 4,75 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 45 55 65 75 85 95 105 115 125 Detection Limit VSoft-Start2 vs. Tj 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Detection Limit VFB2 vs. Tj Datasheet Preliminary Data 35 16,80 Junction Temperature [°C] Figure 37 25 PI-018-190101 PI-018-190101 Figure 36 15 Junction Temperature [°C] Junction Temperature [°C] Detection Limit VFB2 [V] 25 4,05 56 Detection Limit VSoft-Start2 [V] 58 PI-014-190101 PI-014-190101 Soft-Start Resistance RSoft-Start [kOhm] Figure 35 15 Junction Temperature [°C] Figure 40 21 Overvoltage Detection Limit VVCC1 vs. Tj February 2001 ICE2AS01 ICE2AS01 Preliminary Specification Typical Performance Characteristics 1,008 1,006 1,004 1,002 PI-019-190101 PI-019-190101 Peak Current Limitation Vcsth [V] 1,010 1,000 0,998 0,996 0,994 0,992 0,990 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 41 Peak Current Limitation Vcsth vs. Tj 270 260 250 240 PI-020-190101 PI-020-190101 Leading Edge Blanking tLEB [ns] 280 230 220 210 200 190 180 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 42 Leading Edge Blanking VVCC1 vs. Tj Datasheet Preliminary Data 22 February 2001 Preliminary Specification 6 ICE2AS01 ICE2AS01 Outline Dimension P-DSO-8-3 (Plastic Dual Small Outline) Figure 43 P-DIP-8-4 (Plastic Dual In-line Package) Figure 44 Dimensions in mm Datasheet Preliminary Data 23 February 2001 Total Quality Management Qualität hat für uns eine umfassende Bedeutung. Wir wollen allen Ihren Ansprüchen in der bestmöglichen Weise gerecht werden. Es geht uns also nicht nur um die Produktqualität unsere Anstrengungen gelten gleichermaßen der Lieferqualität und Logistik, dem Service und Support sowie allen sonstigen Beratungs- und Betreuungsleistungen. Dazu gehört eine bestimmte Geisteshaltung unserer Mitarbeiter. Total Quality im Denken und Handeln gegenüber Kollegen, Lieferanten und Ihnen, unserem Kunden. Unsere Leitlinie ist jede Aufgabe mit ,Null Fehlern" zu lösen in offener Sichtweise auch über den eigenen Arbeitsplatz hinaus und uns ständig zu verbessern. Unternehmensweit orientieren wir uns dabei auch an ,top" (Time Optimized Processes), um Ihnen durch größere Schnelligkeit den entscheidenden Wettbewerbsvorsprung zu verschaffen. Geben Sie uns die Chance, hohe Leistung durch umfassende Qualität zu beweisen. Wir werden Sie überzeugen. http://www.infineon.com Published by Infineon Technologies AG Quality takes on an allencompassing significance at Semiconductor Group. For us it means living up to each and every one of your demands in the best possible way. So we are not only concerned with product quality. We direct our efforts equally at quality of supply and logistics, service and support, as well as all the other ways in which we advise and attend to you. Part of this is the very special attitude of our staff. Total Quality in thought and deed, towards co-workers, suppliers and you, our customer. Our guideline is "do everything with zero defects", in an open manner that is demonstrated beyond your immediate workplace, and to constantly improve. Throughout the corporation we also think in terms of Time Optimized Processes (top), greater speed on our part to give you that decisive competitive edge. Give us the chance to prove the best of performance through the best of quality you will be convinced.