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GLF-444-054-511-D I/O Interconnect CORD COIL DBL END 4-4 BLACK 5' visit Digikey Buy
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I/O67

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76/TDO I/O77 I/O78 I , /O62 I/O63 I/O64 TMS I/O65 I/O66 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I/O73 I/O74 NC I/O75 I/O76 I , /O67 I/O69 I/O75 I/O78 I/O81 I/O85 I/O88 I/O92 I2 I/O97 I/O101 I/O105 , /O109 I/O113 NC I/O126 I/O127 I/O128 P I/O68 I/O67 NC I/O74 I/O79 I , - 3.3V ISR - 5V tolerant · Up to 192 I/Os - Plus 5 dedicated inputs including 4 clock inputs · Cypress Semiconductor
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5d7 diode

Abstract: 5d3 diode MACH 5 CPLD Family Fifth Generation MACH Architecture FEATURES High logic densities and I/Os , I/Os Wide selection of density and I/O combinations to support most application needs - 6 macrocell density options - 7 I/O options - Up to 4 I/O options per macrocell density - Up to 5 density & I/O options for each package Performance features to fit system needs - 5.5 ns tPD Commercial , ) - Safe for mixed supply voltage system design - Bus-FriendlyTM Inputs & I/Os - Individual output
Lattice Semiconductor
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ULTRA37000

Abstract: /O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76 /SDO I/O77 , I/O78 I/O79 VCC I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I , /O56 I/O53 I/O70 I/O68 I/O65 GND I/O61 I/O58 I/O55 I/O69 I/O67 I/O64 , Features · 3.3V or 5.0V I/O operation · Available in 160-pin TQFP, CQFP, and PGA packages · 128 macrocells in eight logic blocks · 128 I/O pins Functional Description · Five dedicated inputs
Cypress Semiconductor
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CY37256P160-125UMB

Abstract: CY37256P160-83UMB /O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76 /TDO I , /O60 I/O61 I/O62 I/O63 I/O64 TMS I/O65 I/O66 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I , I/O112 VCCO NC GND I/O123 I/O122 I/O126 U V I/O64 I/O67 I/O69 I , changes · Up to 192 I/Os - plus 5 dedicated inputs including 4 clock inputs · High speed - fMAX = , Product-term clocking IEEE 1149.1 JTAG boundary scan Programmable slew rate control on individual I/Os Low
Cypress Semiconductor
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208-Lead

Abstract: CY37512 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I/O73 I/O74 NC I/O75 I/O76 I/O77 I/O78 I/O79 , GND I/O112 VCCO NC GND I/O123 I/O122 I/O126 U V I/O64 I/O67 I/O69 , I/O67 VCC GND GND GND GND GND I/O68 I/O69 I/O70 GND GND GND , changes · IEEE standard 3.3V operation - 3.3V ISR - 5V tolerant · Up to 264 I/Os - plus 5 , rate control on individual I/Os Low power option on individual logic block basis User-Programmable
Cypress Semiconductor
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ultraISR CABLE

Abstract: CY37256 /O58 I/O59 I/O60 I/O61 I/O62 I/O63 I2 VCCO GND VCC I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 , I/O66 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I/O73 I/O74 NC I/O75 I/O76 I/O77 I/O78 , GND I/O112 VCCO NC GND I/O123 I/O122 I/O126 U V I/O64 I/O67 I/O69 , Product-term clocking IEEE 1149.1 JTAG boundary scan Programmable slew rate control on individual I/Os Low power option on individual logic block basis 5V and 3.3V I/O capability User-Programmable Bus Hold
Cypress Semiconductor
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Abstract: VCCIO Document #: 38-03029 Rev. *A VCCINT I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I , /O57 I/O58 I/O59 I/O60 I/O61 I/O62 I/O63 I2 VCC I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND , 3 I/O71 4 I/O69 5 I/O67 6 I/O64 7 I/O63 8 I/O62 9 I/O59 10 I/O57 11 I/O48 , · 128 I/O pins · Five dedicated inputs including 4 clock pins · In-System Reprogrammable (ISRTM) Flash technology - JTAG Interface · Bus Hold capabilities on all I/Os and dedicated inputs · No hidden Cypress Semiconductor
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tea 1601 t

Abstract: tea 1601 or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General , 3.3 V Devices Feature Macrocells User I/O options M4A3-322 M4A3-642 M4A3-962 M4A3 , -962 M4A5-1282 M4A5-1921 M4A5-2562 Macrocells 32 64 96 128 192 256 User I/O , -5 M4A3-323 M4A5-323 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3
Lattice Semiconductor
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tea 1601 t tea 1601 O2-A2 160 e7 led matrix circuits ISPMACH 182MH M4A3-32/32 M4A3-64/32 M4A3-64/64 M4A3-96/48 M4A3-128/64
Abstract: or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General Publication# ISPM4A Amendment/0 Rev: I Issue Date: May 2001 Table 1. ispMACH 4A Device Features 3.3 , -384 M4A3-512 Macrocells 32 64 96 128 192 256 384 512 User I/O options 32 , User I/O options 32 32 48 64 96 128 tPD (ns) 5.0 5.5 5.5 5.5 6.0 -
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M4A3-192/96 M4A3-256/128 M4A3-256/160 M4A3-256/192 M4A3-384/160 M4A3-384/192

tea 1601 t

Abstract: Programmable pull-up or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - , on all major programmers including Data I/O, BP Microsystems, Advin, and System General , 3.3 V Devices Feature Macrocells User I/O options tPD (ns) fCNT (MHz) tCOS (ns) tSS (ns) Static Power (mA) JTAG Compliant PCI Compliant 5 V Devices Feature Macrocells User I/O options tPD (ns) fCNT (MHz , Commercial, C C C -5 C C C C C C C C -55 -6 -65 -7 C, I C, I C, I C, I C, I C, I C, I C C -10 C, I C, I C, I
Lattice Semiconductor
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M4A3-512/160 M4A3-512/192 M4A3-512/256 M4A5-32/32 M4A5-64/32 M4A5-96/48

37256p

Abstract: CY37256-125 GND I/O56 I/O57 I/O58 I/O59 I/O60 I/O61 I/O62 I/O63 I2 VCCO GND VCC I/O64 I/O65 I/O66 I/O67 I/O68 I , I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I/O73 I/O74 NC I/O75 I/O76 I/O77 I/O78 I/O79 I2 VCC0 GND VCC , VCCO NC GND I/O123 I/O122 I/O126 U V I/O64 I/O67 I/O69 I/O75 I/O78 , don't cause pinout changes - Design changes don't cause timing changes · Up to 192 I/Os - Plus 5 , slew rate control on individual I/Os Low-power option on individual logic block basis 5V and 3.3V I/O
Cypress Semiconductor
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CY37256 37256p CY37256-125 CY37256P160-125UMB IEEE 1149.1 JTAG 256-M 160-L 208-L CY37256V CY37128/37128V

O2-A2

Abstract: C10C8 or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General , -3842 M4A3-512 Macrocells 32 64 96 128 192 256 384 512 User I/O options 32 , -962 M4A5-1282 M4A5-1922 M4A5-2562 Macrocells 32 64 96 128 192 256 User I/O , -323 M4A5-323 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3-64/323 M4A5-64/323
Lattice Semiconductor
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C10C8 M4A5-128/64 M4A5-192/96 M4A5-256/128 M4A3256/128-7YC-10YI

CY37512

Abstract: CY37512V I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I/O73 I/O74 NC I/O75 I/O76 I/O77 I/O78 I/O79 , GND I/O112 VCCO NC GND I/O123 I/O122 I/O126 U V I/O64 I/O67 I/O69 , I/O67 VCC GND GND GND GND GND I/O68 I/O69 I/O70 GND GND GND , changes · IEEE standard 3.3V operation - 3.3V ISR - 5V tolerant · Up to 264 I/Os - plus 5 , rate control on individual I/Os Low power option on individual logic block basis User-Programmable
Cypress Semiconductor
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CY37512V CY37512 512-M CY37256/37256V CY37384/37384V CA95134

CY37256

Abstract: CY37256V /O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76/TDO I/O77 I/O78 I , /O60 I/O61 I/O62 I/O63 I/O64 TMS I/O65 I/O66 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I , I/O122 I/O126 U V I/O64 I/O67 I/O69 I/O75 I/O78 I/O81 I/O85 I/O88 , 3.3V ISR - 5V tolerant · Up to 192 I/Os - plus 5 dedicated inputs including 4 clock inputs · High , Programmable slew rate control on individual I/Os Low power option on individual logic block basis
Cypress Semiconductor
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O116 CY37192/37192V CY37512/37512V I/O0-I/O11 I/O12-I/O23 I/O24-I/O35 I/O36-I/O47

ULTRA37000

Abstract: 160-Lead I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76 /SDO I/O77 GND I , I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76 /SDO I/O77 GND , I/O61 I/O58 I/O55 I/O69 I/O67 I/O64 I/O63 I/O62 I/O59 I/O57 7 8 , Features · 3.3V or 5.0V I/O operation · Available in 160-pin TQFP, CQFP, and PGA packages · 128 macrocells in eight logic blocks · 128 I/O pins Functional Description · Five dedicated inputs
Cypress Semiconductor
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ULTRA37000 160-Lead ULTRA37000TM CY7C375 128-M FLASH370 22V10

O2-A2

Abstract: VCCIO11 or Bus-FriendlyTM inputs and I/Os - Hot-socketing - Programmable security bit - Individual , 32 64 96 128 192 256 384 512 User I/O options 32 32/64 48 64 , -128 M4A5-192 M4A5-256 Macrocells 32 64 96 128 192 256 User I/O options 32 , Speed Grade Device M4A3-32 M4A5-32 -5 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3-64/32 M4A5-64/32 C C, I C, I I M4A3-64/64 C C, I C, I I
Lattice Semiconductor
Original
VCCIO11 Lattice Mach OX2 ispMACH M4A3 M4A5-192 application note PAL 007 O64i VNI48 M4A3-256/128-7YC-10YI

O158

Abstract: O2-A2 voltage system designs - Programmable pull-up or Bus-FriendlyTM inputs and I/Os - Hot-socketing - , 64 96 128 192 256 384 512 User I/O options 32 32/64 48 64 96 , -128 M4A5-192 M4A5-256 Macrocells 32 64 96 128 192 256 User I/O options 32 , Speed Grade Device -5 M4A3-32 M4A5-32 -55 -6 -65 -10 -12 C, I C -7 C, I I M4A3-64/32 M4A5-64/32 C C, I C, I I M4A3-64/64 C C, I C, I I
Lattice Semiconductor
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O158 1M4A3 12864a o248 512256 VNC48

CY37256

Abstract: CY37256V /O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76/TDO I/O77 I/O78 I , /O60 I/O61 I/O62 I/O63 I/O64 TMS I/O65 I/O66 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I , I/O122 I/O126 U V I/O64 I/O67 I/O69 I/O75 I/O78 I/O81 I/O85 I/O88 , - 5V tolerant · Up to 192 I/Os - plus 5 dedicated inputs including 4 clock inputs · High speed , Programmable slew rate control on individual I/Os Low power option on individual logic block basis
Cypress Semiconductor
Original
I/O48-I/O59 I/O60-I/O71 I/O72-I/O83 I/O84-I/O95 38-00606-C 160-P
Abstract: I/O82 I/O81 I/O80 GND Document #: 38-03029 Rev. * VCCINT I/O64 I/O65 I/O66 I/O67 I , /O80 GND Document #: 38-03029 Rev. * I/O78 I/O79 VCC I/O64 I/O65 I/O66 I/O67 I/O68 I , /O56 I/O53 I/O70 I/O68 I/O65 GND I/O61 I/O58 I/O55 I/O69 I/O67 I/O64 , · · · 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock , all I/Os and dedicated inputs · No hidden delays · High speed - fMAX = 125 MHz The CY7C375i is Cypress Semiconductor
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CERAMIC QUAD FLATPACK CQFP 14 pin

Abstract: CERAMIC QUAD FLATPACK CQFP /O78 I/O79 VCCIO VCCINT I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 , VCC I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76 , /O70 I/O68 I/O65 GND I/O61 I/O58 I/O55 I/O69 I/O67 I/O64 I/O63 I/O62 , blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable (ISRTM) Flash technology - JTAG Interface · Bus Hold capabilities on all I/Os and dedicated inputs · No hidden delays
Cypress Semiconductor
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CERAMIC QUAD FLATPACK CQFP 14 pin CERAMIC QUAD FLATPACK CQFP CERAMIC PIN GRID ARRAY CPGA
Abstract: /O124 I/O12 INIT I/O59 I/O67 MO RITRIG CSO PWRDWN RDY BSY/RCLK I/O115 TCLK IN I/O160 RESET M1 Transcend Information
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240PIN TS256MLQ72V6U DDR2-667 333MHZ
Abstract: I/O64 I/O65 I/O66 I/O67 I/O68 I/O69 I/O70 I/O71 GND I/O72 I/O73 I/O74 I/O75 I/O76/TDO I/O77 I/O78 I , /O62 I/O63 I/O64 TMS I/O65 I/O66 I/O67 I/O68 I/O69 GND I/O70 I/O71 I/O72 I/O73 I/O74 NC I/O75 I/O76 I , /O109 I/O113 NC I/O126 I/O127 I/O128 P I/O68 I/O67 NC I/O74 I/O79 I , I/O102 GND I/O112 VCC NC GND I/O123 I/O122 I/O126 U V I/O64 I/O67 I/O69 I/O75 I/O78 I/O81 I/O85 I/O88 I/O92 I2 I/O97 I/O101 I/O105 Transcend Information
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TS256MLQ72V5U DDR2-533 267MHZ
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